Class Note for ECE 380 at UA-Digital Logic
Class Note for ECE 380 at UA-Digital Logic
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This 3 page Class Notes was uploaded by an elite notetaker on Friday February 6, 2015. The Class Notes belongs to a course at University of Alabama - Tuscaloosa taught by a professor in Fall. Since its upload, it has received 22 views.
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Date Created: 02/06/15
ECE380 Digital Logic Number Representation and Arithmetic Circuits Signed Numbers Binary Adders and Subtractors accinca AcomvmerEngineering Dr D J Jackson La ure l Signed numbers o For signed numbers in the binaw system the sign of the number is denoted by the leftmost bit 7 0 postive s 1 nega ve o For an nbit number the remaining n1 bits represent the magnitude ns magnitude MSB M SB Unsigned number magnitude Signed number accinca AcomvmaEngineering Dr D J Jaclson La ure Z Negative numbers o For signed numbers there are three common formats for representing negative numbers 7 Signsmagnitude 7 1395 complement 7 2395 complement o Signmagnitude uses one bit for the sign 0 1 and the remaining bits represent the magnitude of the number as in the case of unsigned numbers 0 For example using 4bit numbers 50101 s51101 11 s31011 70111 s71111 0 Although this is easy to understand it is not well suited for use in computers accinca AcomvmerEngineering Dr D J Jackson La ure l 139s complement representation o In the 139s complement scheme an nbit negative number K is obtained by subtracting its equivalent positive number P from 2 1 K2quots1sP o For example if n4 then K2 r17P15msp11112sp s515ms511112s0101210102 s315us311112s0011211002 0 From these examples clearly the 139s complement can be formed simply by complementing each bit of the number including the sign bit 0 Numbers in the 139s complement form have some drawbacks when used in arithmetic operations accinca AcomvmaEngineering Dr D J Jaclson Ledure A 239s complement representation o In the 2 s complement scheme an nbit negative number K is obtained by subtracting its equivalent positive number P from 2n K2 P o For example if n4 then K24P1610P100002P 5 161051000020101210112 3161031000020011211012 o A simple way of finding the 2 s complement of a number is to add 1 to its 1 s complement accinca AcomvmerEngineering Dr D J Jackson La ure Rule for finding 239s complements 0 Given a signed number Bbn1bn2b1b0 its 2 s complement Kkn1kn2k1k0 can be found by examining all the bits ofB from right to left and complementing all the bits after the first 139 is encountered o For example if B00110100 0 Then the 2 s complement of B is K11001100 v quot v changed bts unchanged bits accinca AcomvmaEngineering Dr D J Jaclson La ure s Fourbit signed integers Si nitude 1 5 merit 2 5 stance AEoNDmerEngmaarlng Dr D J Jackson La urel77 Addition and subtraction o For signmagnitude numbers addition is simple but if the numbers have different signs the task becomes more complicated Log c circuits thatcompare and subtract numbers are also needed It is possible to perform subtraction without this circuitry For this reason signrmagnitude is not used in computers 0 For 139s complement numbers adding or subtracting some numbers may require a correction to obtain the actual binary result 0 For example 527 but when adding the binary equivalents of 5 and 2 the result is 0111 with and additional carry out of 1 which must be added back the the result to produce the final correct result of 1000 came AEoNDmaEngmaarlng Dr D J Jaclson La ure 239s complement operations o For addition the result is always correct 0 Any carryout from the signbit position is simply ignored 5 0101 5 1011 2 0010 2 0010 7 0111 3 1101 5 0101 5 1011 2 1110 2 1110 3 10011 7 11001 ignore ignore stance AEoNDmerEngmaarlng Dr D J Jackson La ure a 239s complement subtraction o The easiest way of performing subtraction is to negate the subtrahend and add it to the minuend Find me 2 s complement of the subtrahend and then perform addition 5 0101 0101 2 0010 gt 1110 3 10011 ignore 5 1011 1011 2 1110gt 0010 3 1101 stance AEoNDmaEngmaarlng Dr D J Jaclson La ure l Adder and subtractor unit o The subtraction operation can be realized as the addition operation using a 2395 complement of the subtrahend regardless of the signs of the two operands It is possible to use the same adder circuit to perform both add ton and subtraction 0 Recall that the 239s complement can be formed from the 139s complement simply by adding 1 0 We can use the XOR operation to perform a 1395 complement Recall x1x39 and x0x If we are performing a subtract operation 1 s complement the subtrahend by XORing each bt with 1 stance AEoNDmerEngmaarlng Dr D J Jackson La ure ll Adder and subtractor unit Sub control stance AEoNDmaEngmaarlng Dr D J Jaclson La ure l Arithmetic overflow o The result of addition or subtraction is supposed to fit within the significant bits used to represent the numbers 0 If n bits are used to represent signed numbers then the result must be in the range 2 1 to 2n 1l o If the result does not fit in this range we say that arithmetic overflow has occurred 0 To insure correct operation of an arithmetic circuit it is important to be able to detect the occurrence of overflow eemnce scumpmerzngmermg Dr D J Jackson Ledure l Examples for determining a rithmetic overflow For 4rbit numbers there are 3 significant bits and the sign bit 7 0111 7 1001 M M M M 9 1001 5 1011 c 0 c 0 4 4 c31 c30 7 0111 7 1001 2 1110 2 1110 5 10101 43 10111 c 1 c 1 4 4 c31 c30 If the numbers have different signs no overflow can occur eemnce scumpmezngmermg Dr D J Jaclsun Ledure l Arithmetic overflow o In the previous examples overflow was detected by overflowc3c4 c3 c4 overflowc34 o For nbit numbers we have overflowcm cn o The addersubtractor circuit introduced can be modified to include overflow checking with the addition of one XOR gate eemnce scumpmerzngmermg Dr D J Jackson Ledure l
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