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# Class Note for ECE 380 at UA-Digital Logic(12)

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This 3 page Class Notes was uploaded by an elite notetaker on Friday February 6, 2015. The Class Notes belongs to a course at University of Alabama - Tuscaloosa taught by a professor in Fall. Since its upload, it has received 20 views.

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Date Created: 02/06/15

ECE380 Digital Logic Number Representation and Arithmetic Circuits Number Representation and Unsigned Addition acclnca AcumvmerEnglneerlng Dr D J Jackson Ledureisi Positional representation 0 First consider integers s Begin with positive only descriptions and expand to include negau39ve numbers 7 Numbers that are positive only are unsigned and numbers thatcan also assume negative values are signed 0 For the decimal system 7 A number consists of digits having ten possible values org 7 Each dig t represents a multiple of a power of 10 123m1x1022x1ol3x1ou o In general an integer is represented by n decimal digits Ddndn2 dldu o Representing the value VDdmx10 391 dnrleoni2 d1x101 dux10 acclnca sconouaznonoonno Dr D J Jacison La ureiSZ Positional representation Because the digits have 10 possible values and each digit is weighted as a power of 10 we say that decimal numbers are base10 or radix10 numbers In digital systems we commonly use the binary or base2 number system in which digits can be 0 or 1 7 Each dig t is called a bit 0 The positional representation is Bbmbn72 bb Representing a integer with the value VBbx2 quot bn2x2 392 b1x21 b xzEl acclnca AcumvmerEnglneerlng Dr D J Jackson Ledureisl Positional representation o The binary number 1101 represents the value V1x23 1x22 0x21 1x2 V84113 0 So 11012131D o The range of numbers that can be represented by a binary number depends of the number of bits used 0 In general using rl bits allows a representation of positive integers in the range 0 to 2 1 Most sig 39ficant m Least significant Bit M55 Bit LSB acclnca sconouaznonoonno Dr D J Jacison LedureisA DecimalBina ry conversion o A binaw number can be converted to a decimal number directly by evaluating the expression vBbx2M bn2x2quot392 b1x21 bux2 0 using decimal arithmetic by expansion 0 Converting from a decimal to a binary number can be preformed by successively dividing the decimal number by 2 as follows 7 Divide the decimal number D by 2 producing a quotient 02 and a remainder The remainder will be 0 or 1 since we divide by 2 and will representa single bt the LSB of die binary equivalent 7 Repeatedly divide the generamd quotient by 2 until the quotient0 For each divide the remainder represents one of the binary digits bts of the binary equivalent acclnca AcumvmerEnglneerlng Dr D J Jackson Ledureis DecimalBina ry conversion COME W11n Remainder 128 1 LSB QIH U 1111 I 53 I 26 I 13 l E 1 R O I I i 1 FISH licnwlt in Ill lmiln llilg acclnca sconouaznonoonno Dr D J Jacison Ledureiss Octal and hexadecimal numbers Numbers in different systems o Positional notation can be used for any radix base If the radix is r then the number Kanakna k1ku has the value Vl kxxr 0 Numbers with radix8 are called Octal and numbers with radix 16 are called hexadecimal or hex e For Octal drgrr values range from 0 to 7 e For hex dxgxtal values range from 09 and Ari Deomal Bmary Octal Hex Demmal Bmary Octal Hex uuuu u u a man 1a a uuu1 9 mm uu1u 1u 1u1u uu11 1u11 u1uu 11uu u1u1 11u1 u11u 111u u111 1111 Emumomworawnumw a in 1mm mun m amumomworawmNw a in 1mm man or 39naw to hex or octal conversion Group binary digits into groups or our and assign each group a hexadecimal digit n11u nll am a s 7 smarvrtuructzl n11 mu no 111 3 2 s 7 Hexadecimalrturblnarv A 1 9 mm mm mm octalrturblnarv 5 n 3 1 1n1 nun n11 am 0 Additional of two 1bit numbers gives four possible combinations xycs X 0 0 1 1 0000 v 0 1 0 1 0101 cs 00 01 01 10 1001 mg 2m 1110 x4 45 HA on ya 4 C Emumomworawnumw a in 1mm mun a amumomworawmNw a in 1mm mum is 11 Unsigned number addition Full adder circuit 0 Larger numbers have more bils involved rThere s sth the need to add each paw ofbwts 7 But for each brt posmon I the addmoh operatron mav hclude a carryin from in posmoh p1 xxx3x2xxu 0 1 1 1 1 15 Yvvavav1va 0 10 10 101a 1 1 1 0 Generated carnes Sss3s2ssu 1 10 0 1 25 q X y CM 5 C 11 11 1a 0000 O u u 1 u 1 00101 1 1 u 1 D 01001 01110 10001 10110 11010 11111 Crleryrcrchr Emumomworawnumw a in 1mm mun 1s 11 amumomworawmNw a in 1mm mum is 11 Full adder circuit Ci1 Dr D J Jackson Lecture 16 13 Electrical amp Computer Engineering Ripplecarry adder o In performing addition we start from the least significant digit and add pairs of digits progressing to the most significant digit 0 If a carry is produced in position i it is added to operands digits in position i1 o A chain of full adders connected in sequence can perform this operation 0 Such a configuration is called a ripplecarry adder because of the way the carry signal ripple through from stage to stage Dr D J Jackson Lecture 16 15 Electrical amp Computer Engineering Full adder circuit decomposed Block diagram C j gt I S I iil Detailed diagram Electrical ampComputer Engineering Dr D J Jackson Lecture 16 14 Ripplecarry adder Vn1xn1 V1 x1 Vo x0 c c c c n FA n 1 2 FA 1 FA 0 SH 51 so Electrical 8t Computer Engineering Dr D J Jackson Lecture 16 16 Ripplecarry adder 0 Each full adder introduces a certain delay before its 5 and C1 outputs are valid The propagat on delay through the full adder Let this delay be At 0 The carry out of the first stage C1 arrives at the second stage At after the application of the X0 and ya inputs 0 The carry out of the second stage C2 arrives at the third stage with a delay of 2At and so on The signal Cn1 is valid after n1At and the complete sum is available after a delay of nAt The delay obviously depends on the size of the numbers ie the number of bits Dr D J Jackson Lecture 16 17 Electrical amp Computer Engineering

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