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# Class Note for ECE 474A at UA

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COURSE
PROF.
No professor available
TYPE
Class Notes
PAGES
2
WORDS
KARMA
25 ?

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This 2 page Class Notes was uploaded by an elite notetaker on Friday February 6, 2015. The Class Notes belongs to a course at University of Arizona taught by a professor in Fall. Since its upload, it has received 14 views.

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Date Created: 02/06/15
PRACTICE PROBLEMS 2 Lecture 3 Lecture 4 1 Which of the following FSMs implement a button synchronizer converting each unique button press into a single cycle regardless of the time the button is actually pressed Inputs b bit Outputs x bit b b Inputs b bit Inputs b bit Inputs b bit Outputs x bit Outputs x bit Outputs x bit 3 b b b I b I I b l b I H b e b e x0 x1 x0 x1 xo x1 a b C d 2 Create a state table for the following FSM You can assume the state register is implemented with D ip ops You Do NOT need to implement the combinational logic Inputs a Outputs x y 3 Convert the following Moore FSM to a Mealy FSM ab Inputs ab Outputs w 4 Convert the following Mealy FSM to a Moore FSM Inputs y Outputs e ye 0 y e 0 EEYYE1 a ye1 Implement a Mealy FSM that detects the input sequence pattern 2 l 0 l 0 Whenever the input pattern is detected immediately output f 1 do not wait until the next clock cycle You only need to show the FSM you do not need to implement the architecture Hint What happens when you detect input Z l 0 l 0 I 07 6 Describe the FSM provided using the formal specification M X Y S 5 9 so Inputs a b Outputs y a b b l y0 You want to design a laser surgery system where a surgeon activates the laser by pressing a button The laser should then 7 stay on for exactly 3 cycles then tLu39n off The FSM below describes the threecycles high laser timer controller Same system from lecture 3 slide 4 Inputs b bit bgt Outputs x bit x0 b xl xl xl To model this FSM in Verilog we can use either a 2process model or a lprocess model Download the threecycles high laser time code provided on the course page and simulate both FSMs using the Testbench provided a Do both the lprocess model and 2process model accurately describe the fmetionality of the desired system b Is there any difference in output between the lprocess model and 2process model If so why Derive a state table for the FSM provided Assume the state register is implemented with T ip ops and the state encodings for states A B C and D are 00 01 l O and l 1 respectively A truth table for T ip ops is provided Inputs a bit Outputs y Z bit T ipflop and corresponding truth table T Q gt OQnext 1 1 0

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