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# Class Note for ECE 274 at UA

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This 18 page Class Notes was uploaded by an elite notetaker on Friday February 6, 2015. The Class Notes belongs to a course at University of Arizona taught by a professor in Fall. Since its upload, it has received 17 views.

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Date Created: 02/06/15

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mmwuswuevwmw mmmmummmar Digital Logic CMOS AND Gate Let in building an AND gate Wm ClVlOS transistors H H n Digital Logic CMOS AND Gate AND Does this Work7 We39ve acmallv buld an NAND 9312 N XU YEI Digital Logic Corrected MUS AND Gage How do We go from NAND gate to AND gate7 Xirv x ir v Xrx rH r v l NAND gate w gate AND gate Digital Logic CMOS NOR 6am Let in building an NOR gate Wm ClVlOS transistors 14 Digital Logic CMOS NOR 6am Does it Work7 Digital Logic CMOS OR 6am How do We go from NOR gate to OR gate7 1 1 1 xi 1 4 F F H xl H a S g u mm mm mm 15 Digital Logic General was Gems We39ve consumed a set logic gates from CMOS nansistors 1 H xi x4 l v H x4 H H H r A r vii T H H H H H m gee Mu gee mm mum mm Nuhte IlrEWIres lawn hznslstas m Implements NANDNDR 92m versesz ANDDR gate 17 Digital Logic Funcum impiemermon Wim mos Transistors 7 Example 1 Let W to implement F X1 X2 x3 using CMOS transistors Ella Digital Logic mam Impiemenzimn Wm CMOS Ynnmia r Exzmde z Let39s w m impiement F x1 X2 gtG39 using 0405 hansistms Let39s w m impiement F x1 X2 gtG39 using 0405 hansistms We on mm mmg mmwm u an oxz xz szl o zoxz am on magmaum mm Swim quotmm m 1 a DigitalLogic Hm mum iEuiding Eiofk MOS mm imviements swikhes an a my smaii scaie um these m huiid iavqev wmits is ham Wantmwmkatahiqhevievei Digital Logic Transmon to the ter 4 Lecture 5 7 Chapter 3 1 to 3 3 Chapter 4 1 to 4 2 I UVlOS Tramlsmrs mos Logic Gems Kamaum Map 22 Digital Logic innodmnon k Op mlza m and Tradeoffs F Wx Wx We now know how to build digital V V CerulB I HOW can We build bellafcirmilsquot cast 11 cast 3 a my 2 W i y m QDFZ Lets consider two important design 9 criteria F1 vuxvowxv F2 mix Dslayr the me from H ipuB mangng to new oorrectslzble output Eva am has my Bf gateway 5 E n Immeimemas m 5 m I Size 7 the number of Damismrs 1 j Evav gafa has cast unba Bf gatas a awning mm numlzev mommies 39 975392 WEN Tvansiuvmmg F1 in F2 vepvesems anolmrmzalan Benevm all Milena m iMEYEs1 23 Digital Logic Introdmnon m Opumizaum and Tradeoffs Tradeoff improves some butworsers other omena omnterest m m m o g m 3961 W delay 2 W delay 3 u 62 X 5 lt34 V o2 W I 3 4 new watt delivs lt34 Wqu o2 WW1 nmmmomoz ieviesents mum 5m mummy miners waist Digital Logic li ilToduc ori m o Dmizagg grid Tradeoffs 1 i delay my Olmrmzanons Traderquot All uifeiia cf mien Same ciiieiia bi iMEYEs1 aie leYEIVEd aie imumed a alleast kwme samE wbiie ulbeis aie wuiserieu We obviously prefer optimizauons but often must accept badeoffs Vou cant buld a car mat is me most comfortable and has me best fuei ef ciency arid is me fasbesf 7 you have to gve LD somemirig to gain other thing 5 Digital Logic Opnmizauon Though Algebraic Manipuiauon Algebraic manibuiauon F xyz xyz39 X y 139 x y z Munpr out to sumrofrprod icm then F xy1 139 gtltVz 139 apply foiiowmg as mum bossibie F XW Xw abab abb aquotla Fexwxiyi Dmtlniru Cams m diminata a vaviable meallv allad FE Urimrig thawquot F x y z x39y39z x yz F x y z x39y39z x39y39z x yz Duplicanrig a term semen mes beibs i i i i i Nata thatduzri39t charge furmm F X V lz H W W F xy gtltz ddddddd Someumes after combning berms can quot G m V1 le V1 combine resuung berms G MHZ xvtvz G xy xy now do again G xiwv G 1 X 25 Digital Logic Karriauw Maps for TworLevel Size Mll illeaDO Algebraic Manibuiauon I which rules m use arid when Easyto miss seeing39 bossibie oppormnues m combine terms Karnaugh Maps KFmaps Graphical memod m beib us nd opporunmes to combine Erin Geabe map Where aqacmrmiriberms differ in mum Cari dearlysee opporimiues m combine terms 7 iook for adiacerf 1s Dig ital Logic General Kema method General Krmap method 1 Comertme iuncnon s eqmum irito sumrofrprod lcm form or mm we 2 Place 15 W the appropriaue Krmap cells for eadw term 3 Cover all 15 m draWii ig the fewest largest cirdes Wll every 1 included at least moe Write me oorrespmang new for eadw arde 4 OR all me resulnng Ems m cream the minimizedfmcuon 25 Digital Logic Generalized Tworvariable KrMap TworVariablelVlap Vaviablexz x2 I x2 J XZ 1 x n x n mum meme Vanablexi m n m 1 29 Digital Logic Generalized Tworvariable KrMap TworVariable Map Kernel Evapmcaw place mmlevrm mun each WWWnervth mm m unevanable n rM XZ mm l2le ml rm xz mm l2le mzrx ln mew Digital Logic Tworvarlable KrMa le Example 7 1 Flll ll l each cell Wldw correspondlng value of E Draw Clrcles around adjacent 139s GroLpsof 1 20r4 Clrcle ll ldlcates opu mlzauon opportunlty We canremove a varlable To obtall39l functlol39l OR all product terrm contalned ll l clrcles Make sure all 1 are lrr atleast one orde mlle mzl mzl x F m le XZ OW m mz on ml mm m m 31 Digital Logic Tworvarlable KrMaple Example 7 2 Let W anomer example F mwa x2 Digital Logic Generalized Threervarlable KrMap Threelarlable Map n lehlz e REMEMBER Krmap erapmeallv place mlmerms rm lzble rrexi in each mhelwhen they dmel w are vallable ml cannm b2 placed nexHu m2 a n cl a bc ml can b2 placed rremu m3 am am m2canbeplacednexllu a bc lac Digital Logic Threervariable iltrMa oquizanori Guidelines Circles can cross leftright sides Remember edges are adJaoerit Mintams dffa in are vaviable mlv I Circles must Have 1 2 4 or 8 cells 73 5 or 7 riot allowed 357 doesrit oorrespo d m algebraic Uarsformaums that combine Ems to eliminate a variable Circling aii me cells isOK Funmmjustemals 1 Digital Logic Threervariable KrMap obu mizanori Guidelines 9 Two adiacent 1s means one G variables can be eliminated G Same as if Worvariable Kemabs wz sz Mo 29 w Digital Logic Threervariable KrMap obu mizanori Guidelines Four adjacent 1s mean two 3 variables can be eliminated G Makes immve serse 411066 9 two variables appear if all 9 combinaums 50 one MLSL be true Draw one big cirde e 570177wa the algebraic Uarsformaums above Diawibe bieees1 EiYElE pussibie DY a vein ii ham imie ieims than veallv needed m o W z o W2 o M Wz o v z o vz o vz mus1 be him w auz vltzoz WW Digital Logic Threervariabie KrMa ogu mizanon Guidelines Four adjacent cells can be ii i H W2 ox vz m m shape of a square w appears in aii cumbinaiiuns H V X m m M in Digital Logic Threervariabie KrMap 0pm mizanon Guidelines I Okay to cover a 1 twice l V1 VI Justiike deiicam39ig a term X m m M in Rsngnbadcdd u u u u 111111 The NIH ciicies ave shunhand m i x v zow w zwwwvz i w w z w z w z wz wz i w ow z 39 W z ow z om om i V Z X No NEEDto cover 1 more than J vz XV v z once X EIEI m M in Vields extra termsri39iot I I1 I u xz minimized i 3 n 33 Digital Logic Threervariabie KrMapie Example 7 1 Let m an exarrple ma 15 x239gta Digital Logic Threervariable K Ma 6 Example 7 2 Let m an exarrple n x n i i i i i i F xi X2 40 Digital Logic Threervariable K Maple Example 7 3 Let s try an exarrple x F m n n x in m n m n n n n n n i i My Mr i i i i n F gtltlgtG39 Xl 39 X1 lt2gtG 41 Digital Logic Generalize Fourrvariable KrMap Fourrvari able Map 42 Digital Logic Founvarwab e KrMa o qrmzanon Guwdehnes Founvanabwe Kamap foHows same prmcwp e Le thtadjacem Topbottom a soadjaoent Adjacent ceHs dwffer m one varwab e Two adjacent 1 mean two varwab es can be ehrmnaued FoLr adjacent 15 means two varwab es can be ehrmnaued amadjaoent 15 nears mree vanabtes can be eh mmated 43 Digital Loglc Founvarwab e KrMapwe EXamp e r 1 Let suyan exarrp e 2 e z a n n n n n n n n n n n n n n n M n n n n n n n n n n n n F n n n n n 44 Digital Loglc Founvanabwe KrMapwe Exam e r 2 Mwmmwze F a cd39 a bc39d acd39 add 1 nrstwe W m me Krnap m my my mu w 45 Digital Logic Fourrvariable iltrMa ie Example 7 2 Minimize F a39cd39 a39bc39d acd39 a 1 Firstwe llii i 39ieKrmap m m an m n m 2 Seconddawlargestordesmcmrallls n n 0 mu m Digital Logic Fourrvariable KrMapie Exampie r 2 Minimize F a39cd39 a39bc39d acd39 a Firstwe ll ii i me Krmap 2 Second dew largestordes m cover all 15 3 Third OR all prodmtmrms mu m r m39 ad39 z bt39d 47 Digital Logic Fourrvariable KrMapie Examf e r 3 Minimze H a39b39cd39 c39d39 ab39c39d39 ab39cd39 a39bd a39bcd39 1 cmvertm sumrofproduds H a b cd a b c d ab c d ab cd a bd a bcd Digital Logic Fourrvariable K Ma le Example 7 3 Minimze H 39cd39 c39d39 ab39c39d39 ab39cd39 a39bd a39bcd39 z h c d39 2mm 1 cmvertm sumrofrproduds H a b cd a b c d ab c d ab cd a bd a bcd z hcd m 2 Place 15 if Krmap oeiis zh m39 zh c d39 49 Digital Logic Fourrvariable KrMapie Example 7 3 Minimze H cd c39d39 ab c d39 ab39cd39 a39bd a39bcd39 1 roduds H a b cd a b c d ab c d ab cd a bd a bcd 2 Place 15 if Krmap cells 3 Cover 15 z hc m 1 him WWW We hummemm WWW WWW Wequot a Digital Logic Fourrvariable KrMapie Examqe r 3 Minimze H a39b cd c39d39 ab c d39 ab39cd39 a39bd a39bcd39 1 cmvertm sumrofrproduds H a n m a b m auw m ab cd a bd a bcd ab 2 Place 15 if Krmap cells 3 Cover 15 z hc m 4 oRresuung Ems w H b d a bc a bd 51 Digital Logic Generahze Fourrva ab gKrMap Fwe and wawanab e Maps ests I Dw cutto Lse Fwewaname Map smvaname Map

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