Class Note for ECE 474A at UA
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This 2 page Class Notes was uploaded by an elite notetaker on Friday February 6, 2015. The Class Notes belongs to a course at University of Arizona taught by a professor in Fall. Since its upload, it has received 21 views.
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Date Created: 02/06/15
PRACTICE PROBLEMS 1 Lecture 1 Lecture 2 1 Design a circuit that computes F 5A using the fewest number of 4bit adders Input A is a 4bit number How many bits are required for the result to avoid over ow 2 Design a 3bit ALU to perform the operations speci ed Draw the internal components and connections within each ALextender however you can use a block diagram to depict the adder Operation Set t02 AiB B1 AB 3 Create the internal design of a full subtractor Be sure to include a truth table logic equations and a gatelevel schematic 4 Using only 2input 1output MUXes implement the following components a 8input 1 output MUX b 2input AND gate c half adder 5 Trace the behavior of the Verilog code provided Fill in the value of C in each time step Hint run the code through the simulator to veri your result ifRST1begin A2B4C1 end always posedge RST or posedge CLK begin CLKJ RST else begin A lt B B B 1 0 ltA B end end 6 Provide an examplescenario where blocking statements are useful 7 Provide an examplescenario where nonblocking statements are useful 8 According to the Mythical Man Month designer productivity decreases due to teamsize complexity Assuming a hypothetical 6000000 transistor project T in Which a single designer working alone can produce 7500 transistors per months P and each additional designer added to project results in a productivity decrease of 150 transistors per designer D a Derive an equation to compute the months until completion M based on T P D and N team size b Plot the months until completion M verses team size N With the team size ranging from 1 designer to 50 designers Hint use excel or similar program to plot graph c Plot the productivity per designer I verses team size N With the team size ranging from 1 designer to 50 designers d What is the optimal team size e IfD 200 What is the optimal team size 9 If specifying functionality at a higher level of abstraction increases productivity What would be the bene t of specifying an moduleapplication at the structural level
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