Class Note for ENGIN 112 at UMass(40)
Class Note for ENGIN 112 at UMass(40)
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Date Created: 02/06/15
ENGIN 112 Intro to Electrical and Computer Engineering Lectu re 1 5 Magnitude Comparators and Multiplexers quot ELECTRICAL 9 quot COMPUTER ENGINEERING umvsnswv or MASSACHUSETTS AMHERST ENGIN11Z L15 Magnilude Cnmpzrmnr and Multiplexers 0dnher62 3 Overview Discussion of two digital building blocks Magnitude comparators Compare two multibit binary numbers Create a single bit comparator Use repetitive pattern Multiplexers Select one out of several bits Some inputs used for selection Also can be used to implement logic ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 6 2003 Magnitude Comparator O The comparison of two numbers outputs AgtB AB AltB 0 Design Approaches the truth table 22 entries too cumbersome for large n use inherent regularity of the problem reduce design efforts reduce human errors A3O B3O ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 6 2003 Ma nitude Comparator A0 CO BO D01 A1 B1 C1 A EQ B A2 02 3 32 3 D23 B3 How can we find A gt B How many rows would a truth table have 28 256 ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 6 2003 Magnitude Comparator A0 C0 ED01 A1 A2 A3 ENGN112 L15 Magnitude Comparator and Multiplexers B1 BZ B3 C1 CZ C D01 FindA gt B D E0B IfA 1001 and B 0111 isA gt B VVhy D23 Because A3 gt B3 ie A3 B3 1 Therefore one term in the logic equation for A gt B is A3 B3 October 6 2003 mmy IfAlOlOand AgtBA3B339 B1001 C3A2B2 isAgtB Why Because A3 B3 and A2 82 and A1 gt Bl ie C3 1 and C2 1 and A1 B1 1 Therefore the next term in the logic equation for A gt B is C3C2A1Bl ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 6 2003 Magnitude Comparison Algorithm gt logic A A3A2A1Ao B 3332313 AB if A3B3 A2Bz A1B1and A1B1 Test each bit equality xi AiBiAi39Bi39 AB x3x2x1xo More difficult to test less thangreater than AgtB A3B339x3Asz39x3x2A1B139x3x2x1AoBo39 AltB A339B3x3A239Bzx3x2A139B1x3x2x1Ao39Bo Start comparisons from highorder bits Implementation xi AiBil39I39Ai39Bi ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 6 2003 DammDuAs r A3 A A Ah 5 5 5 Bu M 74Hc25 Cascadmn 5 44m moms L x magnuu e LL compmm GA Ll 0E v amp IRUTH TABLE COMPARLNG wrms CASCADLNG wurs DUTPuTS ALB Abel AMBL LL AL A u DyL 3 L 0A u A X x gtlt gtlt x H L L A3433 x x x x x L H L Ara AfEi x x x x H L l AHJ Am2 x x x x L H L A 51 A 52 Aui39 v x x x H L L w L A Away x x x L H L A3753 Ara x x x H L L We AFEL x x x L H L Avag ArEy H L L H L L jean AVE L H L L H L A a A E x X H L I H Area Ara L L L N H L Aka ArEy H H L L L L n MGH wage Levev L e LOW IDLrage Lem x 7 meazsnm ENGN112 L15 Magnitude Comparator and Multiplexers Octobers 2003 Ma nitude Com arator Realworld application Thermostat controller Temp sensor Q D 74HC85S as in Fig 937 Keypad Analog 0 todigital 8 converter 39 A7 Keypad Bo encoder l8 and registers 37 ENGIN112 L15 Magnitude Comparator and Multiplexers OAgtB OAB OAltB CLR SET Furnace controller October 6 2003 Multiplexers 0 Select an input value with one or more select bits 0 Use for transmitting data 0 Allows for conditional transfer of data 0 Sometimes called a mux 1 3 10 0 31 M v 11 1 1 S 39 r gt07 S 21 Logic diagram b Block diagram Fig 4 24 2 t0 1 Line Multiplexer ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 5 2003 4 to 1 Line Multiplexer Functicnn tame 31 SD Y U 0 DD U 1 1 1 U 1 ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 6 2003 Quadruple 2 to 1Line M ultiplexer A Av Funcimn tame E s OmDuW a x Mo s i o SeieciA I i Seiecia 53 Notice enable bit 5 Notice select bit seieni o 4 bit inputs E isnabia Euclimz L15 mamme Cnnurlnr Ind Mmmlmus omnhus2nn1 Multiplexer as combinational modules Connect input variables to select inputs of multiplexer n1 for n variables Set data inputs to multi exer equal to values of function for correspon ing assignment of select variables Using a variable at data inputs reduces size of the multiplexer 4gtlt1MUX y 50 x 51 x y z F 0 O 0 0 0 0 1 1 FZZ Z 0 0 1 0 1 r O 1 1 0 Fz Z 1 1 0 0 0 0 2 1 0 1 0 F20 1 1 0 1 1 3 1 1 1 1 F21 a Truth table b Multiplexer implementation Fig 4 27 Implementing a Boolean Function with a Multiplexer ENGIN112 L15 Magnitude Comparator and Multiplexers October 6 2003 Implementing a Four Input Function with a Multiplexer A B C D F H 0 D 0 D FD U 0 U 1 1 D C 1 1 1 U 391 U 1 D 11 1 1 0 FD 1 1 1 U 1 0 D U D FO 1 Cl39 Cquot 1 U 1 0 1 o u FZD 1 0 1 1 1 1 1 Cl 0 1 F1 1 391 U 1 1 1 1 1 C1 1 F21 1 391 1 1 1 ENGN112 L15 Magnitude Comparator and Multiplexers 03 D1 0 1 gt07 1 Nmm hmm lD Bx iMUK October 6 2003 Typical multiplexer uses R E El R32 R R4 l l n 1 1 2 l ELLt MUK A MUX B 3 H Fur nbit operands Mum A AI R and Munta replicated n times 39 and Gunnected to the curresponding bit 5 of the input vect rs FLJ MCTIGNAL f quot UNIT Example SelA 1 SEIB 2 Z lH1Fl3 lamLB Flynn 921 Multiplexer example atquot use ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 6 2003 Th reestate ates A multiplexer can be constructed with threestate gates Output state 0 1 and highimpedance open ckts If the select input E is 0 the threestate gate has no output 74L8125 74L8126 A gt 4 x A x Opposite true here E E No output ifE is 1 E X E x 0 A 0 HI Z 1 Hi Z 1 A a b ENGN112 L15 Magnitude Comparator and Multiplexers October 62003 Threestate gates A multiplexer can be constructed with threestate gates Output state 0 1 and highimpedance open ckts If the select input is low the threestate gate has no output Select a 2to1 line mux ENGN112 L15 Magnitude Comparator and Multiplexers 10 51 Select 2 X 4 1 o decoder 2 Enable EN b 4 to 1 line mux October 6 2003 Summary Magnitude comparators allow for data comparison Can be built using andor gates Greaterless than requires more hardware than equality Multiplexers are fundamental digital components Can be used for logic Useful for datapaths Scalable Tristate buffers have three types of outputs 0 1 highimpedence Z Useful for datapaths ENGN112 L15 Magnitude Comparator and Multiplexers OCtOber 6 2003
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