Computer Architecture - Sections 1.7-1.10
Computer Architecture - Sections 1.7-1.10 CS 3340
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This 4 page Class Notes was uploaded by Aaron Maynard on Tuesday August 30, 2016. The Class Notes belongs to CS 3340 at University of Texas at Dallas taught by in Fall 2016. Since its upload, it has received 56 views. For similar materials see Computer Architecture in Computer Science and Engineering at University of Texas at Dallas.
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Date Created: 08/30/16
COMPUTERARCHITECTURE FALLSEMESTER2016 INSTRUCTOR:DR.KARENMAZIDI firstname.lastname@example.org 30 August 2016 - Chapter 1 Continued These sets of notes will be covering the subjects covered in CS 3340.003 (and other). This packet will cover topics within Chapter 1 of Computer Organization and Design, Fifth Edition: The Hardware/Software Interface by Patterson and Hennessay. Any material on these pages include but are not limited to presentational slides provided by the profe or. Each s ay contain concluding remarks at the end of each set. The Power Wall The Central Processing Unit (CPU)–the component that has defined the performance of computers for many years–have hit quite a few walls. ● Memory b ottlenecks (the bandwidth of the channel between the CPU and a computer’s memory) ● Instruction level parallelism (ILP) wall (the availability of enough discrete parallel instructions for a multi-core chip) ● Power wall (the chip’s overall temperature and power consumption). Of the three, the power wall is now arguably the defining limit of the power of the modern CPU. As CPUs have become more capable, their energy consumption and heat production has grown rapidly. 1 CMOS CMOS, is technology for making low power integrated circuits, acting like a semiconductor. In today's CMOS chips, dynamic energy consists of most of the energy and heat in computer chips. Static energy is lost as leakage when the power is off. Increasing the number of transistors increases the power dissipation even when the power is off. Multiprocessors Multicore microprocessors contain more than one processor (core) per chip. They require explicitly parallel programing. Parallel programing can be compared with instruction level parallelism, where the hardware executes multiple instructions at once and is hidden from the programmer. Parallel programming can be hard to do. The programmer begins to write code for performance, load balancing and to optimize communication and synchronization. 2 Benchmarking In computing, a benchmark is the act of running a computer program, a set of programs, or other operations, in order to assess the relative performance of an object, normally by running a number of standard tests and trials against it. The Standard Performance Evaluation Corporation (SPEC) is a non-profit corporation formed to establish, maintain and endorse a standardized set of relevant benchmarks that can be applied to the newest generation of high-performance computers. CINT2006 for Intel Core i7 920 Pitfalls and Fallacies One of the many pitfalls in developing electronics is expecting the improvement of one aspect of a computer to increase overall performance by an amount proportional to the size of the improvement. In computer architecture, Amdahl's law (or Amdahl's argument) gives the theoretical speedup in latency of the execution of a task at fixed workload that can be expected of a system whose resources are improved. In other words, it is used to find the maximum 3 expected improvement to an overall system when only part of the system is improved. It is often used in parallel computing to predict the theoretical maximum speedup using multiple processors. Another fallacy is that computers utilize little to no power while at idle. This is simply not the case. Take a look back at the i7 chip power benchmark. ● At 100% load: 258W ● At 50% load: 170W (66%) ● At 10% load: 121W (47%) According to research at the Google Data Center, their infrastructure: ● Mostly operates at 10% – 50% load ● At 100% load less than 1% of the time MIPS, or Millions of Instruction Per Second does not account for differences in ISAs between computers, nor the differences in complexity between instructions. CPI varies between programs on any given CPU. Conclusion The cost per performance for computers is vastly improving due to underlying developments in technology. The hierarchical layers of abstraction in both hardware and software are becoming more complex, as well as the instruction set architecture that comes along with the interface. Execution time has become the best performance measure. Power is a limiting factor, with only the use of parallelism to improve computer performance. 4
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