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Ch 1 and 2 Outline

by: Tiffani Friesendorf

Ch 1 and 2 Outline CS 271

Marketplace > Oregon State University > CS 271 > Ch 1 and 2 Outline
Tiffani Friesendorf
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Outline of week 1 assigned readings. (Only covers assigned sections CH1, CH2: 2.1, 2.2, 2.3, CH3: 3.1, 3.2, 3.3 (p.71), 3.4, 3.5) Covers basic concepts of the class and x86 Processor Architecture
Computer Architecture and Assembly Language
Stephen Redfield
Class Notes
Comp Sci, Computer, Computer Science, Assembly, Boolean, Microprocessors, Microprocessor, MASM, x86, Assembler, 32bit, 32-bit, ascii, CPU, memory
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Date Created: 10/01/16
Assembly and Arch CS 271 Book Notes: CH1, 2.1-2.3 Week 1 CH1 Basic Concepts Definitions • Assembler: utility program that converts source code programs from assembly language to machine language. • Linker: a utility program that combines individual files created by an assembler into a single executable program. • Debugger: lets you step through a program while it’s running and examine registers and memory. • Machine Language:Anumeric specifically understood by a computer’s processor (the CPU). • Assembly Language: Consists of statements written with short mnemonics such asADD, MOV, SUB and CALL. ◦ Has a one-to-one relationship with machine language: ▪ Each assembly language instruction corresponds to a single machine-language instruction. • Portable:Alanguage whose source programs can be compiled and ran on a wide variety of computer systems. ◦ Assembly is not portable as it is designed for a specific processor family. There are many assembly languages, each based on a processor family. • Micronode Interpreter:Aprogram inside the processor that translates assembly instructions during execution. ◦ Assembly language may be processed this way or it may directly match the computer’s architecture. • Virtual Machine: Hypothetical computer. ◦ Informally, a software program that emulates the functions of some other physical or virtual computer. • MSB (most significant bit): bit on the left. • LSB (least significant bit): bit on the right. • Character set: mapping of characters to integers. • Boolean expression: a boolean operator and one or more operands. Each represents a value of true or false. 1.1 Working With In This Class: • programming microprocessors compatible with Intel andAMD processors running under 32 and 64-bit versions of Windows. Assemblers : • for x86 systems: ◦ MASM – Microsoft Macro Assembler (what we will use in the course) ◦ TASM – TurboAssembler ◦ NASM – NetwideAssembler ◦ MASM32 – variant of MASM • for Linux: ◦ GAS – GNU assembler ◦ NASM – syntax most similar to MASM Assembly: • oldest programming language • bears closest resemblance to machine language • provides direct access to computer hardware • “low-level programming” language Types of Programs That Can Be Created Using MASM: • 32-bit Protected Mode: (32-bit mode) These programs run under all 32-bit versions of Windows. ◦ Usually easier to write and understand than real-mode programs. • 64-bit Mode: 64-bit programs run under all 64-bit versions of windows. • 16-bit Real-Address Mode: 16-bit programs run under 32-bit versions of Windows and on embedded systems. ◦ Not supported by 64-bit Windows. How do C++ and Java relate toAssembly Language: • High-level languages have a one-to-many relationship with both assembly and machine language. 1.2 Virtual Machine Concept • Acomputer can usually execute program written in its native machine language, in this example L0 ◦ Each instruction is simple enough to be executed using a relatively small number of circuits. ◦ Programmers have a difficult time writing in L0 because it is extremely detailed and consists of only numbers. • Program L1 is easier to use. To achieve this: ◦ Interpretation:As the L1 program is running, each of its instructions could be decoded and executed by a program written in language L0 ▪ L1 runs immediately, but each instruction must be decoded before it can execute. ◦ Translated: The entire L1 program could be converting into a L0 program by a L0 program specifically designed for this purpose. ▪ The resulting L0 program could be executed directly on the computer hardware. Virtual Machines • Easier to think of as a virtual machine. ◦ VM1: can execute commands written in language L1 ◦ VM0: can execute commands written in language L0 ◦ Each virtual machine can be constructed of either hardware or software. ▪ Program can be written for VM1 and programs can be executed directly on the hardware if practical. ▪ Or VM1 programs can be interpreted/translated and executed on machine VM0 ◦ VM1 cannot be radically different than VM0 bc the translation would take too long. ▪ If the language VM1 supports isn’t programmer friendly enough, VM2 can be designed which is more easily understood. ▪ This process can be repeated until a virtual machine VMn can be designed to support a powerful, easy-to-use language. ◦ Java based on virtual machine concept. Specific Machines • Level 2 = VM2 • Level 1 = VM1 • Computer’s digital logic hardware represents machine Level 1 • Above this, Level 2, or instruction setArchitecture (ISA) ◦ First level users can typically write programs. ▪ These programs consist of machine code, or binary. • Instruction SetArchitecture (Level 2): ◦ Processors designed with an instruction set to carry out basic operations. ▪ This is machine language. ◦ Each machine-language instruction is executed either directly by the computer’s hardware or be a microprocessor embedded program (microprogram) • Assembly Language (Level 3): ◦ Above ISAlevel is assembly language. ◦ Assembly languages are translated in their entirety into machine language before they execute. • High-Level Languages (Level 4): ◦ C, C++, Java, etc. ◦ Contain powerful statements that translate into multiple assembly language instructions. You can see the translation by examining the listing file output created by a C++ compiler. 1.3 Data Representation Binary Integers • Binary numbers: base 2 numbers. ◦ Each binary digit is a bit. ◦ Bits are numbered sequentially starting at zero on the right side and increasing toward the left. ◦ MSB (most significant bit): bit on the left. ◦ LSB (least significant bit): bit on the right. Unsigned Binary Integers • Starting with LSB, each bit in an unsigned binary integer represents an increasing power of 2. • Binary Bit Position Values n n 2 Decimal Value 2 Decimal Value 20 1 28 256 21 2 29 512 2 10 2 4 2 1024 3 11 2 8 2 2048 24 16 212 4096 25 32 213 8192 26 64 214 16384 7 15 2 128 2 32768 Translating Unsigned Binary Integers to Decimal • Weighted positional notation: a convenient way to calculate the decimal value of an unsigned binaryn-1teger havinn-2 digits: 1 0 dec = (D n-1 ) + (D * n-2 + … + (D * 2 ) 1 (D * 2 ) 0 ▪ D = binary digit. • ex: 00001001 = 9 3 0 • (1 * 2 ) + (1 * 2 ) = 9 (8 + 1 = 9) Translating Unsigned Decimal Integers to Binary • To translate an unsigned decimal integer into binary, repeatedly divide the integer by 2, saving each remainder as a binary digit. • Translate decimal 37 to binary: Division Quotient Remainder 37/2 18 1 18/2 9 0 9/2 4 1 4/2 2 0 2/2 1 0 ½ 0 1 ◦ Concatenate the binary bits from the remainder column of the table in reverse order to produce binary: ▪ 37 = 101001 ▪ Comp storage always consists of binary numbers whose lengths are multiples of 8, fill in the remaining digit positions on the left with 0’s. • 37 = 00101001 • Simple formula to find b, the number of binary bits you need to represent the unsigned decimal value n: ◦ b = ceiling (log 2) ▪ if n = 17, log 12 = 4.087463, raised to the smallest following int = 5. BinaryAddition • When adding two binary integers, proceed bit by bit starting with lower pair of bits (right), and add each subsequent pair of bits. • Ways to add binary bits: ◦ 0 + 0 = 0 ◦ 0 + 1 = 1 ◦ 1 + 0 = 1 ◦ 1 + 1 = 10 (binary 2) ▪ extra digit generates a carry to the next-highest position. carry 1 0 0 0 0 0 1 0 0 (4) + 0 0 0 0 0 1 1 1 (7) ___________ 0 0 0 0 1 0 1 1 (11) • When carry is generated out of the highest bit position: ◦ ex: 1 1 1 1 1 1 1 1 + 0 0 0 0 0 0 0 1 ▪ If storage location for the sum is at least 9 bits long it = 1 0 0 0 0 0 0 0 0. ▪ If it is only 8 bits long, it equals the lowest 8 bits of the calculated value: 0 0 0 0 0 0 0 0. Integer Storage Sizes • Basic storage unit for all x86 data is a byte (8 bits). • Storage units: ◦ Byte (8 bits) ◦ Word (2 bytes) ◦ Doubleword (4 bytes) ◦ Quadword (8 bytes) ◦ Double Quadword (16 bytes) • Large Measurements: Used when referring to both memory and disk space. 10 ◦ One kilobyte = 2 or 1024 bytes. ◦ One megabyte (1 MB) = 2 , or 1,048,576 bytes. ◦ One gigabyte (1 GB) = 2 , or 1024 , or 1,073,741,824 bytes. 40 4 ◦ One terabyte (1 TB) = 2 , or 1024 , or 1,099,511,627,776 bytes. ◦ One petabyte = 2 bytes. ◦ One exabyte = 2 bytes. 70 ◦ One zettabyte = 2 bytes. ◦ One yottabyte = 2 bytes. Hexadecimal Integers • Easier to read than large binary numbers. • Each hexadecimal integer represents four binary bits. ◦ 2 hexadecimal integers represent a byte. • Asingle hexadecimal digit represents decimal 0-15. ◦ Ato F represents decimal values in the range 10 through 15 Binary Decimal Hexadecimal Binary Decimal Hexadecimal 0000 0 0 1000 8 8 0001 1 1 1001 9 9 0010 2 2 1010 10 A 0011 3 3 1011 11 B 0100 4 4 1100 12 C 0101 5 5 1101 13 D 0110 6 6 1110 14 E 0111 7 7 1111 15 F • Binary number 0001 0110 1010 0111 1001 0100 is equivalent to hexadecimal 16A794 1 6 A 7 9 4 0001 0110 1010 0111 101 0100 Converting Unsigned Hexadecimal to Decimal • Each hexadecimal digit position represents a power of 16. • To convert from hexadecimal to decimal: ◦ 4 digit hexadecimal integer with subscripts: 3 2 D1D0 ◦ dec = (D *316 ) + (D 2 16 ) +(D 1 16 ) + (D 0 16 ) ◦ ex: hexadecimal 1234: 3 2 1 0 ▪ (1* 16 ) + (2* 16 ) +(3* 16 ) + (4* 2 ) = 4660 ◦ ex: 3BA4: ▪ (3* 16 ) + (11* 16 ) +(10* 16 ) + (4* 2 ) = 15,268 Converting Unsigned Decimal to Hexadecimal • To convert from decimal to hexadecimal, repeatedly divide the decimal value by 16, keep each remainder as a hexadecimal digit. • Translate 422 to hexadecimal: Division Quotient Remainder 422/16 26 6 26/16 1 A(10) 1/16 0 1 ◦ Start with last remainder and work forward: 422 = 1A6 HexadecimalAddition • Debuggers usually display memory addresses in hexadecimal. ◦ Often necessary to add two addresses in order to find a new address. • Hexadecimal addition works the same way as decimal addition, with a change of number base. • Add 2 numbers together x and y, with base b. ◦ Number digits from lowest position (x 0 to highest, and same with y. ◦ Add x +i i ▪ If sum s is less than b (16 in hexadecimal), move onto next digit. ▪ If sum is greater than b, recalculate ( s MOD b) keep remainder, carry over to next digit. ◦ ex: 6A2 + 49A ▪ Lowest digit position is 2 +A(2 + 10) = C (12) ▪ Next position A+ 9 = 19. • Carryover because 19 greater than 16. • 19 MOD 16 = 3 (remainder) ◦ Second digit is 3, 1 is carried to third position (16 goes into 19 once). ▪ Finally add carryover 1 + 6 + 4 = B (11) ▪ Hexadecimal sum is B3C Carry 1 X 6 A 2 Y 4 9 A ______ B 3 C Signed Binary Integers • in x86 processors, the MSB indicates the sign. • 0 = positive 0 0 0 0 1 0 1 0 • 1 = negative 1 1 1 1 0 1 1 0 Two’s-Complement Representation • Two’s-compliment representation uses the mathematical principle that the two’s complement of an integer is its additive inverse. ◦ If you add a number to its additive inverse, the sum is zero. • Useful to processor designers because it removes the need for separate digital circuits to handle both addition and subtraction. ◦ Ex:A– B is converted to an addition expression:A+ (-B) Binary Two’s-Compliment • Two’s complement of a binary integer is formed by inverting (complementing) its bits and adding 1. ◦ Ex: 0 0 0 0 0 0 0 1 ‘s two’s-compliment is 1 1 1 1 1 1 1 1 ▪ 1 1 1 1 1 1 1 1 is the two’s-compliment representation of -1. Starting value: 0 0 0 0 0 0 0 1 Step 1: Reverse the bits. 1 1 1 1 1 1 1 0 Step 2:Add 1 to the value from Step 1. 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 Sum: Two’s-compliment representation: 1 1 1 1 1 1 1 1 Hexadecimal Two’s-Compliment • As with binary, reverse all bits and add 1. • Easy way to reverse the bits of a hexadecimal digit is to subtract the digit from 15. ◦ Ex: 6A3D → 95C2 + 1 → 95C3 ▪ 95C3 → 6A3C + 1 → 6A3D Converting Signed Decimal to Binary • Algorithm to calculate the decimal equivalent of a signed binary integer: ◦ If the highest bit is 1, the number is stored in two’s-compliment notation. ▪ Create its two’s-compliment a second time to get its positive equivalent. ▪ Then convert this new number to decimal as if it were an unsigned binary integer. Starting value: 1 1 1 1 0 0 0 0 Step 1: Reverse the bits: 0 0 0 0 1 1 1 1 Step 2:Add 1 to the value from Step 1: 0 0 0 0 1 1 1 1 + 1 Step 3: Create the two’s-compliment 0 0 0 1 0 0 0 0 Step 4: Convert to decimal 16 • because the original integer was negative (started with 1), we know that it’s decimal value was -16. ◦ If the highest bit is 0, it can be converted as if it were an unsigned binary integer. Converting Signed Decimal to Binary • Convert the absolute value of the decimal integer to binary. • If the original decimal integer was negative, create the two’s compliment of the binary number from the previous step. ◦ Ex: -43 translated to binary: ▪ Binary unsigned 43 is 0 0 1 0 1 0 1 1 ▪ Because the original number was negative, create two’s compliment: • 1 1 0 1 0 1 0 0 + 1 = 1 1 0 1 0 1 0 1 Converting Signed Decimal to Hexadecimal • Convert the absolute value of the decimal integer to hexadecimal. • If the decimal integer was negative, create the two’s compliment of the hexadecimal number from the previous step. Converting Signed Hexadecimal to Decimal • If the first digit of a signed hexadecimal is >= 8 the number is negative. 8A20 Is negative. • If it is <= 7, it is positive. 7FD9 is positive. • If the hexadecimal integer is negative, create its two’s compliment. • If it is positive, leave it as is. • Using the integer from the previous step, convert it to decimal. If the original value was negative, add a negative sign. Maximum and Minimum Values • Asigned integer of n bits uses only n-1 bits to represent the number’s magnitude. • Ranges and Sizes of Signed Integer Types Type Range Storage Size in Bits Signed byte -2 to 2 -1 8 15 15 Signed word -2 to 2 -1 16 Signed doubleword -2 to 2 -1 32 Signed quadword -2 to 2 -1 64 127 127 Signed double quadword -2 to 2 -1 128 Binary Subtraction • Can subtract in the same way as decimal subtraction. • An easier method is to reverse the sign of the value being subtracted, then add the values. ◦ This requires an extra empty bit to hold the number’s sign. ◦ 0 1 1 0 1 – 0 0 1 1 1 ▪ negate 0 0 1 1 1 : 1 1 0 0 0 + 1 = 1 1 0 0 1 0 1 1 0 1 (13) 1 1 0 0 1 (-7) ________ 0 0 1 1 0 (6) Character Storage • Character set: mapping of characters to integers. • ASCII (American Standard Code for Information Interchange):Acharacter set that assigns a 7- bit integer to each character. ◦ The extra bit is used be various computers to make a proprietary character set. • ANSI (American National Standards Institute) Character Set defines an 8-bit character set that represents up to 256 characters. ◦ First 128 characters correspond to letters and symbols on a standard US keyboard. ◦ Second 128 characters represent special characters: ▪ letters in intl. alphabets ▪ accents ▪ currency symbols ▪ fractions • Unicode Standard: Universal way of defining characters and symbols. ◦ Defines numeric codes (code points) for characters, symbols, and punctuation used in all major languages. ◦ Three transformation formats are used to transform code points into display characters: ▪ UTF-8: used in HTML, same byte value as ASCII ▪ UTF-16: Used in environments that balance efficient access to characters with economical use of storage. • Recent Windows versions use this. • Each character is coded in 16 bits. ▪ UTF-32: Used in environments where space is no concern and fixed-width characters are required. • Each character is encoded in 32 bits. ASCII Strings • AnASCII string is stored in memory as a succession of bytes containingASCII codes. • null-terminated string:A string of characters followed by a single byte containing zero. ◦ used in C, C++, and many Windows OS’s ASCII Control Characters • ASCII Control Characters: 0 – 31 in theASCII character set. If a program writes these codes to standard output, the control characters will carry out predefined actions. • Commonly used control characters: ◦ 8 → backspace (moves one column to the left) ◦ 9 → horizontal tab (moves forward n columns) ◦ 10 → line feed (moves to next output line) ◦ 12 → form feed (moves to next printer page) ◦ 13 → carriage return (moves to leftmost output column) ◦ 27 → escape character Terminology for Numeric Data Representation • binary integer:An integer stored in memory in its raw format, ready to be used in a calculation. Binary integers are stored in multiples of 8 bits. • digit string:Astring ofASCII characters. • This is a representation of the number and can be in any of the formats shown for the decimal # 65: Format Value Binary digit string “0 1 0 0 0 0 0 1” Decimal digit string “65” Hexadecimal digit string “41” Octal digit string “101” 1.4 Boolean Expressions • Boolean algebra defines a set of operations on the values of true (1) and false (2). • NOT (¬, ~,´) ◦ Unary operator. ◦ Reverses a boolean value. • AND ( ∧ ) ◦ Binary operator. (requires two operands) ◦ Output is true only when both inputs are true. ◦ Often carried out at the bit level in assembly. ◦ Ex: ▪ x: 1 1 1 1 1 1 1 1 y: 0 0 0 1 1 1 0 0 AND ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ 0 0 0 1 1 1 0 0 • OR ( ∨ +) ◦ Binary operator. ◦ Output if false only when both are false. ◦ Ex: ▪ x: 1 1 1 0 1 1 0 0 y: 0 0 0 1 1 1 0 0 OR ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ 1 1 1 1 1 1 0 0 Operator Precedence 1. Parentheses 2. Not 3. And and Or Chapter 2 x86 ProcessorArchitecture 2.1 Basic Microcomputer Design • Central processing unit (CPU): Where calculations and logical operators take place. ◦ Contains: ▪ Alimited number of storage locations named registers. ▪ Ahigh frequency clock. • The clock synchronizes the internal operations of the CPU with other system components. ▪ Acontrol unit. • The control unit (CU) coordinates the sequencing steps involved in executing machine instructions. ▪ An arithmetic logic unit. • The arithmetic logic unit (ALU) performs arithmetic operations such as addition and subtraction and logical operations such asAND, OR, or NOT. ◦ Is attached to the rest of the computer via pins attached to the CPU socket in the computer’s motherboard. ▪ Most pins connect to the data bus, the control bus, and the address bus. • Memory Storage Unit: where instructions and data are held while a computer program is running. ◦ Receives requests for data from the CPU, transfers the data from random access memory (RAM) to the CPU, transfers data from CPU into memory. ◦ All processing of data takes place in the CPU, so programs residing in memory must be copied into the CPU before they can execute. ◦ Individual program instructions can be copied into the CPU one at a time, or groups of instructions can be copied together. • Bus: a group of parallel wires that transfer data from one part of the computer to another. ◦ Acomputer system usually contains four bus types: ▪ data: Transfers instructions and data between the CPU and memory. ▪ I/O : Transfers data between the CPU and the system input/output devices. ▪ control: uses binary signals to sync actions of all devices attached to the system bus. ▪ address: holds the addresses of instructions and data when the currently executing instruction transfers data between the CPU and memory. • Clock ◦ Each operation involving a CPU and the system bus is syncronized by an internal clock pulsing at a constant rate. ◦ Machine cycle/clock cycle: basic unit of time for machine instructions. ▪ length of a clock cycle is the time required for one complete clock pulse. ▪ The duration of a clock cycle is calculated as the reciprocal of the clock’s speed, which is measured in oscillations per second. • Aclock the oscillates 1 billion times per second (1GHz) produces a clock cycle with a duration of one billionth of a second (one nanosecond). ◦ Amachine instruction requires at least one clock cycle to execute, and few require an excess of 50 clocks. ◦ Instructions requiring memory access often have empty clock cycles called wait states because of the differences in speed in the CPU, system bus, and memory circuits. Instruction Execution Cycle • Instruction execution style: Apredefined sequence of steps to execute a machine instruction. ◦ Assume the instruction pointer register holds the address of the instruction we want to execute. Here are the steps: 1. CPU has to fetch the instruction from an area of memory called the instruction queue. Right after doing this, it increments the instruction pointer. 2. CPU decodes the instruction by looking at its binary bit pattern. This bit pattern might reveal that the instruction has operands (input values). 3. If operands are involved, CPU fetches the operands from the registers and memory. Sometimes, this involves address calculations. 4. CPU executes the instruction, using any operand values it fetched during the earlier step. It also updates a few status flags, such as Zero, Carry, and Overflow. 5. If an output operand was part of the instructions, the CPU stores the result of its execution in the operand. • Simplified version of the process: ◦ Fetch ◦ Decode ◦ Execute Reading from Memory • Computers read memory much more slowly than they access internal registers because reading a single value from memory involves four separate steps: • Place the address of the value you want to read on the address bus. • Assert (change the value of) the processor’s RD (read) pin. • Wait one clock cycle for the memory chips to respond. • Copy the data from the data bus into the destination operand. ▪ Each of these steps generally requires a single clock cycle. ▪ CPUs are often described in terms of their clock speed. • Accessing CPU registers usually takes one clock cycle. • Cache: a high-speed memory that stores the most recently used instructions and data which reduces the amount of time it takes reading and writing memory. • Aprogram is more likely to want to access the same memory and instructions repeatedly, so the cache keeps these values where they can be accessed quickly. • When a CPU begins to execute a program, it can look ahead and load the next thousand instructions (for example) into cache on the assumption they will be needed soon. • Cache hit: When a processor is able to find its data in cache memory. • Cache miss: When the CPU tries to find something in the cache and it isn’t there. • Cache memory for the x86 family has 2 types: • Level-1 cache (primary cache): Stored right in the CPU. • Level-2 cache (secondary cache): Slightly slower, attached to the CPU by a high-speed data bus. • Static RAM:Aspecial kind of memory chip cache memory is constructed from. • Does not have to be constantly refreshed in order to keep its contents. • Expensive. • Dynamic RAM: Conventional memory. • Must be refreshed constantly. • Much slower than static RAM, but also much cheaper. Loading and Executing a Program • Program loader: Utility that loads a program to memory. • After loading, the OS must point the CPU to the program’s entry point. ◦ Entry point:Address at which the program is to begin execution. • Detailed Process: ◦ The OS searches for the program’s name in the current disk directory. ▪ If cannot find the name, it searches a predetermined list of directories (paths) for the filename. • If still cannot find the filename, an error message is issued. ▪ If program is found, the OS retrieves basic info about the file from the disk directory, incl. file size and physical location on the disk drive. ◦ The OS determines the next available location in memory and loads the program file into memory. It allocates a block of memory to the program and enters information about the program’s size location to a table (descriptor table). ▪ OS may adjust the values of pointers within the program so they contain addresses of program data. ◦ The OS begins execution of the program’s first machine instruction (entry point).As soon as the program begins running, it is called a . ▪ The OS assigns the process an identification number (process ID), which is used to keep track of it while running. ◦ The process runs by itself. It is the OS’s job to track the execution of the process and to respond to requests for system resources. ▪ Ex resources: • memory • disk files • input-output devices 2.2 32-Bit x86 Processors Modes of operation • x86 processors have 3 primary modes of operation: ◦ Protected mode: Native state of the processor. ▪ All instructions and features are available. ▪ Segments: Memory areas programs are given. • Processor prevents programs from referencing memory outside of their assigned segments. ◦ Real-address mode: Implements the programming environment of an early Intel processor with a few extra features, such as the ability to switch into other modes. ▪ Useful if a program requires direct access to system memory and hardware devices. ◦ System management mode (SMM): Provides an operating system with a mechanism for implementing functions such as power management and system security. ▪ These functions usually implemented by computer manufacturers who customize the processor for a particular system setup. • Sub-mode virtual-8086 is a special case of protected mode. ◦ While in protected mode, processor can directly execute real-address mode software just as MS-DOS in a safe environment. ▪ If a program crashes or attempts to write data into the system memory area, it will not be affected by other programs running at the same time. ◦ Modern OS’s can execute multiple separate virtual-8086 sessions at the same time. Basic Execution Environment Address Space • In 32-bit protected mode, a task or program can address a linear address space of up to 4GB. • Extended physical addressing allows a total of 64GB of physical memory to be addressed. • Real-address mode programs can only address a range of 1MB. • If processor is in protected mode and running multiple programs in virtual-8086 mode, each program has its own 1MB memory area. Basic Program Execution Registers • Registers: high-speed storage locations directly inside the CPU, designed to be accessed at much higher speed than conventional memory. • General Purpose Registers: Primarily used for arithmetic and data movement. Specialized Uses • EAX is automatically used by multiplication and division instructions. ◦ Often called the extended accumulator register. • The CPU automatically uses ECX as a loop counter. • ESP addresses the data on the stack (a system memory structure). It is rarely used for ordinary arithmetic or data transfer. ◦ Often called the extended stack pointer register. • ESI and EDI are used by high-speed memory transfer instructions. ◦ Sometimes called extended source index and extended destination index. • EBP is used by high-level languages to reference function parameters and local variables on the stack. It should not be used for ordinary arithmetic or data transfer except at an advanced level of programming. ◦ Often called the extended frame point register. Segment Registers • In real-address mode, 15-bit segment registers indicate base addresses of preassigned memory areas named segments. • In protected-mode, segment registers have pointers to segment descriptor tables. • Some segments hold program instructions (code). • Others hold variables (data). • Stack segment holds local function variables and function parameters. Instruction Pointer • The EIP (Instruction Pointer) register contains the address of the next instruction to be executed. • Certain machine instructions manipulate EIP, causing the program to branch to a new location. EFLAGS Register • EFLAGS (Flags) register consists individual binary bits that control the operation of the CPU or reflect the outcome of some CPU operations. • Some instructions test and manipulate individual processor flags. • Aflag is a set when it equals 1; it is clear (or reset) when it equals 0. Control Flags • Control the CPU’s operation. Control flags can: ◦ Break after every instruction executes. ◦ Interrupt when arithmetic overflow is detected. ◦ Enter virtual-8086 mode. ◦ Enter protected mode. • Programs can set individual bits in the EFLAGS register to control the CPU’s operation. ◦ Ex: Direction and Interrupt flags. Status Flags • Reflect the outcomes of arithmetic and logical operations performed by the CPU, and are: ◦ Carry (CF): Set when the result of an unsigned arithmetic operation is too large to fit into the destination. ◦ Overflow (OF): Set when the result of a signed arithmetic operation is too large or too small to fit into the destination. ◦ Sign (SF): Set when the result of an arithmetic or logical operation generates a negative result. ◦ Zero (ZF): Set when the result of an arithmetic or logical operation generates a result of zero. ◦ Auxiliary Carry (AC): Set when an arithmetic operation causes a carry from bit 3 to bit 4 in an 8-bit operand. ◦ Parity (PF): Set if the least-significant byte in the result contains an even number of 1 bits. Otherwise, PF is clear. In general, it is used for error checking when there is a possibility that data might be altered or corrupted. MMX Registers • Improves performance of Intel processors when implementing advanced multimedia and communications applications. • Eight 64-bit MMX registers support special instructions called SIMD (Single-Instruction, Multiple-Data) • MMX instructions operate parallel on the data values contained in MMX registers. • MMX register names are aliases to the same registers used by the floating-point unit. XMM Registers • x86 structure contains either 128-bit registers called XMM registers. • Used by streaming SIMD extensions to the instruction set. Floating Point Unit (FPU) • Performs high-speed floating-point arithmetic. Integrated into the main processor chip. • Eight floating-point data registers in the FPU names ST(0) – ST(7). x86 Memory Management • x86 processors manage memory according to the basic modes of operation. • Protected mode is the most robust and powerful, but restricts application programs from directly accessing system hardware. ◦ Processor can run multiple programs at the same time. ◦ Assigns each process a total of 4GB memory. ◦ Each program can be assigned its own reserved memory area. ◦ Programs prevented from accidentally accessing each other’s code and data. ◦ Both Windows and Linux run in protected mode. 2.3 64-Bit x86-64 Processors • 64-bit extension of x86. ◦ It is backward-compatible with x86 instruction set. ◦ Addresses are 64 bits long, allowing for a virtual address space of size 2 bytes. In current chip implementations, only lowest 48 bites are used. ◦ It can use 64-bit general-purpose registers, allowing instructions to have 64-bit integer operands. ◦ It uses eight more general-purpose registers than the x86. ◦ It uses a 48-bit physical address space, which supports up to 256 terabytes of RAM. ◦ When running in native 64-bit mode, these processors do not support 16-bit real mode or virtual-8086 mode. 64-Bit Operation Modes • Compatibility Mode ◦ When running compatibility mode, existing 16-bit and 32-bit applications can usually run without being recompiled. ▪ 16-bit Windows and DOS will not run in 64-bit Windows. ▪ There is no virtual DOS machine subsystem for Windows 64-bit. • 64-bit Mode ◦ Processor runs applications that use the 64-bit linear address space. ◦ Native mode for 64-bit Windows. ◦ Enables 64-bit instruction operands. Basic 64-Bit Execution Environment • Addresses can theoretically be 64-bits, but processors currently only support 48 bits for addresses. • Most important differences in registers from 32-bit processors: ◦ Sixteen 64-bit general purpose registers (in 32-bit mode there are only eight general-purpose registers) ◦ Eight 80-bit floating point registers. ◦ A 64-bit status flags register named RFLAGS (only lower 32-bits are used). ◦ A64-bit instruction pointer named RIP. ◦ Registers specialized for multimedia processing: ▪ Eight 64-bit MMX registers. ▪ Sixteen 128-bit XMM registers (in 32-bit mode, you only have 8)


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