Introd to Digital Logic Design
Introd to Digital Logic Design EECS 140
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This 1 page Class Notes was uploaded by Melissa Metz on Monday September 7, 2015. The Class Notes belongs to EECS 140 at Kansas taught by Staff in Fall. Since its upload, it has received 12 views. For similar materials see /class/186808/eecs-140-kansas in Elect Engr & Computer Science at Kansas.
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Date Created: 09/07/15
EECS 140 141 Topics included in the second exam to be held on 04 16 2009 for Tu amp Th Section On 04152009 for M W F Section Chapter 4 44 lncompletely specified functions 45 Multipleoutput circuits 47 Analysis of multilevel circuits Chapter 5 51 Conversion between different forms of number representation 52 Addition of unsigned numbers Ripple Carry Adder 53 Negative numbers especially 2 s complementary arithmetic 535 Arithmetic overflow 541 Carrylookahead adders Follow class notes too 56 Multiplication 572 Floating Point Numbers 58 ASCII Code Chapter 6 61611 Multiplexers synthesis of a logic function 62 Decoders designing one large decoder using several small decoders demultiplexers 63 encoders 64 Code converters 65 Arithmetic comparison circuits 68 Shifter and Barrel Shifter Chapter 7 71 Basic Latch and Characteristic Table 72 Gated SR latch 73 Gated D latch
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