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by: Brandon Douglas


Brandon Douglas
GPA 3.75


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Class Notes
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This 2 page Class Notes was uploaded by Brandon Douglas on Friday September 18, 2015. The Class Notes belongs to EEL 4712 at University of Florida taught by Staff in Fall. Since its upload, it has received 5 views. For similar materials see /class/206843/eel-4712-university-of-florida in Electrical Engineering at University of Florida.

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Date Created: 09/18/15
4 VHDL Describes Behaviour In Section 12 we stated that the behaviour of a digital system could be described in terms of programming language notation The familiar sequential programming language aspects of VHDL were covered in detail in Chapter 2 In this chapter we describe how these are extended to include statements for modifying values on signals and means of responding to the changing signal values 4 1 Signal Assignment A signal assignment schedules one or more transactions to a signal or port The syntax of a signal assignment is signaliassignmentistatement target lt transport waveform target name l aggregate waveform waveformielement waveformielement waveformielement valueiexpression after timeiexpression l null after timeiexpression The target must represent a signal or be an aggregate of signals see also variable assignments Section 241 If the time expression for the delay is omitted it defaults to 0 fs This means that the transaction will be scheduled for the same time as the assignment is executed but during the next simulation cycle Each signal has associated with it a projected output waveform which is a list of transactions giving future values for the signal A signal assignment adds transactions to this waveform So for example the signal assignment 5 lt 39039 after 10 ns will cause the signal enable to assume the value true 10 ns after the assignment is executed We can represent the projected output waveform graphically by showing the transactions along a time axis So if the above assignment were executed at time 5 ns the projected waveform would be When simulation time reaches 15 ns this transaction will be processed and the signal updated Suppose then at time 16 ns the assignment 5 lt 39139 after 4 ns 39039 after 20 ms were executed The two new transactions are added to the projected output waveform 471


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