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Power Electronics I

by: Sarina Wintheiser

Power Electronics I ECE 562

Sarina Wintheiser
GPA 3.8


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This 143 page Class Notes was uploaded by Sarina Wintheiser on Tuesday September 22, 2015. The Class Notes belongs to ECE 562 at Colorado State University taught by Staff in Fall. Since its upload, it has received 15 views. For similar materials see /class/210289/ece-562-colorado-state-university in ELECTRICAL AND COMPUTER ENGINEERING at Colorado State University.

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Date Created: 09/22/15
LECTURE 18 Switches and Switch Stress The Concept of Safe Operating Area for a Device l Ideal Switch Characteristics Block V with IOFF a 0 Pass il with VON a 0 Zero switching delay and its benefits Power loss due to switches zero in every way 1 LOSS RON 0 VON 0 2 Switching Loss No delays no device stored charge E No stray LIo or CIo for undesired ringing Dowgt F Real Switches 1 Limited quadrants of operation for real solid state switches a One quadrant and device example ll Active Switch Stress S and Switch Utilization U A General Definitions sw sw Sactive V Irms per SWItch off 011 U E w per switch B Case of Flyback Converter Voff VgD Dept for on J5 Umax C Table of Umax and Dopt for various Converters Power Semiconductor technology map Silicon carbide FETS I MOSgated thyriStors IGBT I MOSFET I Bipolar transistors l 1950 70 80 90 2000 2010 Year The above selection of solid state switches will be matched to the D through the device and the VD across the device as determined by detailed circuit analysis in the next few lectures Analysis of VD and D will follow the same procedure as MD LECTURE 18 Switches and Switch Stress The Concept of Safe Operating Area for a Device A Ideal Switch Characteristics There are five characteristics of a SPST M switch You make think of a semiconductor power switch as you do of a light switch at home It operates with no concern for losses in either the on or the off state V 1 Block V with it 0 m leakage current flows when off 2 VSWON a 0 at all it either ii flow allowed 3 Switch onoff or offon transitions occur with zero delay or instantaneous response time Therefore even for finite V and l during the switching the energy E VAt required to switch is near zero because the switch time is assumed to be zero Removing this assumption is the first step to understanding real switches that operate at fsw Even if the switch transitions lose only a little energy and with a fast switch time they switch at 100kHz to 1 MHz so that over one second close to a million transitions occur each adding to the total lost energy 4 Power required to drive the switch is negligible No DC 4 losses nor any dynamic switching loss Typically a switch driver controls 1001000 times the power it dissipates However for some devices this drive power can approach 10 of the energy switched as we will see 5 No device capacitance is charged or discharged during VOFF or VON states No charge Q is stored in semiconductor devices No inductor current i storage occurs during the on state due to either real inductors or due to leakage inductance s of cores or due to wiring Hence no additional stored energy flows to stress the switch via either lmax and Vmax Removing this assumption is the another big step to truly understanding switch losses In summary an ideal switch is able to pass currents bidirectionally or to block voltages bidirectionally 1 Note that SPDT 2 switches may be lt modeled by two synchronized or commutated SPST switches One is on while Vg two is off and vice versa The ideal switch model now needs to be deconstructed assumption by assumption to better appreciate switch losses which account for 515 of total loss depending on the specific conditions of the PWM converter involved VVV B Real Switches There are five types of real switches we will predominantly deal with in power electronics diodes bipolarjunction transistorsBJT gate turnoffthyristorsGTO field effect transistorsFET and insulated gate bipolartransistorslGBT each of which has unique Vl characteristics shown below Five types of Real Switches Switch Property 1 Passes current in one direction blocks in the other 1 Diode 2 Passes or blocks current in one direction 2 BJT 3 Can pass in one direction or block in both directions 3 GT0 4 Can pass in both directions but blocks in only one direction 4 FET 5 Passes or blocks current in one direction 5 IGBT Device Symbol 1 Diode lt1gtlgt 2 BJT 3 GT0 gt 4 FET 1T including body diode 5 IGBT U We need to realize that each switch has unique and limited turnon and turnoff characteristics Hence depending on what is required in terms of current passing through the device when it is on and voltage that the device is required to block when it is off we may have only one choice for a switch regardless of cost Of course some circuit circumstances allow for us to choose from several switch possibilities perhaps introducing cost as a final determining factor Below we examine the diode and transistor switches briefly in a four quadrant Vl space to introduce the concept of safe operating area SOA for the specific switch This is a rule of thumb that is easy to define and provided by each switch manufacturer to guide the user For any real semiconductor switch as opposed to mechanical switches multi quadrant operation is never easy unless we employ series and parallel combinations of our five main switches i Four quadrant operation is not possible in single device solid state switches To achieve four V quadrants one needs several devices in various seriesparallel combinations a One quadrant switches i B sw A is A switch A i i switch B Pnp on L L on bipolar V9 V MOSFET Q V switch A switch B V off off SW B l8 Diode other Note the difference between bipolar transistors only oneway current flow and MOSFETs bidirectional current flow Also the bipolar of a different type can indeed stand off the opposite polarity but current flow is oneway the other way The key to consider in one quadrant switches is the Vmaxoff and lmaxon levels the switches are subjected to by circuit conditions 7 A VA iLt NYE gt To help thinking consider I i the specific example of Vg 1 vB both switches above in a iB At T buck converter Several simple one quadrant switches are as shown below for both switches SW A SW B a 1 b C I V i stands off 1 StallsC15 Off i V i out on o f 9 1 off v V i COI V O O BJT and IGBT symbols a and their idealized switch characteristics b Diode symbol and its ideal characteristics The dynamic behavior during switching from a static offon state to the other static state depends both on the switch device and the circuit In the figure below we show three curves 1 Perfect Switch trajectories 2 Typical turnon Vl trajectory 3 Typical turnoff Vl trajectory Tum an r a a mum m mmquot mm t out Tum cm duvml m mum plum on Swnch cunemvs wattage shuwrngthe wtchrngtratemunes The safe operattng area as obtatned rorn the manufacturers devtce specmcattons must he WeH outstde swttchmg trajectones as shown betow MaanacmvevsSpecmcattumm l 51 up g v on Smtchmghajemmteswnhm sate uperatng area Swttch manufacturers atso provtde esttmated devtce swttchtng ttmeS based on operatmg condtttons to better esttmate the energy ost durtng swttchtng W W at Ftrst tets retresh our memory on brpotar dtode and tranststor DC n z 3 339 3 a 2 o o a e ro of hese that these power etectronrc verstons even vaguety resernbte the rnrcroetectronrcversrons espectaHyforFET s Stat c mode s of dwodes nvo ve the foHoWH vg Rm For HW 4 from the MURSOAOPT dwode data book for oraouoe obtam aH threeva ue Ran 0 015 Run 40 rm and van 0 94 y mm my a Mullwm m a Stave characte shcs do not teH the m story of any devwce kae peop ethe dynarmc oharaotensuos mayrevea new and unexpected behavwor Forexam we the van forthe dwode aooye does have a onefyonage overshoot when dnyen oya cons ant dynarmc mode of dwode operauon as the dynarmc w 5 um de Inna lururd volrlg Dmdnurrznl Furwavd vecuvevychavamen mm 3 mm A stanc npn bwpo artranswstor mode Shomd mvo ve the foHong vames W0 PM Vm For HW4 from the measured trans stor charactenst cs be oW forprachce obtam Run 34 m0 and Van 0 08 V SOOmA NoNlZulv XOOmV nrrsEY 0 Vdiv ma WWW a m an t am New m r w M MN The dtscusston otthe th rtstor the gate tumroffthyrtstor and the tnsutateo gate otpotartranststorwm have to awat a more qu descnptton of these untque Swttches Thts Wm occur H v tater tec ures ActiveSwitch Stress and the Concept of witch Utiliza ion We Wm oetow tntroduce quantatatton to the concept of Sthch stress Vta a terrn s and atso tntroduce an engtneertngterm U to the ctrcutt need ofth t ttch Thef e e omparedto the 80 t h h manufacturer to avotd Sthch fame and h us d as t t anSWe Short 0 Wh t not We are Myutthzmg a chosen swttch tnthe specmc ctrcutt to better access the costs on the out of taorng What cornohcates the matter t5 that s an eoeno on the duty cycte usmg tradeoffs to be made H v any conve rdestgn betweenthe power swttches and the controHer condtttons aHoWed A General Sactive only The cost ofmanyPWM converters t5 prtmanty the expenstve sohd state actwet drtven swttches as WeH as the passtve dtode th hes Fora ctrcutt 0M such swttches 2 m m no m 3 11 o 39 eak S total sw1tch E Z V p K 011 stress k blocklng HHS This sum 8 depends both on V blocking levels and current on levels as well as topology of the circuit and use of isolation transformers with known turns ratios Ringing due to leakage inductance s only adds to peak voltage stress We want to minimize this stress yet still have maximum power flow And we want to use the cheapest switch possible to make more profit on the PWM converter Pload Sactive U although typically it is a value lt1 depending on the operating point using transformers Utilization a We want to maximize B Case of Flyback Converter with m transistor a Find peak blocking voltage stand V0 1n a Vtr V 7 Lm D1 C ltV g n vg lt and E 2 V0 2 2 OH 11 Dr 11 Dr stand D Vg Vtr V 1 7 This Isa eak value off g D D p b Find the rms current for i I z is onconditions o it in the IQ1RMS lg rms d DT 39 magnetic cogevices Q1 1 PleadVg 8 active is the transistor stress Sactive E VTRo 1Q1rms Vg 15 vgl D39 Pload c Utilization sactive 1 Lets find Poad in terms of Volo for dc converter Notice the three different currents in the flyback lg from dc input source IQ Dmagnetics o into the load magneticsD N the current in the magnetics 1D D39n Io DI I 7 V9 KK Vo n lt I IgD Poad Volo v0 I 2 Sactive should be in same variables as Poad to get Ufyback 15 S yback Vng and Vg 2 V0 2 i D V0 1 S r 7 same variables as P load for f back 11 rD y Pload yback Z V01 Sactive yback E 1 J5 U yback D39 5 11 To find Umaxfyback versus D use dVdD 0 dVdD m 0 8D 12 012 320 2 0 thus D 13 U 38 umax 0385 at D 13 for 1 transistor flyback l D ITr on 13 VTrOff D 13 minimizes the product of Vtr0ff In on rms We know a maximum occurs between D 0 V 0 and D 1 V 0 forthe flyback However UmaX is not the only issue so D UmaX is a starting point all other issues neglected In design we have some fixed quantities such as V0 V9 and load power Volo product Then D and n for example are free to choose Summarize transformerisolated flyback E B IQrms 1J5 Vg 11 D weft VD Given E fixed we can trade off n vs D to achieve E Vg Vg Since E nD two extremes are 1 D gt 10 gt n l Vg D39 but this means for fixed V0 V9 T which causes Vtroff T 2 D gt 0 gt n T on secondary but for fixed Vout this causes ltron T D z13 a good first guess 3 General Table of Switch Utilization for Six Major Converters Table 61 Active switch utilizations of some common dcdc converters single operating point Converter UD max UD max UD occurs at D 1 Buck JB 1 1 2 Boost g 0 5 OO 3 Buckboost flyback nonisolated SEPIC NB i0385 13 isolated SEPIC nonisolated Cuk isolated 3J3 nonisolated Cuk 4 Forward n1 n2 1 0353 12 2 5 2J5 5 Other isolated buckderived converters Q 0353 1 isolated have full bridge halfbridge pushpull 2v 2J5 Ul 6 Isolated boostderived converters full D39 l 0 bridge pushpull 2 1D 2 Flyback line 3 you sacrifice U to achieve inputoutput isolation Some comments are a Line 3 flyback results also work for other converters b Line 2 boost without trf isolation L gt Vg C R gtVo gt Vg D 0 Tr is always off diode always on U PS then goes to a large value No lon stress but Voff stress D 0 gives maximum utilization but Vo V9 is limited c Line 6 only get a maximum switch utilization U 2 at D0 Add transformer isolation to boost to get clc isolation BUT Voff on switches increases WIN WIN Case d Line 5 fullbridge buckderived Given Vg 500 V0 an9 V0 5 P0 kW is a fixed constraint Choose n gt 100 because D gt 1 and at D 1 Umax 35 the best we can hope for 16 Pload kW W gt Sact1veUmaX 375 29 kVA Smax Compare to line 1 nonisolated buck Vo DVg and Vg500Vo5 lokW gt D must be 01 kW gtUmaX 1S 10kVA In summary the tradeoffs with extra cost of transformers and core reset complexity we find isolated buck nonisolated U higher U lower Slower 8 higher A reminder grading in this course is 60 HW We are doing this weekly So far we had HW1 Chapter 2 Erickson Pbms 2346 and class note questions HW2 Chapter 3 Pbms 67 of Erickson and class note questions HW3 Chapter 6 Pbms 67 of Erickson and class note questions HW4 Chapter 4 Erickson Pbms2456 and class note questions Note that we reassigned HW pbm 611 which is now a design problem due for your midterm exam not in HW 3 See section 642 to guide you As a help to Erickson s Chapter 4 HW problems below we give a converter circuit analyze its DC states of operation to find the maximum or worst case DC voltage and current requirements of the switches employed in that specific circuit topology These maximums set by the circuit must be exceeded by the manufacturers device specifications under all conditions of operation There will be both DC maximums and transient maximums b n mgto F I 3535 I m b o gt I gt0 u m V I mgtmo gt o I S gtmgtorgtouo Fgtbmgtausgt gtb S agt 55 H NS NI 0 mocm n ommogt T o mocm n ommogt gtumgt gt m3 N H 8 m3 N H 8 F I H F0 N H F0 gtusgt gtmgtrgtusgt S n Sgt mgt n Sgt co ngtgtmEo mgtgtm to ngtgtmEo mgtgtm mmgtm OD 9 gtgt tmgm gtgt mgtgt lsec balance on C I01 Dlz D I1 V I2 E DV 391 D R The above equations give the equations for the DC operating voltages Now we consider values of Voff and lon for both switches Maximum DC switch ratings will be functions of both circuit values and switching duty cycles but will not vary with fSW VOFF and ION for switch a D vavg vL1vg Dvg D D vg ia vavg v DV v 39a392391E5E D R Vb Vg V1 VgD vgv1 Ib I1I2 DV DVg ib D39R R DIZR lb lt0 HW4 problem 46 of Erickson is a also a one quadrant switch ECE 562 Week 2 Lecture 2 Week 2 Lecture 2 Summary Section notes Slides 37 Converter applications Slides 818 Improving waveforms Slides 1921 Commercial apps and Slides 2232 Resonant converters Slides 3453 Ripple characteristics and calculations Slides 5461 Circuit topology and losses LEOYURE llllmdun an m Pawnr Elnclronlu clmun Topoloam Thu aIn Thm POWER ELECTRONICS CIRCUIT TOVOLDGIES v A ovawlzw I d39 h 339 w mpomsv 3 ST IncuII N 11 In K 0051 TOPOLOGY E COMPARISVDN OF THE 376 THREE II TOPOLOGV OF L OUTPUT ILTERS ALWAYS lomlsd ACROSS v H L LOCATED BETWEEN CRUDE UNFILTERED VI AND SYABILILED V L BUCK 2 EOOST a uucxr 005T 4 LOWRIPPLE APPROXIMATION OR OUTPUY SIGNALS AT I m INuucroR NIPPLE 3 Emma b CAPACITOR RIPMF A dummy Duly cyaeI39TIperm oI Iquot 1001 50 C F 13M soc gm an wan momwmanmm CS ram Mammal manual sumamiss uses NEwswuche Mum39shm WW Muumm mummm WWWmm a Immcvw Objectives of this chapter Develop techniques for easily delermining output voltage oi an arbitrary converter circuit Derive ihe princuples of inductor wallsecond balance and capacitor charge ampsecond balance Introduce the key small ripple approxlmalion Develop simple meihods lor selecting filter element values illustrate via examples Mum va inim r OwlV 39 n mm wwwm WM A m mm Yhumnwuwmuu ammungmm new mm malll pv a Lmu m WW L4 mwmm mummy w we mi Ya I Show Anal quotHum 15 mmnm 1 drawn ax mm and chacm cvcb rmmmm mm nduclovs zc mm NW m m tenv mum m mmquot aw viva 2ny m dep m u m sweets one am mm mm anslawmrm mmquot mm Mntnmyymwuvyun comm man pamvuazkwxm umlLkummcdm R 1 mm a 11m nk ChL Ir 1 Inductor voltsecond balance Buck converter example mm v r V mm mw x Inductor vamgs waveform L prevmusly 2mm lnlagral of vonaga wavecorm n ma ol mum ms 39 39wnnn39 munumnn u Average vollaqe is 7nua vnm r Equals m zero and wow lav v nm m hr m r r m39 mm zmunmw u Umy7l39nru quotVvaunktwwhHutdyn Insertion of lowpass lter to remove switching harmumcs and pas4 nnly dc component n Aisum39mlj L WT T94 M 39 V c457 n n 1 D 11quotIHHH397HU JAVquot awquotllnnvhl t mm l mmfiu 1 Mmqu nwurvl m The principle of inductor voltsecond balance De 39 ation lndu ov dulxnmg relaan i m In 7 m Ineg1ala over one commas swllchmg pellod mm mm M 39 mum In Defiodlc sxeady slale me nel change In inaucrnr cumnl 6 16m Hence he Iota Mu DI volt50mm ands m Muclot magi VL wave arm is 25m whenavsrmo mnveneropomln in slaady Stella 4 An equivalent com a I I D m n 39 1 439 L39 v 7 m i u L4 The avenge Inducfor vauags is 1m m slvady ats 31quot a Jin m mum mm rmw min mmwmm WWII1 The small ripple approximnfion m mm mum 39 4 mummmn m p weHdesigued wrwevlsr mu aulpm voltage mm is man Hence Ihe wavsimms can be easuy determined by Ignmmg he Iippha aquot rwmw a raw mew quot mm wmmmmmm mme Buck converter analysis inductor current waveform ongms converter v 39 v A 39 gt a smuvnh L 91 11 IA 32 quot IN N n u mnmnan In mm one SIH IS mum and 5 IL I aptn sa thal mu nauan we to m gux m andU gamenugy bun smm MDJYL 1 dam and mm onquot 0 IR 5 rmIyy m Ihel r Inductor voltage and current waveforms m hm I M n I39ll mun A umquot MW mm sm wan117 MEN r quotLwnvmui nw Lln39lmmrs Determination of indudor currenl ripple magnitude LU I w x lumgu m z x myquot I mull a submwnul CV PM THDL Iwuhu r mum r w m u um um Mmer 53993 H Inductor current waveform during turn0n transient NR aa a z N mm um wr 21 n mm 1 when ms convene enemas in aqmlibdum W um um rummml m lhwv rrunuh A UVer 2 wannmmmmumm myquot 6040 via ml My 470 7 A HUN Ll n B39h 2quot Complete Quick amp Ready 15mm X 15mm X 28mm LGA with 15 CW eA PbFree e4 RoHS Compliant 39 W 0 Standard and High Voltage LTM4600EV 45V vms 20v LTM4600HVEV 45ngmszsv 06V5Vou155V IOUr 10A Dc 14A Peak Parallel 1m gModuIes for 20A Output wit nah L tram 1 63 5 thmwwnmmm Manhath Wamlloanmnivwuum anwmmmmnmnmns an mmvmomonmwnc mm WomuuuLChnmbomhrvmvxlmmln mummmmuwmmmm mama v DCOWHJVREACWEHLIERKCLYMmm Mwn v mumv my a Mmlmsmlmlqmuun mm m tamm or a ounc only an n wean pmquot as m n u m Part V Resonant converters A 17 series Issanlnl mnvarmr 4 no l 4 mfg g a i W 131 v dig Tm zommnayn N u 5 76 LL swnmmg LU Su oquot DC characteristics quot39 quot M HumK Wm Ivrl39luludmx thnm swmwxu J WEBENCH Online Design Environmom Our design and prototvuinu anvimnment simpli es Inc axpedites the entire desxgn process L Choose a part 2 Create a dascgn L 3 Analyza a power supply design 1 Pe orm electtical simulatinn 1 Stmulula themal behavior Build it 7 Receive your custom prototype kit 24 hours later webennh unionLenin SmgXMke 000639 0 Du Smecm sump 335 v f Mt if 312 1 7 prm uzucz rem mszu swrrm SIGNAL we Avenue rx war vows mammoa WILL BE wwen an we mom or 0 OR D7 m m in mm Mamquot may mm mm quotwavy mamammm m Mamas mm mm mmncnnrmmnm M a lt u on W cw In wxm A sums mom m earrwmzm mnxm mm 20Mka vuuus Iu ms Fouovwm DUMMRA u mean suwuuu m mm mm mm wm1wnmunldclu m M An my ans 7 BUY mi m LEVEL am we mm m s mm c cam 2r vALuEsETsuD mm mm mwmom WAVF ms 4 x swummmuumuv Why a w PCMCIA m 2 1 WW J 39u u 65 C 10 65 C 20 C to 70 C Vnrlon our Table 3 ESR performance Tantalum EUH Companson 2 39 i A H S D 92 n a firaua v MI P lt 4341 mw 943ng 565 0 23 11 6 1 pltq Adt m ixfcv t g 2 It a 293 25 Eslimgling ripple In converters 15 containing two olelowpass lters gnu L 7 v m r V L mcm Buck DomEns pumao Delamm Dually 9quot l I 39 ti 1 quot39 w quotk V quot an L1 I J L MR 1 Mduclarcumml I N wamlblm mm M M Whafisma awemm u T M 1 rmwlmmm 1 mm thd M39unmwmrynluk b 39 v Agc quot1 hr 5 L I rimming ripple in converters containing kwopole lowpass filters 39 u S 7 Aquot Buck wnvamvr sample Dnmrmna output voltage quotppa y 7 u 39 1N 4 4 K I 1 H I W l m u Inducmmurrsm 39 MIN 5 at 13 wavermm I 1 wk um mm 1 v r I L What 5 me Canaan current DC 31 gt 1 m 5 he 3m Ara 3 40 Estimating capacitor voltage ripple Av N Cum w u posi va lo mu Mm hurt slllva nunMW ha m m capadlw plums whore 4 7 c u M c m I 71quot S L39 tlmngr in wuagr I H h r in cume Pump IlIllv warmnu mum Estimating capacitor voltage ripple Av The will charg q 5 In W mfgW alumnus q and aowl Ior Jr A An 1 D 39 1 c 1 M a J 9 gvsd39 v iM m Now In pumice upmro equivJam lanes re 39 w lunhnv mm Av ruman mm ummm u mp0quot 2 mm mm mummy wvhw mu m mu Wum m we 1 cm quot394quot Inanaumrm hpaml w hcm mlmul WWI nu am op mulls runam m EMAV NWMIMMIIAI ymvwnnl MAN I am mu m mm M m an mmmny mm Is Now Azwu mm x wu vu Is awasm mm m v a o mm m x m r w 2 I nor L a nlmlmuammncmmumn anmldllm J dmhmmmmV u mm MMMwbgemnmmM mum w mm mmmmmemewml mmmam Mmmmwmnm quotMa WMHVVMY WLru4 33 L o u 22 xu L r f TW u Wk IN 93 3V vmm n 5 Div km r xu mo quot51 33quot m m T Jam 4w wag quotH149 39 7 RHYESE r n m J 7 guy Vde 3 2 r 33 c Aaami i a 9km 3 5 n L i 2 3 213 v 123 7 via 4 35 rifrixLi rst m3o 59 1 423 non quotn on vanu m WHO v mm quota Illll munl quotmu 39 vD3 v 9 v0 vn nu nun mum nun Illlll voLIAoI nvmnu H a u AVIIMI IF MIHHMMKUI m M mun mum In 397 WWIMW mum rw39m i39vE u IMM H mm mm mm MAIII nonqu quotn or munm unann no lullmull mm y Aqu Human t n u uu 39 D All M van AVuAnI mun cum In v5vmvuw 12m Im new v vmuoll vim numuu mmvunnls quotmu quotmumm A u u uul ll IOBIIZIS Vm a V0 39 Vm quotmy mm mu Wm m mm mlmmmunu m mm w rumum W umm umnm w m mu mwtmnlc 91K Luge Svk quot10 y L 54 Inpnpl u mmmmmmm mum Immanuka lMI Mmmuh v manic wlormuvylmmmlkumb 9mm mwvmam nvma MungAracomm um Wlmnnmm mnc uuznclsmwm swncu n Imo ml vmssomm mm m an um am m M m lmmllk Mg m mm wean ms 0 m lawmu m m M an emu s m an ac v m m w mm mm m manic mm a um mm mm Flam m we 039 Ins W mm Iquot w mm mm may now be Mud mmmmnqumwm evmhgmum mam wk mcfi ars diodls onllno Mall IV Shh Cantn Io ucmkrm your AcDc dm gm Part V Resonant converters 19 H3 2n Soft switchmg sonam cu nvcrslon r g r nmMquot an 3 wk an Va i KEN b 97 e icienL mmA supdawn cnnvanal in SOT23 Ap mians m Al HelmIon 391 vEf chplaW sllrains ViMH aperatedpmducfs V gum mm 300 mA max 4 P ks PC 7 auimam EweIt 15M IVJ 39 539 quot399quot WV mm voltage 25 Vru 511 v ltPackaga39 5aadSDT13 UMAP39 messara d USP 2259mm n anng Sims a 150 in quanrmes 0f 7000 The principle of capacitor charge balunc eriva on Capacuordelimng rolalio mm m 7 c T Inlograle ovur one complete swncrung period LUZ mm H m m In penn ic steady slam the vial change In capammv vnuage 5 mo 1 quot 07 V mum h Hanna ma rararama 0 charge underlhe canacllnrcunvm wavsrarm 5 mm whsnsver the converter operate in steady slam rm ayerage capacum currem 5 man 10m 1 WH WWH mm m H mm I39rAwmuammm magnumW m m Inductor voltage and current Subinterval 1 switch in positiun 1 Induclar voltage rm Small ripple appmximawll v7 r Knowing the Inductor mags we can now nd the mmmr cumsquot win mu llI L m Sava Ior mg slaps my v The mduam cuml changes wilh an omnlialw mum slope 4 mm vrth HHXYUI mun w Llwpvm I m M Mdmly11ruvnmrlrrunuwl Inductor voltage and current Subinterval 2 switch in position 2 Inductor valags 41quot Wquot K O um Small npgl appmximalm mnrv Krmwing ha induclal vamgs we can ugwn mu m mdunmr curmnl via lull39 wry I Jr solve Im the snpe mm V Wmlndmlornmonlahnngsswilhan m 3977 uuonlIaIymlamslopa 1 Warm v I39marm whh39lnlv ulnvmvrrlrv mum mm mum mmmu ammme IwWMmhmh may hmmm Mb aumuuwwy MMWZGWIIMM wmwu mamamm mmpukmmmwmummm Mnuwmmmwtmmsmamm Wanna11W ang Junk mm m Mummmmm W quotMW 5 W WWWMWW WM mquot wwwmmmmmmm m g Mummy 5 munIll ww wmuwm s lamm m mm m mam demwmwb nlm ammmmmmmmwww mm Wm mm mm 1 my an mumm WmmcanW wwmmmm 11vaan d m nuba huwummeg on mmtwwMmhmmsmmmy 3mm 13941 m a 4quot TOW a b h s VoLgA 39 onquot 5pm I Mir Induclur voltage and capacitor currenl waveforms 115 5 15 um V q a R9 lt or 7 7 Una V a n quot V v u 39 I39d I we Kg h 34 7 m In a gt HIuo 39u VIN 39 00K Vog39D Y5 man anyquot Fbruwua Lhanmr amylnu umhmtw 22 Inductor VullSPmnd balance capacitor charge balance and the small rippk approximation Amual oumux vo aga waveform buck Convener um Buck canverver containing pracrrcal Jawpass lter L 4 n Actual ompul valtagP mm A Wavuorm Am MAMmm mun m quot J W v WM 2 m WW v I nmuml I mhrunluwu rum mm mm m m rvlnmxmolu a mm was comm 0N swnmma mm m vm wau39l39l may m x a m m a m mam 1 m ulnkdum nnx cam mm mm m was am My mumw hm m m lime m a mum on mm mumva F A 39 ammmg Nata39ly he wmm wan mm m m M mm M 7m 2 Wm mm M n aqn ulmmmary mmquot um m m D r h up mmuuu n maumummnnm wumk Created by Minh Anh Nguyen Page 1 1262008 MATLAB SIMULATIONS OF SERIES RESONANT CIRCUIT 564 POWER ELECTRONICS COLORADO STATE UNIVERSITY By Electrical and Computer Engineering student Minh Anh Thi Nguyen Page 1 of 27 Created by Minh Anh Nguyen Page 2 1262008 PURPOSE The purpose ofthis lab is to simulate the LCC circuit using MATLAB to better familiarize the student with some of its operating characteristics This lab will explore some ofthe following aspects ofthe buck converter D Input impedance D Output impedance D Magnitude and phase margin D Zero frequency D Output power D Output current D Plot the natural response for the output voltage U Zero poles Phase of transfer function E Stable circuit D Unstable circuit D D Input impedance for varying loads resistance R D Under damped D Over damped D Critical damp NOTE The simulations that follow are intended to be completed with MATLAB It is assumed that the student has a fundamental understanding ofthe operation of MATLAB MATLAB provides tutorials for users that are not experienced with its functions In this lab you will learn how to write a function to varying calculating and plotting the input impedance current and output voltage ofthe series RLC resonant tank circuit You can define your own function in MATLAB A function must start with a line Page 2 of 27 Created by Minh Anh Nguyen Page 3 1262008 Function returnvalue functionname arguments So that MATLAB will recognize it as a function Each function must have its own file and the file must have the same as the function PROCEDURE Part 1 Write a function to calculate the total input impedance of series RLC resonant circuit as shown in Figure 1 Vm is a variable voltage Set to 1 volts L is a variable inductor Set to 1000pH R is a variable ideal resistor Set to 2000 C is a variable ideal capacitor Set to 40pF Page 3 of 27 Created by Mmh Anh Nguyen Page 4 1262008 s 521125 n Resananr clxcu s Hmh Anh Th n ysn s Eulaxada State Unlvexslty s Eleccncal snu Campucex Englneenng student gunman ZlnpucZlnpucisenesRLElH as the gunman declaxaman quotace sms waxd quotfuncmanquot must be an flxst tnans annsnct waxd ag ens ngaagsu smnnu quot s the value that ths gunman xecuxns ag calculates aka the autpuc nsns EBJKE s Input quotZmpu senesRLElquot shauld he bath the nuns ag me gunman snu the nuns suns yau uss ca save the gns dxspL Stagmng the gunman ag ZlnpucisenesRLEl susgsns all the campanen Values snu unnzs gag Tank Wales mm s s Ausuz srsssus Lsmuusss menu39s s de ne the mpu mnsusnas w 1 1 gugs H nausmnnuet Unlel lnpu Impedance ag senes n tank asgmc t s calculamng mpaxcanr paxamecexs ag the tank ZrPrkZpkdacaLZnpu v t dlspt flnlshednhe gunman ag ZlnpucisenesRLEl t thuret The thout tmpedance of sertes th tank ctrcutt Once the aooye rn we re captured the strnutatrons can be run FH SL go to your dtrectory Fwd your rn Ne and then run your Ne ttthere re a red message on PageA um Created by Mmh Anh Nguyen Page 5 1262008 your MATLAB Wmdow men you need to correct your error Otherwrse you Wm see me somuon as Show w rrgure 2 gtgt ZlnpucisenesRLEl Scanan nnn funcman a ZlnpucisenesRLEl Txansfex funcman AEVDJA 5A2 EEVDDS s 1 Aer ll s suuuuuu Beta zuuuuu u flnlshedche funcclan a ZlnpucisexlesRLEl Txansfex funcman AEVDJA 5A2 EEVDDS s 1 Aer ll s Fag 5 af27 Created by Mnh Anh Nguyen Page 6 1262008 nte Edtt Vtew Insevt teats thdaw netp D l kAi39U9E tnpm tmpedarme m settes RLCtank mmun Magnnude as Phase deg tu tn rtequency tadsec thute2 Tne output at tnputttnpedance ot senes RLCtankctrcutt Next ptottnetotat tnput ottne senes resonant RLCtankctrcutt Wnte anotnet mnctton to catcutate tnetotat mput current at senes RLCtankctrcutt as shown tn thute 3 AH tne tntttat vanabtes and vatues ate tetnatn tne Same Vm ts a vanabte vottage 8e1101 votts Ltsavattabtetnductot Set to 100mm Rts avanabte tdeat teststot Set to 200 c ts a vanabte tdeat capacttot Set to 40pF Fag 6 af27 Created by Mmh Anh Nguyen Page 7 1262008 Seuss Resananr ag n tank clxcu Hmh Anh Th nguyen Eulaxada State Unlvexslty Eleccnca anu Campucex Englneenng student gunman ZnpucisenesRLl2LZn1 vanquot 5 the name ag the Vanable taken as Input def1ne all the campanenr values anu unnzs g g Tank dlspL Scaxmng the gunman ag znnpouEgneauucz r naueunr ememnpuu cuxxen ag sense an tank clxculr x calculamng mpaxcan paxamecexs ag the tank ZrPrkzpkdacalZnr V 1 uasuguwucr Be 7 n dlspl flmshednhe gunman ag znnpouEgneauucz r Frgure 3 Once the aooye funcuon we re captured the swmmauons can be run Prep go to yourorrectory Fwd yourmncuonme anomen runyourme rmerersa reo message on your MATLAB Wmdovy then you need to correct your error omerwrse you Wm see me somuon as Show w gure4 Page 7 am Created by Mmh Anh Nguyen Page 8 1262008 gtgt ZlnpucisenesRLEZ Scanan the gunman ag ZlnpucisenesRLEZ r a the gunman ag ZlnpucisenesRLEl Txansfex gunman 427m m EEVDEIS s 1 F e 427m 5 H D suuuuuu Beta zuuuuu 25 flmshednhe gunman ag ZlnpucisenesRLEl Txansfex gunman 42 u s 427m m EEVDEIS s 1 suuuuuu Beta zuuuuu 25 flmshednhe gunman ag ZlnpucisenesRLEZ Fag 2 am Created by Mmh Anh Nguyen Page 9 1262008 F e m V ew Insevt Van s W ndaw HE D D u kAI Q npm cunem m sev es mm c mun Magnnude as Phase deg m ryequency vansec F gure 4 the Uutput and mm mm mm mm current Ufser es PLO tank c rcu t New Wr te a funct or to vary r g R of the want mpedar ce of 5er e5 th re5or ar t c rcu t and va ue5 are rema r the 5ame Vm 5 a var ab e vo tage Set to V0 t5 L 5 a var ab e r ductor Set to OOOVH R 5 a var ab e dea re5 5t0r Set to 2009 Page 9 af27 Created by Mmh Anh Nguyen Page 10 1262008 c rs a vanabre rdear capacrtor Set to 40pF ourputonorar mpuumpedance of senes RLC resonant errcurt wne r runcnon to vanmg R of me mput rrnpedance of senes RLC resonant crrcurt runcnon rue rs captured me srrnuranons can be run mnere rs any error message on your MATLAB wrndows men correct your error and men rerun me srrnuranon ornerwrse you Wm see me resun as Show berow a Senes n Resananr Intm nh Anh 1 nguyen Enlaxada State Unlvexs m CED3 and Eampucex ny Englneenng student funcman ZlnpucZlnpucisenesRLE3H dlspl staxmng nne funcman a ZlnpucisenesRLECi I def1ne all nne campanenr values and unlns a Tank Waxes sands Faxads henxys a de ne nne Vatylnq Jaads value RR4 Rz u m mu mu mm a de ne nne npu mpedance a vunnnd Rs u c fLan numb ZlnidEH npu flguxe m nudemnpunr f haldr end end ememnpun mpedance a senes m tank Intm a vunnnd w d spl flmshednhe funcman a ZlnpucisenesRLECi I Pugemnm Created by Mmh Anh Nguyen Page 11 1262008 991119 5 A funcIon of he mpuImpedance ofsenes RLC remnantsmm WW7 varyHg ResSID gt ZlnpucisenesRLECt gt Scanan me funcman a ZlnpucisenesRLECt R 51 mm m m m m m We hm emsth mm a Zlnpugmesm mm mm M14 m 322117 5 1 M11 5 r112 Eat mew lnswt Tunis Wmdnw Hahn UBEHE K A zmBs Input immune m sane mom cvcu WV Vanni R 101 a E an r E m E e we 15 71 E a 45 7 105 El9 Page 11 um Created by Minh Anh Nguyen Page 12 1262008 Figure 6 Output of the inputimpedance of series RLC resonant circuit with varying Resistor Now write a function to varying R ofthe input current of series RLC resonant circuit By adding an array of Resistors R value Again all the initial variables and values are remain the same Vm is a variable voltage Set to 1 volts L is a variable inductor Set to 1000pH R is a variable ideal resistor Set to 2000 C is a variable ideal capacitor Set to 40pF Write a loop function to do the varying resistors value calculate and plot the output of total input current of series RLC resonant circuit When the function to varying R ofthe input current of series RLC resonant circuit function file is captured the simulations can be run lfthere is any error message on your MATLAB windows then correct your error and then rerun the simulation Otherwise you will see the result as show below Page 12 of 27 Created by Mmh Anh Nguyen Page 13 1262008 x Senes n Resananr clxcu x Hmh Anh Th n en x Eulaxada State Umvex slty x Eleccncal and Campuce Englneexmg student man ZnpucisenesRLE4LZlnpud dlspL SEaxmng une funcman at Zln PucisenesRLE l def1ne all nne campanenr values and unnzs m Tank v Valcs u uu ahms E4Der2 menus Lemuuees menu39s x uenne nne vaxylng laads value RR4 m u m mu mu mm x uenne nne npu mpedance m vanng Rs in new Zn7numbLE mm 1 Zln ue u c u cf Zlninumb ZlnidEIF enu muel lnpu cuxxen at 521125 n clxcu m vanng w dnspl tank flmshednhe funcman a ZlnpucisenesRLE l I Figure 7 A mcnm arms mpu Curran nfsenes PLO resmam mun WW7 varymg Resrsmr Pugeuum Created by Mmh Anh Nguyen Page 14 1262008 Scanan the gunman ag ZlnpucisenesRLEA R su mu zuu auu zuuu ADDEI uuuu Tgunageg gunman Aer l AEVDJA 5A2 227mg 5 1 Euxxem plat nexu Tgunageg gunman Aer l s AEVDJA 5A2 427mg 5 1 Tgunageg gunman Aer l s AEVDJA 5A2 EEVDEIS s 1 Tgunageg gunman Aer l s AEVDJA 5A2 LSEVEIEIE s 1 Tgunageg gunman Aer l s AEVDJA 5A2 EEVDEIE s 1 Tgunageg gunmun Aer l AEVDJA 5A2 LEEVEIEW s 1 Page 14 ur 27 Created by Mmh Anh Nguyen Page 15 1262008 Txansfex funcma Aer ll 5 427m 5A2 32mm s 1 flmshednhe funcman a ZlnpucisenesRLEA mun F e m mew Insevt Van s Wmdaw HE D D kAi39U9 mm cunem m Seuss mm mean my Vanna R su Magnnude as Phase deg Figure 8 Ourpu arms mpu Curran nfsenes PLO resman mun WW7 varymg Resrsmr PagzlSafN Created by Minh Anh Nguyen Page 16 1262008 Now write a function to varying R ofthe output voltage of series RLC resonant circuit By adding an array of Resistors R value Again all the initial variables and values are remain the same Vm is a variable voltage Set to 1 volts L is a variable inductor Set to 1000pH R is a variable ideal resistor Set to 2000 C is a variable ideal capacitor Set to 40pF Write a loop function to do the varying resistors value calculate and plot the output voltage of series RLC resonant circuit When the function to varying R of the input current of series RLC resonant circuit function file is captured the simulations can be run lfthere is any error message on your MATLAB windows then correct your error and then rerun the simulation Otherwise you will see the result as show below Page 16 of 27 Created by Mmh Anh Nguyen Page 17 1262008 Senes n Resananr mm Hmh Anh Th n en Eulaxada State Unwegmy Eleccnca and Eampuce Englneennq student gunman ZlnpucZlnpucisenesRLESH dlspL SEagmng nne gunman ag ZlnpucisenesRLES t def1ne all nne campanenr values and unnzs gag Tank henxys de ne nne vaxylng laads value RR4 m R wz mu mu Rum de ne nne npu mneunnae gag vmna Rs gag 1717 gun um um ZpchL Rm u m Vaueevmc tzazm lgugetst nauetVauct haldy enu enu Unlel upu voltage nagass Caps21m ag sens n tank clxcu gag vmna R dlspl flmshednhe gunman ag ZlnpucisenesRLES t t thwe 9 A fundon of the output votage of Beles RLC resonant ctmmtwtm varyHg ResSta Page 17 um Created by Mmh Anh Nguyen Page 18 1262008 Scanan the funcman at ZlnpucisenesRLES R 1 Sn Jun zuu ADD zuuu ADDU auuu Euxxenr plan held flmshednhe funcman a ZlnpucisenesRLES reN 5 m m we Insevl Innis W M w Help UD E kAIHDEO 01m vnnuge mass Capacnm m gems m mm mm m mm R Mamma um 13 1 E E Van k 7135 W V 105 105 1039 10 1Equot Fgwe 70 WW7 varyHg Rea51w Page 18 Dr 27 Created by Minh Anh Nguyen Page 19 1262008 For Homework You need to resolve the parallel resonant circuit with Capacitor ESR and see its effects on the magnitude and phase plots in some detail For example choose the ratio of the C ESR to the load resistance to be in the ratio range from 001 to 1 Now write m file to varying R ofthe natural response of current in series RLC resonant circuit By adding an array of Resistors R value Again all the initial variables are remain the same but change their values Vm is a variable voltage Set to 0 volts L is a variable inductor Set to 5mH R is a variable ideal resistor Set to 89 C is a variable ideal capacitor Set to 200pF lo is a variable ideal of inductor current Set to 2 amps V0 is a variable ideal of capacitor voltage Set to 5 volts Write a loop function to do the varying resistors value calculate and plot the natural response of current for series RLC resonant circuit When the function to varying R ofthe natural response of current in series RLC resonant circuit le is captured the simulations can be run lfthere is any error message on your MATLAB windows then correct your error and then rerun the simulation OthenNise you will see the result as show below Page 19 of 27 Created by Mmh Anh Nguyen Page 20 1262008 ems n Resananr Intm Intm 1 guy alaxada 5mg Unlvexslty 1 annual and Campucex Englneenng student x Clea all the vnndavls cl dlspL Staxmnq the nacuxal xespanse a aumnw def1ne all the campanenr values and unnzs a Tank un1c xys mans Ummal 1a an nnuuauaxy Valcs L nlclal VI an aapaanuau n xansfex funcman a tank cuxxenr mnh nlclal aanumana numb u vwan Na deL H vs x de ne the cuxxenr a senes cutm Lnunbue x plan the mpulse cuxxenr a the slum mpulsel de ne vaxylng laads u m 16 zelR Jnaxm21 nauu aft x defmmg the npu mpedance a vaxylng Rs in 1 jmax numb u vwan rva u y Rm us 1 gxld dlspl flmshed the funcman nacuxal nesnanae a aumnm Pagzl af Created by Mmh Anh Nguyen Page 21 1262008 Figure 11 79 m le In camare and mm he natural respmse ufcurren m senes PLO resmam mun WW7 varymg Resrsmr Scanan the nacuxal xespanse ag cuxxen Transfex gunman uu1 s s uuus m u s suuu u z 4 u m 15 max 2 4 Transfex gunman uu1 s s uuus m 4 s suuu Euxxen plat held Transfex gunman uu1 s s uuus m u s suuu Transfex gunman uu1 s s uuus m m s suuu Transfex gunman uu1 s s uuus m 15 s suuu brushed the gunman nacuxal gespanae ag cuxxen Pagm af27 Created by Mmh Anh Nguyen Page 22 1262008 nte at Vtew Insevt rants thdaw Heb Ha a hAzUBE Annmuae nne sec thure 12 We gure ts snuwn tne uutput uttne neture respmses ufcurren m senes PLO resunent mutt wttn varymg Resrsmr New wnte m Me to vanmg R of tne naturat reSponSe of capactorvottage m a senes th resonant cncutt By addtng an array of Reststors Rvaue Agam aH tne tntttat vanabtes are remam tne Same but enange tnen vatues Vm ts a vanabte vottage Set to o VOHS L ts a vanabte mductor Set to 5mH Rts avanabte tdeat reststor Set to 8L2 c ts a vanabte tdeat capacttor Set to 200 Pagzllaf Created by Minh Anh Nguyen Page 23 1262008 lo is a variable ideal of inductor current Set to 2 amps V0 is a variable ideal of capacitor voltage Set to 5 volts Write a loop function to do the varying resistors value calculate and plot the natural response of capacitor voltage in a series RLC resonant circuit When the function to varying R ofthe natural response of series RLC resonant circuit file is captured the simulations can be run lfthere is any error message on your MATLAB windows then correct your error and then rerun the simulation OthenNise you will see the result as show below Page 23 of 27 Created by Mmh Anh Nguyen Page 24 1262008 leccxlcal and Campucex Englneenng student x Clea all vnndavl dlspL Staxmnq the nacuxal xespanse a caps21m vaunaae w def1ne an the campanenr values and unnzs Tank un1c xys mans 111103 I an nnuuauaxy Valcs L nlclal VI an aapaanuau x xansfex funcman a tank cuxxenr mnh nlclal aanumana vwan rva u y x 1m eflne the cuxxenr a senes cutm umbde numb 124 x u Vca an Z mpulse Wasp de ne vaxylng laads 4 u m 16 E a t n E E a a a umb u vwan Na Rm 11 PagalAafN Created by Mmh Anh Nguyen Page 25 1262008 msnmnnnsnen nne funcman nacuxal nesnnnse a capaclca vulcagE Figure 13 he m le In camare and pm 79 nazura respmse ufcurren m a enes PLO resmam mun WW7 varying Resrsmr F e m mew Insevt Van s Wmdaw He v kAfEE Amman me Se7 PagaZSafN Created by Mmh Anh Nguyen Page 26 1262008 Transfex gunman uu1 s s uuus 5A2 4 s suuu Transfex gunman rSerDDS 5A2 r uu55 s r zu uuus 5A2 4 s suuu Euxxen plat held Transfex gunman uu1 s s uuus 5A2 u s suuu Transfex gunman rSerEIEIS 5A2 r mus s 7 4D uuus 5A2 u s suuu Transfex gunman uu1 s s uuus 5A2 m s suuu Transfex gunman rSerDDS 5A2 r u125 s 7 Sn uuus 5A2 m s suuu Transfex gunman uu1 s s uuus 5A2 15 s suuu Transfex gunman rSerDDS 5A 7 H155 s 7 an uuus 5A2 15 s suuu brushed the gunman nacuxal gesnanae ag caps21m vulcage Paguaam Created by Minh Anh Nguyen Page 27 1262008 Figure 14 the output of the natural response of capacitor voltage in a series RLC resonant circuit with varying Resistor Page 27 of 27 Lecture 24 Computer Modeling and Simulation of PWM Converter Circuits A Overview of Computer Simulation of Switched Converter Waveforms 1 General PWM Converter simulation goals 2 Special challenges to power electronic simulations 3 Nonlinear switch conditions b Long time scale of the simulation 0 Need to Model Feedback loops d Case for Use of Simplified Models e Verification of Simulation with Experiment 3 A computer efficient simulation sequence is complex and artful 4 Two generic simulators for power electronics 3 Equation Solvers b Circuit simulators B Solid State Switch Models for PSPICE 1 Overview 2 Diode 3 MOSFET 4 IGBT C PSPICE BUCK PWM CONVERTER SIMULATION EXAMPLES A Overview of Computer Simulation of Switched Converter WaveformsCircuits Computer aided calculation programs like Mathematica Wolfram Research and Matlab Mathworks are useful in power electronics simulation But the most useful circuit waveform analysis is PSPICE Microsim Corp as we shall see below The idea is to fully simulate the converter BEFORE starting construction and testing Fixing problems in a model that we invest some time and effort in may pay for themselve s later by spotting problems before circuit construction begins That is the promise of modeling but not always the end result because of difficulties outlined herein 1 Goals of Converter Operation Simulation a Calculate both dynamic and steady state performances of the whole PWM converter system for all voltages and currents versus time Power input Power vo oModel power flow circuits Vi processor oModel controller response Ii Io oModel total system Control M t signals easureme 8 response wrth feedback loops included Controller Reference b Obtain required VmaX and max for all switching elements employed so we can better specify required switches and avoid switch failure by better knowing the worst case switch stress conditions and planning forthem c Estimate power loss in various components 1 Switches are analyzed both from the two final DC switch states and the two dynamic switching transitions from off to on and from on to off Losses effect the heat generation and associated cooling requirements that we must meet d Magnetics Losses also contribute to heat flow requirements in addition to switch losses a lnductor s have core losses we can estimate b Transformers also have core losses e Snubbers and Control Electronics can be simulated to anticipate possible SOA problems of power switches f We can estimate thermal cooling for critical components using data from c and d above Both solid state devices and magnetic cores want to remain below 100 C to operate properly So the cooling must result in ambient temperatures BELOW 100 C in the converter This must be addressed 9 We aim to speedup converter and construction by COMPLEMENTARY simulation together with a proofof concept hardware prototype We use both to iterate to a final design faster with fewer mistakes and a more reliable final product That s the goal of simulation 2 Challenges in Power Electronic Simulation Unlike VLSI design we are simulating a discrete component system that has a variety of unique switching devices with MANY parasitic elements that often dominate PWM converter operation a Accurate nonlinear switch models are not always easily available even from the manufacturers If available from the manufacturer s data sheets the data may not always be as accurate as needed Nevertheless the WWW page of various manufacturers eg Motorola Harris Siemans IXYS etc offers a wealth of information b The switching time tsW is usually usec but the converter system response time is seconds to minutes gt lots of computer time is required to simulate PWM converter waveforms well c Chosen feedback controller models needs to be placed into the closed loop system model Usually both current and voltage feedback loops are employed for PWM dcdc converters This complicates analysis d Early on we need to choose proper simplification steps so as to model only the immediate objectives Limited simulation in early stages of design employs only a few switching cycles rather than millions or more to crudely estimate voltages and currents which repeat with each cycle This simplification step is very important Often it must include only known to be dominant parasitic elements from prior experience lnclude expected parasitic and circuit impedance s on the input and output as well as line inductance 100 500uH for 208 ac mains Also include filter capacitors snubbers etc e Verify any model prediction by prototype PWM converter construction and testing f Include the control loop model and any surprises that may arise Choose to model only portions of the power processor circuit rather than the full circuit in initial simulations to save time and simulation costs 3 The converter simulation sequence is complex The switch model replaces a time varying circuit topology with a single time invariant two port equivalent circuit by averaging over the switch cycle Switch models are given by time independent averaged characteristics over Ts Yet the model changes with changing choice of duty cycle Clearly the frequency response of any such approximate model is limited to f fsw The fact that we can even make an AC model of the PWM converter is suprising to some Second semester we will make just such models by small signal expansion of the DC models we have made to date The f fsw open loop power processor model Aw Results from such an exercise For nowjust consider this small signal function as given power processor Power output Obtain transfer functions each switching is Vo V out represented Simple gt A A component models 390 control Prespecified control signal In practice converters all employ feedback to stabilize the output to within the user s specifications The chosen controller model employed is usually available from 1 Control chip manufacturer 2 Controller software The closed loop system for the controller is then D input D Load AOL Power processor ACL 5 small signal linearized 1 A model Vout A E CL control variable Control signals Controller D Reference One employs feedback because one expects big improvements in converter performance by using feedback including olmproved system stability to circuit component or switch device changes with both temperature and aging oHigher Zin Lower Zout for the closed loop system oA low frequency model allows the use of Bode plots for determining AOLW From open loop gain and phase plots versus frequency we can predict system stability as well as instability at all operating frequencies One can also estimate system dynamical response to transient changes in the load or input by behavior of AB the loop gain near 1 m 3 Two generic types of simulators are available for power electronics based simulators Circuit oriented and differential equation based 3 Differential Equation Based Simulators Give total control of the solution to the nonlinear differential equations that describe the PWM circuit and then choose oThe Integration method oStep time of simulation oFirst choose only those important terms in algebraic and differential equations Neglect as many elements as possible for the first simulation to save computer time oUse C language to write the program steps oChoose your own graphical plotting tools b Equation solver solution sequence 1 Circuit topology choice and switching sequence both determine loop equations we must solve di ri Ldilt39 vc voi KVL i chC E o KCL L r L vma L v0 0 gt R gt or matrix form ltagt LL 1 1 Val L L 7 on off on L7 L J t l 1 VC 0 0 dt 0 39 CR 2 The State variable matrix format introduced in Erickson Chapter 7 is useful For now consider the circuit equations just in the standard state variable or matrix form dx t iL 0 MD bglttgt xt and 90 voi dt V C LL 1 L L 1 A and b L l 1 o 8 3 The numerical solution time step At uses a linear interpolation t Xt Xt At I ACXC b g dC bAt implicitly known are the small signal equations from which we can start the process of calculating the required integral l l xt xt At 12 At At Atxt At Atxt 2 Linear 12 At bt Atgt At btgt 2 Algebra Trapezoidal area approximation may be employed 2 dt Ar m x1 Mxt A My Ag gm Mr AAquotI AIA Ad At bglt At NI AtAl39 A1b O t Use Matlab or Mathematica to do the numerical integration You have complete freedom to employ other integration algorithms as well as to change the time sequences to suit your desire for a complete orjust a crude model as we show below on page 9 The point to ponder is whether or not you have the interest in becoming a computer programmer of power electronics problems as this is a very time intensive endeavor Sample results of simple models are given on page 9 when using the Matlab simulator 2 Solution of the Circuit in Fig 4 5 using Trapezoidal Hethod of Integration c1cclgc1ear z Input Data Vdd LSeL CLUOeE rL1e3 RL tszl neH VcontrolD5 Tsllfs tmaxSBTs deltatTSISD 2 time Dde1tattmax vst timeTs f1xt1meTs vol Vd Vcontrol gt vst z A rLL 1L LC LCRJ IUStratlve b1L 0139 ampere deltata 5 A lines of code 11 eyea deltata A NHN deltatE b m Matlab X 1L14U vC1SS t1me1engthlengthtime X for k Etime1ength x n iLk1 vCk l39 N voik voiK l illk x1 VClk x8 and z plottimeiLtimevC meta Example The results are plotted below for a buck converter which will later to be modeled also by Pspice which is a circuit simulator 10 l as U39I I ll in quotllllllmmquotllllll ml ill I l i l O 05 1 L5 2 25 3 35 4 45 5 me x10 4s 3 Figure 412 MATLAB simulation results With this equation based approach we see both the fast fSW waveform and the slower averaged output waveforms for the PWM converter evolve during power up of the circuit In this way we could estimate any peak excursions that might cause switch failure b Circuit simulators 1 Overview These simulators have been developed to a high level by the needs of VLSI chip design over the past decades However the IC environment is not the power electronics environment and we will have to take great care A special form of commercial circuit simulator that we will favor is termed PSPICE Power processor Powerinput each switching is represented OUtPUt The key is to break gt simple switch models 659 saturation and pertinent OUt the power nonlinearities are included processor portions Control Measurements from the controller signals portions Reference You supply Circuit topology and nodes Component values Simulator generates Circuit equations and time evolving solutions transparent to the user for the power processor 2 Advantages of circuit simulators a Fasteasy as prior library of circuits exists b Segmentation into modules is also easy 1 Basic building block PWM converter simulation modules exist Test each separately then combine 2 Easy to change the design 1 Vary Circuit topology itself 2 Alter Component values and component models versus f temperature etc 3 Disadvantages of circuit simulators a No easy control over 1 Time step of simulation as for power electronics simulation times of seconds are required yet fSW is giving TS z10100 us 2 No clear best choice of integration method for numerical solution to circuit equations 3 Questionable assumptions of simulator model as these are general purpose tools but rather are often aimed at lC s and not always modified to power electronics 4 Commercial simulators a SPICE and PSPICE student freeware Simulation Program with IC Emphasis SPICE is widely available It has easy to use shells and drop down menus to perform what if circuit analysis such as DC and AC sweep analysis transient response parametric analysis of various device component changes and finally temperature heating analysis Two possible starting points with limited capability as compared to fullblown PSPICE are 1 PSPICE version 71 MicroSim Corporation 20 Fairbanks Irvine CA 92718 You can also get a student version from the www Limited to 64 circuit nodes and 30 components 2 Power Electronics Computer Simulation Analysis and Education Using Evaluation Version of PSpice on diskette with a manual Minnesota Power Electronics PO Box 14503 Minneapolis MN 55414 b ILLUSTRATIVE PSPICE ANALYSIS Circuit Schematic 4 Controller Input Data W L 5 uH 1 V C Unless specnfled van switch device specs come from general purpose switch a library which uses default values unless you change them to n n Ill 4 t0n75usec T lt7 TS1fs10usec 4b values for the specific power devices you are employing b a Circuit for simulation b Switch control waveform SPICE protocols must be followed oAssign node s with ground being always 0 0A repetitive control signal is modeled in SPICE by utilizing Vcontrol oAdditional SPICE circuits must often be added to the switching nodes like a diode RLC snubber because discontinuities in SPICE 9 the simulation oThe more parasitic elements used make the simulation more realistic In Power Electronics twothirds of all components are not on the bill of material Bruce Carstens Also the veracity of simulator results will improve One can create a schematic of the circuit and Pspice will automatically create a net list To launch PSPICE double click the Schematic icon See details in the handout provided in class Introduction to Pspice for Power Electronics on disc and hard copy from G Collins For example the following is a SPICE simulation 1 1 rI i Rmmmon Diede Snubber Rload Mmklmme 5 POWERDIODE Csnub 01 uF 6 ISW CNTL O Model name SWITCH 5 J mmmcmmmBn m4A 0 udm55v PSpice DIODE Rsnub Csnub SW VCNTL L rL C RLOAD VD 2 MODEL MODEL TRAN PROBE END Figure 49 Example 2 l POWERDIODE L S 000 S E 01uF E 0 b 0 SWITCH E D PULSE0VLVDslnsLnsSus10us L 3 SuH Ic4A 39 3 4 Lm 4 E L00uF ICSSV 4 a 10 L 0 60V POWERDIODE DRS00LCJO10pF SWITCH VSWITCHRON00L l0us 5000us Us 02us uic b PSpice simulation of circuit in Fig 8 With PSPICE you can see the use of a RCdiode snubber which softens VD discontinuities caused by switching SPICE Input file for circuit components with node assignments This can be done automatically by schematic capture features of Pspice Typical output waveform from llllllllllllllllllllllllllllllllllll PSPICE produced llquotl39lllllllllll39llllllllllllllllll bya graphical post 90 iL 04 2 llllll quotquotlllllll I 4 processor 30 i I o 1005 200m aoous 4005 5005 embedded Within quotquot8 PSPICE via Figure 410 Results of PSpice simulation 139 and vc Analysis Setup Transient simulate menus However PSPICE is not optimized for the case of power electronic devices used as switches in the control of large amounts of power Rather it is for IC modeling with those types of devices for low power information technology found on logic chips Perhaps a more focused power electronics simulator is PowerSim However it is not very robust nor easy to use Suggested Paper for 20 of grade could employ PSPICE PowerSim or other circuit simulators for buckboost Cuk Flyback converter designs The student version can be downloaded from the world wide web fromwwwportalcapowersim For HW4 Due in 1 week 1 Answer any Questions asked in the class notes throughout lectures 20 24 2 Erickson Chapter 4 Problems 2 4 5 and 6 To finish out lecture 24 we review below proper models for the power electronic devices we employ in the second electronics revolution Many device features are unique to power devices and are not familiar to engineers who work only in information technology devices B Solid State Switch Models 1 Overview We will outline below only the full power electronic models for three switches that are the most popular Other device models such as thyristor models will be left for student papers for 20 of the course grade The three devices we choose are shown below 1 Diode Models 39 gtl u 2 MOSFET Models l 3 IGBT Models 2 Power Diode Behavior and Model The power diode has unique characteristics such as A large forward recovery voltage pr that information technology diodes do not possess A finite time for the power diode to reach reverse recovery that in information technology diodes is nearly instantaneous The instantaneous reverse recovery will cause large reverse overvoltages that the power diode will not cause Power diodes have unique quasistatic models as shown below on page 16 PN Junction Diode Circuit Behavior Switching Characteristics Static Characteristics Diode Current Diode Voltage Summary of PSpice Diode Model Static IV characteristic modeled with reasonable accuracy Quasistatic approximation results in poor accuracy in modeling transient response of power diodes 0 N0 forward recovery voltage pr Instantaneous snapoff of reverse recovery current 39 Very large reverse overvoltages due to instantaneous snapoff of reverserecovery current Simulation with PSpice Diode Model 0 lode VVVVV g Lstray W H ioov l 50 nH I x f 0f 0 zoov I 1 Vd 4 50A 3oov i l l 100 v 4oov L 5 quot 500v 39 Os lOOns 200quot 300115 400m Soon time Diode rrrrr 71 mo Step down converter test l circuiL SOA l FV 0A l N M J l D modeled by builtin 50A j v PSpicc diode model 0 100m 200m 300 400m SOOns lime Simulation Results with Imgoved Diode Model 300quot Models with the simple PSPICE information technology diode models will give very different simulation results from those obtained with the power diode models as shown above Hence PSPICE canned diode models are not to be used 2 MOSFET The power MOSFET models are also unique and the canned PSPICE information technology MOSFET models are inadequate VoltageDependent Capacitances of Power MOSFETs Ve 39 La He Body source source short gate LC bg J39 drain drambody depletion layer rtical geometry puts depletion layer in series with electrostatic component of ng rge changes in depletion layer capacitance with changes in drainsource voltage nee 10 to 1001 changes in ng measured in high voltage MOSFEI S 39 Moderate changes in Cgb and Cbs 39 Circuit simulation models of MOSFEI s must incorporate these large changes MOSFET Transient Behavior Stepdown converter circuit Vd H Sw 39 V t i 05 T VGGr T urnoff Waveforms VGSJ Turnon Waveforms v v Gsuh CG 4 t i I v d 0510 Gsnh 39 0 quot I rdori trjtfvl fvz l totem to the task of PWM converter simulation as shown on page 19 in comparative plots We compare the canned SPICE MOSFET information technology model to a Motorola power electronics MOSFET model that Inadequacy of Builtin Pspice MOSFET Models 39 MTP3OSSE 39 Comparison of ng versus VHS for PSpice MOSFET model and an improved model WV vDS 39 V mrpaosst mi i V Comparison ofVDS tum V 5mg model olT waveforms for PSpice 0 quot 1 39 39 MOSFEF model and an subcutmt mi model V improved model wv Summary of PSpice MOSFET Model Model gives reasonable simulations of static I V characteristics 39 Does not model voltagedependent gatedrain capacitance Consequently transient responses of MOSFETs poorly simulated by builtin model Better models needed which account for voltagedependent gatesource and gate drain capacitances 39 Several device manufacturers provide better models includes all the differences of note between the two very different MOSFET devices 20 3 IGBT Power Devices The built in SPICE IGBT model does not include the latest ultrafast IGBT devices employing buffer layers MV electron irradiation or free wheeling diodes Still it gives decent results IGBT Transient Behavior 10 Stepdown converter circuit Vd o l Sw v i vGEttl VGEJ I fv E va Vc on t dtom l rvl Parameter Estimation for PSpice IGBT Model 0 Built in IGBT model requires eight parameter values Parameters described in Help files of Parts utility program Parts utility program guides users through parameter estimation process 39 IGBT specification sheets provided by manufacturer provide suf cient inl ormaiton for general purpose simulations 39 Detailed accurate Simulations for example device dissipation studies may require the user to carefully characterize the selected lGBTs Drain 39 Builtin model does not model ultral ast lGBTs with buffer layers punchthrough lGBTs or reverse freewheeling diodes Source 21 Simulation employing the canned SPICE model for an IGBT gives good results for a buck circuit as shown below Simulation Using Builtin IGBT Model Hardswitched stepdown converter waveforms Turnon Waveforms Turnoff Waveforms 400 l 200 C V 0 CE 200 J 39 l 200 l 50 mo 200 300 400 50 0 100 200 300 ns ns ns ns ns n5 ns ns quotS noquot is o VGE 00 J L 5 so 100 200 300 4m 50 o 100 200 300 ns ns quot5 quotS quot5 ns ns ns ns Summary of PSpice IGBT Model 39 Model provides reasonably accurate simulations 39 DC static characteristics modelled accurately 0 Transient behavior reproduces observed behavior Quantitative accuracy adequate for most purposes 39 Model runs with reasonable speed comparable with other builtin device models Parts parameter extraction utility program easy to use 39 Simulation results should be compared with experimental measurements 22 4 Summary Summary of PSpice Semiconductor Device Modeling Issues Builtin pnjunction diode models inadequate for power electronics simulation Incorrect modeling of reverse recorvey Builtin pn diode model can adequately simulate behavior of Schottky diodes Builtin MOSFET model inadequate for simulating power MOSFEI s Model lacks vortage variable gatedrain capacitance Built in IGBT model based on a proven model used in other simulators Should provide reasonable simulation accuracy but results should be checked experimentally Several device manufacturers provide downloadable subcircuit models for selected devices which provide signi cantly better accuracy in simulation of transient behavior These downloadable models are accessible from the manufacturers web pages See the page 20 for a partial list of power device spec sheets from four manufacturers that are easily accessible from the WEB The files are often in a PSPICE format for easy downloading to PSPICE Sources of Improved Power Semiconductor PSPICE Simulation Models 0 Motorola 39 General WWW address wwwmotorolacom Specific address httpmot spscomspsGeneralchipsnavhtml Harris 39 General WWW address wwwharriscom Specific addressrhttpwwwsemiharriscomfamiliesmodclshlm 39 Siemens 39 General WWW address wwwsiemenscom 39 Specific addresshttpw2siemensdesemiconductorproducts36368hlm 39 IXYS General address wwwixyscom Specific address httpwwwixyscompspicehtml C PSPICE BUCK PWM CONVERTER SIMULATION EXAMPLES On the following pages we will first use PSPICE to solve for the waveforms in a simple BUCK converter without any feedback IL VIN and VOUT will be plotted versus time for the open loop circuit during startup showing BOTH the high frequency switch signal and the slowly varying components We can also do frequency response plots of the open loop converter to capture the full open loop frequency response Following these two plots we will then turn our attention to the BUCK converter with feedback added to see the effect of external disturbances on the circuit waveforms when feedback is employed First we vary duty cycle to see changes in the BUCK waveforms with fixed VIN Then we vary the load RL suddenly to change IL in steady state but make VOUT return to the value set by the feedback loop 24 W T1 5us Vin SUH PWT1 I u gill llquotlliillllllllquotilililiililllli lquotquot I lllll ll l u Page 1 Above we see the startup conditions of the PWM converter as it cycles towards equilibrium Note that both IL and VOUT vary while the input voltage is constant as evidenced by the steady level of the input squarewave maximum level From plots like this we can better determine any special switch stresses caused by circuit startup The frequency response of the BUCK circuit as simulated by PSPICE is shown on page 25 This plot is just a keystroke away when using PSPICE 25 W L RloadVa1uc 0 5 V0 Rload RloadValue EX 1A AC Analysis From such open loop plots one can employ BODE analysis to anticipate any possible instabilities when feedback is added to the BUCK PWM convertere On the next page we will add feedback to the BUCK circuit by employing a PWM control chip to change the duty cycle on the power switch according to the difference between the control signal and the output voltage feedback to the PWM chip Note as the control voltage varies the duty cycle changes Thus we find that VL ILand the output voltage a vary Note that the magnitude of the change in voltage across the inductor varies as the duty cycle is decreased On page 27 we plot the chances in the circuit waveforms of the feedback BUCK converter as the load changes suddenly We are purposefully lowering the load impedance and increasing the load current while trying to keep the output voltage steady by duty cycle control Peruse pages 26 and 27 to see the waveform changes caused by the external disturbances f m39 1 RloadValue50 l l C Pwmsl vo 0AA 5k Rload 8V I 0 75 PWM ST IOOUF C V Vd T vcontrol d 1C 58 T Rllpadjalue L t l 70 EX2 Buck Converter On page 27 we outline the waveforms for the case of a sudden change in the load impedance at 300 microseconds causing increased load current and changing output voltage The duty cycle readjusts to keep the output voltage constant and return to the nominal value set by the feedback 26 27 A rL LClose300us SuH 10m lAT 1U1 E72 8V J on a w d 1c 108A ISSUE 0s mmos L d dd L 1c55v I 47o d 075 dutyratio EX3 Averaged Buck Converter l z r r l llll r r r Will ll lllll llullll ll ln mmmmi r r r r 4 A it 39 39 l A 4 ll Will mmmnmml t r r t gt W l39H i39ll i39i39lllmHumm Vim For a term paper please use PSPICE to simulate some illustrative PWM converter circuits of your choice LECTURE 7 ILLUSTRATIVE PROBLEMS AND HOMEWORK HINTS FOR OUTPUT FILTER AC WAVEFORMS I ERICKSON PROBLEM 29 A VL1 ic1 input filter vs time VL2 icz output filter vstime B I transistor vs TIME I diode vs TIME C L1 L2 voltsec balance gives steady state voltages C1 C2 charge balance gives steady state voltages D RIPPLE ON INPUT FILTER a C1 AV01 b L1 FOR AIL1 SPEC ll HOMEWORK PROBLEM HINTSANSWER QUESTIONS AND CATCHUP TOPICS LECTURE OUTPUT AND INPUT AC WAVEFORMS CAUSED BY SWITCHING l ERICKSON Problem 29 Input LC filter Buck Output LC filter Fig 232 Q1 and D1 form a two position switch for the double pole double throw switch of the Buck topology For DTSSW on For D TSSW off D1 is off D1 is m Q1 is Q1 is off Switch in position 1 circuit Switch in position 2 circuit topology topology No VL for steadystate DT S S VLZA DT V out C1 DT s I1I2iC All 2 flows in R DT D39T S S i i gt t I2VRO iT WAVEFORM VONTransistor E 0 IoutDC ITDC During DTS Aioutac AiT ac During DTs During DTs interval transistor is on and assumed Von 0 DTS L2 VgV1 0 Wo Vout Transistor V V V Ail 25 9 L1 out L2 During the D Ts interval the current is zero because the transistor is off and D1 is on AiL2 is symmetric abOUt IDC DTS D39TS su SLOPE OF iT RISE VgVL1Vout L2 NOTICE Ipeak IDC Ale AGAIN IN D CONTROL SCHEME Ipeak DEPENDS ON IDC AiL IF AiL RIPPLE IS TOO BIG THEN Ipeak RATINGS OF TRANSISTOR OR DIODE MAY BE EXCEEDED SOLID STATE DEVICES ARE KILLED FOR i gt icritical IN nsec ASIDE CHAPTER 11of Erickson shows a method for current control of a switched converter where the switch transistor current can never exceed a set current We set the value of imax to be below the transistor maximum at this point the transistor is switched off before it is destroyed IE IT gtC Elpeak Switch throws to turn off series transistor before IT IT gtC Elpeak for transistor Now apply vsec balance to all inductors and charge balance to all capacitors L1 VOLTSEC BALANCE GIVES STEADY STATE CONDITION Dvgvc1 D vgvc1 o vg vC1 IN SS L2 VOLTSEC BALANCE GIVES fD EQUALS D FOR A BUCK DVC139 out D 39Vout 0 gt Vout DVC1 Dvg Steady State Buck Converter C1 CHARGE BALANCE Dl1IL D l1 0 I1 Dlz 2 VoutR DVgR gt I1 D2VgR I1 IN TERMS OF V9 C2 CHARGE BALANCE D2VoutR D lLVoutR 0 I2 VoutR DVgR SUMMARIZE STEADY STATE Vc1 Vg l1 DZVgR VC2 Vout Dvg I2 Having all the steady state conditions gives us fd the dc transfer function and all operating effective dc values we next look at ripple to do so we use the simplified analysis CALCULATE RIPPLE VALUES FOR ALL FOUR REACTIVE ELEMENTS AiL1 Are two pole cases where ripple from drive not AVC2 negligible We must take ripple into account Cannot use the small ripple approximation Ava Can use the small ripple approximation for AiL2 these cases L ms 0le T 53 iC1C during DTS I1 2C su iCIC during D Ts I1C NOW IN STEADY STATE I1 DZVgR I2 2AVC1 DZVgRXD TsCo DVgR 2 I VgD ZRAV01 S 2AVo1 sUD Ts C1to specify Avc1 ripple IID TsCI EXAMPLE BUCK CONVERTER STEADY STATE SPECS Vg48Vo36 R4VODVg D 075 and D 025 NOW WE HAVE THE INPUT FILTER WITH V01 LET S SET AVC1 002VCI 2 AS OUR MAXIMUM ALLOWED VOZR Pout 324 W WHAT S O1 VALUE WE NEED TO ACHIEVE 2 RIPPLE SPEC VgDZD39 1 ZRAV01 For fSW 100 kHz GIVES C1 586M For fSW 500 kHz GIVES C1 117UF W Switch waveforms fSW CI K AVG1 and AVG1 known Low AIL n0Ise fSW desired T NEXT CALCULATE L1 VALUES REQUIRED FOR A GIVEN Aim SPECIFICATION AV dt Aiswitch 2mm 2 I C1 A DT 97 dt g J gtt 11 j Av dti is Av I C1 2 2 C1 AV01TS 8L1 AiL2due t0 Avc1 D2D39Vg 2R01 S 2 I D D vg 2 16RL1C1 S 2 I 2 D D ngs2 16RC1AIL1 IMAGINE AIL1 IS ALL EMI AND WE WANT TO MINIMIZE IT so FOR A AIL1 SPEC OF 20 mA ALLOWED INTO THE MAINS FROM THE SWITCHED NETWORK IF fsw 100 kHz L1 60 LIH IF fsw 500 kHz L1 12 LIH AVCI I TS2 AiLI 1 Finally HW1 Due next week 1 Answer Questions asked throughout lectures 12 2 Chapter 2 Problems 2 3 4 and 6 NOW SOME HINTS TO THE HW Ionsiderations for a High Performance Capacitor by Richard Marsh httpwwwcapacitorscomconsiderconsiderht Considerations for a High Performance Capacitor by Richard Marsh Capacitors in Real World Applications Basic Considerations DF 0 and ESR The M alti CAP In Summary Capacitors in Real World Applications The capacitor is one of the primary building blocks of electronic circuits The basic 3f 12 39 1082002 956 AN


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