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by: Dorris Borer


Dorris Borer
GPA 3.84


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Class Notes
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This 2 page Class Notes was uploaded by Dorris Borer on Monday September 28, 2015. The Class Notes belongs to ESE534 at University of Pennsylvania taught by Staff in Fall. Since its upload, it has received 26 views. For similar materials see /class/215452/ese534-university-of-pennsylvania in Electrical Engineering at University of Pennsylvania.

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Date Created: 09/28/15
ESE680OO2 ESE534 Computer Organization Day 1 January 8 2007 Introduction and Overview Today Matter Computes Architecture Matters This Course short Unique Nature of This Course Change More on this course Hun Review Two Universality Facts NAND gate Universality We can implement any computation by interconnecting a sufficiently large network of NAND gates Turing Machine is Universal We can implement any computable function with a TM We can build a single TM which can be programmed to implement any computable nction PennEbEEBDlJUmengDW 792mm On Prerequisites Suggested ESE200201 or CSE240370371 some exposure to boolean logic basic logic circuits C8262 compute models universality PennESEBBierilepllngl T VDEHun Review Matter Computes We can build NAND gates out of transistors semiconductor devices physical laws of electron conduction mechanical switches basic physical mechanics protein binding promotion inhibition Basic biochemical reactions many otherthings Penn EsEaannnz swmznm 7 new Starting Point Given sufficient raw materials can implement any computable function Our goal in computer architecture is not to figure out how to compute new things rather it is an engineering problem Pym ESEBRUVDUZ Spllm m 7 Del tan Engineering Problem Implement a computation with least resources in fixed resources with least cost in least time in fixed time with least energy Optimization problem how do we do it best Penn ESE680002 Spring2007 DeHon Quote An Engineer can do for a dime what everyone else can do for a dollar Penn ESE680002 Spring2007 DeHon Architecture Matters How much difference is there between architectures How badly can I be wrong in implementingpicking the wrong architecture How efficient is the lA32 lA64 Is there much room to do better ls architecture done A solved problem Penn ESE680002 SpringZOO7 DeHon Peak Computational Densities from Model Small slice of space only 2 parameters 100x density across anally quot l l quotl Large difference in peak densities I A w r quotlt I II 7 V H 1 7 VIDE 339 5 n F in h I r r 7 i Ea 395 E lar e desI n a l w 77 iE V i w i 39H 539 Iim 3 LEE Ill LE Space II ISlrl Ept 39li till 10 Penn ESE680 002 Spring2007 DeHon Yielded Efficiency 128 31 DGSIQH W 54 DEEEQH Ila 50 16 rl 4 FIE E DE A a 5 I 391 quotn H l39 in Edi 5K 7 l4 r J ll 7 l 7 for g 39 39 l V A I II I ill 1 7 7 I m I y ll n I mu W l I ll in E m II I In a l I I I 1 39 a quot F 5 l 3 QH m a PallI Length FPGA cw1 Path Lenth Processor 61024 w64 Large variation in yielded density large design space Penn ESE680002 Spring2007 DeHon 11 Architecture Not Done Many ways not fully understood design space requirements of computation limits on requirements density and the costs are changing optimal solutions change creating new challenges and opportunities 12 Penn ESE680 002 Spring2007 DeHon


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