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by: Shayna Romaguera

MicroelectronicCircuitsII EGR392

Shayna Romaguera
GPA 3.52


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This 98 page Class Notes was uploaded by Shayna Romaguera on Monday October 5, 2015. The Class Notes belongs to EGR392 at Central Michigan University taught by QinHu in Fall. Since its upload, it has received 29 views. For similar materials see /class/218936/egr392-central-michigan-university in Engineering and Tech at Central Michigan University.


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Date Created: 10/05/15
63 IC Biasing Current Sources Current Mirrors and CurrentSteering Circuits 633 BJT Circuits f Q and Q2 are matched that is they have the same EBJ area If the area of the EBJ of Q2 is mtimes that of Q Figure 68 The basic BJT current mirror Here In is the current transfer ratio In general it is given by IO IS2 Areaof EBJof Q2 V V i Note C Se 55 l REF IS Area of EB of Q1 63 IC Biasing Current Sources Current Mirrors and CurrentSteering Circuits 633 BJT Circuits The effect of finite transistor 3 on the current transfer ratio 1m IC 2IC IC13 3 IO IC 0 1C 1 REF IC12 12 gtoo IO gt1 i 1 i REF Figure 69 Analysis ofthe ement minor taking into account the nite ofthe BITS If 100 a 2 error will occur in the current transfer ratio If the current transfer ratio is m The finite outputresistance for BJT mirror R E AVO r02 2VAZ O AIO IO Taking both the finite i3 and the finite R0 the output current of a BJT mirror with a nominal current transfer ratio m m V V 1 1 1 0 BE 0 REFlt m1gtlt V gt Example Consider a BJT current mirror with a nominal current transfer ratio of unity Let the transistor have IS 103915A B 100 and VA 100V For IREF 1mA find IO when VO 5V Also find the output resistance Current Steering Vcc VEE VEB1 VBE2 R Assume high 3 gt small base currents Assume small Early effect All transistors are matched I REF Q1 and 03 current mirror I1 IREFH VC SVCCOSV Q5 OB and Q1 current mirror 393 2REF 02 and Q4 current mirror 392 IREF Va Figure 611 Generation ofa number ofconstant Q7l Qgi 09 and 02 CU rrem mirror currents of Various magnitu es I4 SIREF Chapter 6 Single Stage IntegratedCircuitAmpli ers 64 Highfrequency response general considerations lll mm 3010 Hui I lul fault Figure 612 Frequency response of a directcoupled dc amplifier Observe that the gain does not fall off at low frequencies and the midband gain AM extends down to zero frequency Slide 22 h1 Homework assignment 1 hulq 2102009 Background A Graphical Interpretation of Poles and Zeros Transfer function Hs 1s1 TranSfer function HS 81 Ref http www chem mlu edulbcocm416PolesAndZeros html 64 Highfrequency response general considerations 641 The Highfrequency Gain Function With the internal transistor capacitances the general form of the amplifier gain is 145 AMFH 5 AM is the midband gain equal to lowfrequency or DC gain 1swz11swzz1swwI 1 swP1swpz1swpnl FHS Here 0171 0172 017 are positive numbers representing the frequencies Of the n real poles a d Oz Z n 0w are positive negative or infinite numbers representing the frequencies of the n transmission zeros Note s gto FHsgt1 As AM 64 Highfrequency response general considerations 642 Determining the 3dB Frequencny Dominantpole response This is the transferfunction of a low pass network with my E Uni As a rule of thumb a dominanfgole exists if the lowestfrequency pole is at Least two octaves afactor of 4 away from the nearest pole or zero If there is no dominant pole existing the 3dB frequency wH can be get by 1 1 1 1 0 El 77m 277 H ltw2 232 gt 02 ml gt P1 21 21 Example 65 The highfrequency response of an amplifier is characterized by the transfer function 1 s105 F HU 1s1041s4x104 Determine the 3dB frequency approximately and exactly Solution The lowest frequency pole at 104 rads is two octaves lower than the second pole and a decade lower than the zero so it is the dominant pole a 1 L H 1042 4x1042 1052 9800rads 28 le dB Us Bode plot i ii i l I x quotI rads 5 X103IO 2 gtlt10 4gtlt 10 105 2x105 4gtlt to5 lug scale 1 9537 rads Figure 613 Normalized highfrequency response of the ampli er in Example 65 64 Highfrequency response general considerations 643 Using OpenCircuit Time Constants for the Approximate Determination of fH If zeros and poles are not determined the transfer function has the following form F 1alsa2s2 ansquot s H 1b1s b2s2 bnsquot The coefficient b1 is given by 1 1 1 bl 7 77 wPl wPZ 0P n The value of b1 is computed by summing the individual time constants called opencircuit time constants b1 2 Z CiRiO i1 If the zeros are not dominant and if one of the poles is dominant So the upper 3dB frequency will be approximately equal to mp1 1 1 a E H b1 ZCiRiO Example 66 u The high frequency equivalent circuit of a common source MOSFET amplifier is shown below The amplifier is fed with a signal generator Vsig having a resistance Rsig Resistance Flin is due to the biasing network Resistance R L is the parallel equivalent of the load resistance RL the drain bias resistance RD and the FET output resistance r0 Capacitors Cgs and ng are the MOSFET internal capacitances For Flsig lOOkQ Flin 420kQ Cgs C d 1pFgm 4mAV and RL 333kQ find the midband voltage gain AM VON and the upper 3 dB frequency fH Rm Czd sig V M Solution The midband gain can be obtained bythe following equivalent circuit b the equivalent circuit at midband frequencies V V V AM i4ig ng27R Vszg Vgs Vsig Rm Rsig 4gtlt333gtlt 108VV 420100 The 3dB frequency can be determined by the method of opencircuit time constant The resistance Flgs seen by C95 is R o Rm Rgs Rm Rsig 420k 2100k 2 808kQ I c circuit for The open cIrcuIt tIme constant of Cgs Is determining the resistance seen by C 95 1g C ESRES 1gtlt10 12 X808gtlt103 808ns The resistance Flgd seen by ng is by setting Cgs 0 and shortcircuit Vsig Atest current IX is applied in the circuit shown below V V At node G IXZ Ri R gs Igt Vgsk IR Sig in RtR R in mg VC At node D JC 2 nggS gS l RL 1 R V R V u I 1 R X Rz gt X gm R2 R2 quot39 39 1X gm1XR39 I i m d circuit for determining the resistance seen by Cw 35 The resistance Flgd seen by ng is Rgd R R nggR 116MQ The open circuit time constant of ng is ng ngRgd 1gtlt10 12 gtlt116gtlt10quot 1160ns The upper 3dB frequency wH can now be determined from 1 1 wH E 7 79806krads 185 ng 808 1160gtlt10 fH 7H 21283kHz 27239 b For 2 as a 1pF capacitance employing Miller s theorem results in the equivalent circuit below Here 2 1sC Z 1sC 1 1 1 K 1100 slt101C BMW Z 71SC 71 lc 101C 1o1Fl 2 1 1K 11100 s101C 7 The Voltage gain V0 E V 100gtltL 100 VSg Vng ZIRSZg 1RWZ1 7100 7100 lsCang lsgtlt101gtlt10 gtlt10gtlt103 100 igVV lsgtlt101gtlt10 41 This is a first order lowpass network with a dc gain of 100 and a 3dB frequency f3dB of 1 9 1567kH f3 27rx101gtlt10 6 Z Tips If the bridging or feedback is a resistor the input resistance is smaller than the bridging resistance divided by 1 k is larger than the bridging capacitance multiplied by 1K If the bridging or feedback is a capacitor the input capacitance 65 The commonsource and Commonemitter ampli er with active load 651 The CommonSource Circuit tilJ A vvv I k grill 0 l Gal 0 It The drain resistance RD is replaced by a current source which can be implemented by PMOS transistors 80 the CS amplifier is said to be activeloaded hi 65 The commonsource and Commonemitter ampli er with active load 652 CMOS Implementation of the CommonSource Amplifier quot u quot00 H Assume 02 and 03 are matched REF Q2 in Q7 in rrinde saturation Slope L ale 113 A l Cl 0 W55 lvrpll Vs fr 1quot lvrritl VSD h in CS Amplifier Q in irimic gt1lt g m summon i B an n V VDDVO VSD2 VDD39VDs1 1m Vin Vin H sr i V54 Vim quoton i 1h i mll viii iani vm Alurmiun riode umi l Salumrion Sal umi inn Trioch Salur39 ion quot2 As a part of a current mirror Q2 should be i saturation to be a current source Since Q2 and Q3 are matched IREF Q2 exhibits a finite incremental resistance r02 r02 IIVAZI REF gm1 Equivalent Circuit Example 68 Consider the CMOS commonsource amplifier below for the case VDD 3V Vth th 06V unCoX 200 pAVZ and upCoX 65 pAVZ For all transistors L 04pm and W 4 pm Also VAn 20V IVAp10V and IREF 100pA Find the smallsignal voltage gain Also find the coordinates of the extremities of the amplifier region of the transfer characteristic that is points A and B lVIII l Solution gm 2J2kwL11REF x2X200X40 4X1000 63mAV r01 VAquot um 20V01mA 200m r02 VAP 1D2 10V01mA100kQ Av gm1 r01 r02 063m4Vgtlt200100k 2 42V V The extremities of the amplifier region region lll First VSG of 02 and 03 can be calculated because of ID1 lREF 100uA Vim 1 W 2 V D 25k 13VSG IVW I 1 V 1 4 06IV I 100 Emma WOW I2 1 0v3 AP ll IVOV3 392 Al VSG 06053113V a v v e v m up till I Q CulolT Q Saturation Q2 Trmde Q Saturation 1 Lu Q sanmon V V V 2 Q Trrode 0A DD 0V3 39 l W Q2 Salurunun V01 Vm VH V13 V01 7 Vm u d Since 101 102 v0 1 IVAnI 2 I W V V kP 2VSG IVW Mum L Mi 1 W EMZMVI Vm21 After simplification v0 769 6577v 062 Since VOA 247V use above equation we get VIA 088V We knowthat VOB VIB Vm put this relationship in the above equation V 093V and V0 033V In another special case assume 02 is in saturation and O1 is in cutoff vi Ill A Of VGSt Vt Oz 1 W I knfVGS2V2 2 l VGS2 Vt 1l21kWL Vr J V0V Note Here Vov is the overdrive voltage corresponding to the drain current l2 instead of l Vidmin VG51 VG52 2V K xEV0V J V 2V0V s vid 3 JEVOV VOV 1 kWL 0V Exercise 72 n For the MOS differential pair specified in Ex71 find a the value of vid that causes O1 to conduct the entire current I and the corresponding values of vD1 and VD2 b the value of vid that causes Q2 to conduct the entire current I and the corresponding values of vD1 and VD2 c the corresponding range of the differential output voltage szvD1 kn Rn 70 Lg LT L H 1 7 V Iet VDD VSS 15V k nWL4mAN2 Vt 05V I 04mA and RD 25m and neglect channel length modulation Ill Discuss Vlm RD 1 y Q l l I V Vid VGS1VGS2 I lD1lD2 Note If itM increases by Al iD2 will be decreased by Al The output will be increased by 2AIFFD which is proportional to the differential input v d 71 The MOS Di erenlial Pair 713 LargeSignal Operation Assume Q1 and Q2 remain in the saturation region 1 W t 1 W lD1Ekn ZVGSl Vx2 VlD Ekn ZOJGSl Vx 1 2 t 1 W EknfvGSZ t 39 l EanOGm Vx t t 1 W 1 W VlD1lD2 EanWGm VGSZ Eknfvld leHDZ 1 2 iD1 k1v d 1 Ik39i gt L 2 iD2 MERE 1 2 L 2 Ikgi Special case L V121 lDlle2ZI2 VGs1VGszz GS HereVGS V0V V IkWLV So iD1 and iD2 can be expressed in an alternative form I I I v vi 2 1D1777d 1d72 2 VOV 2 VOV i ivj 1M2 D2 2 VOV 2 VOV L I l 714 l0 706 mm 5 v4quot I m 1 m ll 1lvi2 I 2 2 VOV 4 VOV ll vii 1l 2 I 2 2 VOV 4 VOV If vidZ is much smaller than VOV the following equations I I v v 2 1m lt gt 1 lt 1 gt2 2 V0V 2 V0V I I v v 2 lDZ 111 1Id 2 2 V0V 2 VOV I I v 1m zEV 2dIDlld would change into W I I vld z z lt gtI z D2 2 VOV 2 D2 d I vi l The increment current 11 VOV 2 u l v a 01 v Vm 7 n2 v vm m v V quot 7 ll 3 V vM 04 v vH 7 M v gt i500 JOU 300 i200 lOO IUU 300 300 400 500 I39mlmVl V T gt Linear range of operation T 0V 212 Butsincegm V 1 gt Av J 0V 7 2 SmaH rsfgnaf Opera on of The M08 D feremiaf Paw 721 Differential Gain Vm Ru Ru o 0 f Gfo l Ln ngl OG msmwfz r uuzvurwnmz 1 Vm m 19 AC analysis a a i Z I m VOV 2 RI RI g Via u rm If f m 2 21 2 v g R v 0 m D 1d Iv3930TI Q lt gt0 IIfO w3 Hmml n r7 v The differential galnls UV h 2n Vid Vid idz z lgm1gm 2gm V02 ZidRD v01idRD V0 V02 V01 ZidRD ngDVid An alternative way of looking at the smallsignal operation of the circuit Effect of the MOSFET s output resistance ro llZ O I4O wZ Hum ll Ir h Equivalent circuit for determining the differential gain Each of the two halves of the differential ampli ercircuit is a commonsource amplifier known as its differential halfcircuitquot 7 3 The BJT Dmerennal Paw 733 SmallSignal Operan39on I gm gm i 1 The collector Current When 14d is Applied DC component a a ICIaIE17 IC2aIE2T AC component r Vi VT 8 I 2 1 Vi 2 2r M i it sz quot b 1 12re av z 0ae 1 it 24 v Ridd lb 3 12n 2r A differential amplifier with emitter resistances fry R quotR Ic flu 7 quot iv quotPM im rim gt up my le39v Differential Voltage Gain A V62 V61 aRCvM 2re aRCvld 2re d v Vid 1 aR C ngC re For the differential amplifier with resistances in the emitter leads Ad a2RC aRC Rc 2rg2RE rERE rERE Halfcircuit for differential input signalsl gt lar Hum n ht Figure 719 Equivalence of the BJT differential amplifier in a to the two commonremitter amplifiers in n 1 1 1 quot1 v 39 Fitherof 39quot amplifiers in L L to 39 differential 39 39 frennenc response and so on of the differential amplifier The diffeten al ampli etfed in a singleended fashion I u l A h I gure 721 a The dl cxcnual halmmm and m quot5 equwalcm cucunmodd Di erenlial Voltage Gain 01 a singlerlead Vol Ad vi 2 i738 Find the voltage gain and input resistance of the amplifier in the circuit assuming that 37100 S V 75 k l gt 200 Q vw m 1 mA Example 740 The differential amplifier circuit shown below utilizes a resistor connected to the negative power supply to establish the bias current I For vB1 vid2 and v82 vid2 where vid is a small signal with zero average find the magnitude of the differential gain vovid Assume oi1 5V commonmode half circuit uh lhl Figure 722 a The differential amplifier fed by a commonmode voltage signal vW 1 Equivalent halfcircuits for commonmode calculations H Commonmode Gain and CMRR of a Singleend 06R Q1 V21 lcRC 2 meRC 2 0 m RC 2 C View 2REE re 2REE The same to 02 Vim V52 2 05 RC 2 Vim 2REE re 2REE UdRc The commonmode gain of a singleend Am 2REE 1 The differential gain of a singleend Ad 2 E ngC i R A gm C R CMRR 2010g 7 1 2010g27 2010g g EE 2 2010gngEE Am RC 05 ZREE l Effect of RC mismatch on CMRR UdRC v1 v ZREE re icm R AR V Mvm 2 ZREE re UtARC v v v v 0 2 cl Icm ZREE re hmIi nil The commonmode gain is 39 i n A aARC zaARC aRC ARC m ZREE re ZREE ZREE RC i Acm for the singleend i 50 II Common mode Input Resistance Ricrn 4m II R R IIR 21R lcm icml lcm 2 2 icml 2Ricm re r0 ZREE gtgt re icml Rm 3 lt 1gtltREE II 3 51 Example 71 The differential amplifier uses transistors with 3100 Evaluate the following The input differential resistance Rd The overall differential voltage gain vovsig neglect Q The worstcase common mode gain if the two collector resistances are accurate to ISV within i1 o d The CMRR in dB The input commonmode Ru r 200 1 I l mA 8 resistance assuming VA 100V 8 7 The Commoanale and Commonrbase Ampliliers With active Loads 671 The Commongate Ampli er I l A l I for G ab H R VW oi 6 I a Activeloaded commongate amplifier a The Body Effect D The body terminal acts as a second gate for the MOSFET i1 vgsgmgmb v v v Here gm is the body transconductance gm ngl01t0 02 p 1 3 gm Emil b MOSFET equivalent circuit for the CG case in which the body and gat terminals are connected to ground b Small Signal Analysis l I w UR i Vi 18m8mb zizzm gmbvi Vi V0r0 la RL D 2 gm gmb 1r0vl 40 I 0 lti Since li 10 the equation above can 03 7 1 be written as V 1 e R C ii gm gmb 1r0vi 1 L i a c Smallsignal analysis performed R 2 RL directly on the circuit diagram with the m 1 1 g g by 69 T model of b used implicitly m m 0 Discuss 1 If r0 am Rm 1gm gmb almost the same as that for discrete CG amplifier 2lf RLr0 Rin228m8mb 3fRLoo R zoo Tquot In R d Operation with the output opencircuited 7O v0 Ira vi ii ff gmgmbr0vi vi 39 v i i39 Aw 1gmgmbro Vi Ftm can be written into a new format 2 re RL 2 1 gm gmbr0 v iRL RL 0 0 i 0 AV 2 2 Vi liRin R39 m 3 1 If Substituting for Ftm R Gv Gvo L RL r0 Av0Rs 72 v U g gmmr v v 2139st 1 open circuit Rout 2 r0 1 gmbr0 Rs v 0 x R r AWR I gum tnwgmm Figure 630 Equivalent ciicuit of the CG amplifier illustrating its application as a cuirent buffer R1n and Rout are given in Fig 629 and G AW RARom 1 G G S 1 gt CurrentBuffer since Rm 2 7 0 AWRS and Gw 2 AW ll igiihrl b Equivalent circuit for the case in which r0 is neglected f 1 P2 27rngCLRL Normally fp2 is lower than fm Thus fp2 can be dominant They both are usually much higher than the frequency of the dominant input pole in the CS stage b Analysis with ro 3 iquot R l k Rgd RL Raul f39lj Ll f H 27rCgSRgS ng CLRgd Figure 632 Cifbiiits for determining Rgx and Rgd l Example 611 Consider a commongate amplifier as follows WL 72umO36um pnCOX 387uAN2 r018kQ ID 100uA gm 125mAV 202 RS10kQ FiL 100kQ Cgs 20fF ng 5fF and CL 0 Find AVG Rm Rout GV Gis G and fH l iii 1 lt 11 quot l Solution Am 1gm gmbr0 1125125gtlt02gtlt18 28VV R nRL 18100 in 42kg Aw 28 Rm r0 AWRS 18 28x10 298 kg GVGW RL Aw RL 8 100 7VV RL r0 A20RS RL Rm 100298 R 28x10 0 s 2 13 AW Rm 8 094 VV G G 07 AA z x R Sw0947 R0 RL 298 100 RgsstllRm 1OII423kQ Rgd RL Rm 100I 298 75 kQ Hc R cnggd 20gtlt35gtlt75435ps 85 85 1 H 7 12 366MHz 27 27rgtlt435gtlt10 7 2 SmaH iswgne Operanon ofThe MOS Dmerenua Paw 722 CommonMode Gain and CommonMode Rejection Ratio CMRR o o o mm 2R Bumd n I 1 lh Vzcm Vzcm 1gm2RSS z ZRSS V01 V02 RD gm ltltRSS RD 3 Singleend i l 2RSS lAd2ngD ACWL i l f 2m Humu m I h CM halfcircuit Discuss 1 Effect of RD mismatch on CMRR If 0 has load RD and Q2 has load RDARD RD Vol vzcm ZRSS ARE I Vin Vol View R D ARD ZRSS V02 vzcm 2R 55 ngD 2ng55 m AREMess ARERD Discuss 2 Effect mfgm mismatch on CMRR ldl gmlvgsl ldz gmlvgsl Vgn 1 m 1 1 7477 Vm llgm12RSS 12gm1RSS zgmlRSS i glem i ngVzcm 41 2 R dz 2 R I gml SS ng SS 40m V02Voi leRD la39lRD Ag RDld1le vmm Example D 713 Here is a circuit for a differential amplifier with an active load Here Q and Q2 form the differential pair while the current source transistors Q4 and Q5 from the active loads for 1 an I respectively The dc bias circuit that estab2lishes an appropriate dc voltage at the drains 0 an 39 0 that the e uivalent differential halfcircuit is an activeIoa ed commonsource transistor of the type studied inISection 65 It is required to design the circuit to meet the followmg specifications is Differential gain Ad 80 VV iti REF 100pA 391I39hSeVdc voltage at the gates of Q6 and Q3 is in The dc voltage at the gates of Q7 Q4 and Q5 is 1 5V The technology available is specified as follows 0X 3 upC 90uAV Vm lV pl07V lVApl28V Specifythe reqUIred value OH and the WL ratios for all transistors Also specify ID and WG at which eac transistor is operating 39 calculations you may neglect channel Iength modu ation 73 The BJT Differential Pair 731 Basic Operation Figure 712 The basic BJT differentialrpair con guration 1c nll Exercise 77 Find V5 and v0 and v02 in the circuit Assume that VBE of a conducting transistor is approximately 07 V and that 0 1 is v 7 8 The BJT Diiierentiai Pair The differential input causes the redistribution of currents in Q and Q2 732 LargeSignal Operation I 39 S VElivEVT lEl ie I v s v 7vV 1E2ie 32 E T 0 fEl ewgrvmVT 1132 z 1iE2 I I I 1 8ervmVr 1 eivmVT I ZEl I ZEZ 1eltvwvmgtVT 1emVT The ratio of the two emitter currents is determined by v d 33 395 I Normalized collector current 04 02 I l 10 8 6 4 Normalized differential input voltage 5 7 Linear region V 34 w I mI i R 20v l m IUVT l IR o l IRL u 1 llr luvr 4 m 20v Increase the 724 720 16 712 78 4 u 4 S 12 m 10 24 v linear range of operation b Figure 715 The transfer characteristics of the B T differential pair a can be linearized b ie the linear range of operation can be extended by including resistances in the emitters Exercise 78 For the BJT differential pair find the value of input differential signal which is sufficient to cause iE1 099l Design the circuit to provide a differential output voltage of 1V when the differential input signal is 10mV A current source of 2mA and a positive supply of 1 OV are available What is the largest possible input commonmode voltage for which operation is as required Assume d1 CHAPTER 7 Differential and Multistage Amplifiers Chapter 7 Differential and Multistage Amplifiers 71 The MOS Differential Pair 71 The MOS Differential pair 711 Operation with a CommonMode Input Voltage Vim Rn In In w m Am I Div OW m lb I Ql Q l 7w iclilm C quotav III EX amp 16 E E 3 For the MOS differential pair with a common mode voltage vCM applied as shown in the figure below let VDD VSS 15V k nWL4mAN2 VI 05V I 04mA and RD 25m and neglect channel length modulation Find VOV and VGS for each transistor For vCM0 find v5 im iD2vD1 and v02 Repeat b for vCM 1 V Repeat b for vCM 02V What is the highest value of vCM for which Q1 and 02 remain in saturation lf current source requires a minimum voltage of 04 V to operate properly what is the lowest value allowed for v5 and hence for vCM Solution a Assume Q1 and 02 are in saturation mode I 1 kEV0 2 gt V0V 1kWL VOA4 0316V 2 2 L VGS V0V V 031605082V b Referto Fig 73 a VS1 Vsz0 VGS 082V ID1ID2 I202mA VD1VD2 VDD RD215 02gtlt251V cd can be done in a similar way VLSV Himv r m Mn 7 HI CD 04 mA e VCM has maximum value when vDS vGSVt vCMmX K VDD gtltRD 0515 02gtlt2515V f VCMmin Vss V1 VGS 15040816 028V Vi quotu u m im gkiyoi ii AN 9 Li m 71 The MOS Diiieremiai Pair 712 Operation with a Differential Input Voltage 71 In Vid VGSl VGsz vid VGSl VGsz If vid gt0 vGS1 gt vGS2 lDl gt lD2 vad VDz VD1gt 0 le lt VDz If Vid lt 0 vGSl lt V052 lDl lt lD2 le gt VDz vad VD2 VD1 lt 0 If Vial 0 vGSl ZVGsz lDl 2102 le VDz vad VDz VD1 0 Note The differential pair responds to differencemode or differential input signals 9 In a special case assume 0 is in saturation and 02 is in cutoff 01 I 1 k W 2 Z VGs1 2 quot L vGSlet121kWL V JEVOV Here V0V IkWL Note Here Vov is the overdrive voltage corresponding to the drain current l2 instead of l QZ VGS22VZ Vsz Vt vidmax VGSI vs V EV0V V I JEVOV Exercise 79 In the circ 1 Hit l 1mA VCC RC kQ with d 1 and let the Input voltages be vB1 50005sin21Tgtlt1000tvolts and vI32 50005Sln21Tx1000t volts If the BJTs are specified to have v E of 07 V at a collector current o1mA find the voltage at the emitters Find gm for each of the two tranSIstors Find iC for each of the two tranSIstors Find yo for each of the two tranSIstors Find the voltage between the two collectors Find the gain experienced by the 1000HZ signal 74 Other Nonideal Characteristics of the differential Amplifier 741 Input Offset Voltage of the MOS Differential Pair Vlm Rn y Vim R1 Mismatch in load resistances Mismatch in WL Mismatch in Vt hi Figure 725 a The MOS differential pair with both inputs grounded Owing to device and resistor mismatches a nite dc output voltage V0 results b Application of a voltage equal to the input offset voltage VOS to the terminals with opposite polarity reduces V0 to zero l Case 1 Q and 02 are perfectly matched but RD and R02 show a mismatch AFiD RD1RD RDZZRD7 2 2 I AR VDlVDDERD 2D I I AR at V0 VD2 VD12 ARD VDZVDD RD D 2 2 2 I V V0 V EARD VOVARD i 770 2 Ad ngD IVOVRD IVOVRD 2 RD Note gm 2DV0V IV0V VOS l Case 2 mismatch in the WL ratio of Q and 02 W W 1 K1K1AK ltigtzir L L 2 L L L 2 The current I will not be equally divided between Q and 02 W M I I AWL II AWL 12 2 2 2WL 2 2 2WL M21142 1 w 2 WL Due to the mismatch in WL ratios 1 AWL V 05 WL Xd ngD IVOV V0 AIRD 2 WL thWL 2 l Case 3 mismatch between the two threshold voltages v1VAV v2V 2 2 1 W AV IlzganOGS lt 2t2 1 W AV ikniVGS t21 if 2 L 0 tltlt GS t 1 W AV I AV sikrwgs Vfa gt7lt1 gt 2 L VGS t 2 VGS t 1 W AV I AV I sik39i V V 21 717t 22mm gtlt VGFV lt gt A1 11 12 IVAV V G The total input offset voltage can be found as Q v z hwz 2 vlt2 gtlt2 W A 4 05 RD L Exercise 710 A MOS differential pair is operated at a total bias current of 08mA using transistors with a WL ratio of 100 pnCOX 02mAV2 VA 20 V and RD 5K0 Find the three components of the input offset voltage Let ARDRD 2 AWLWL2 and AVI 2mV Get an estimate of the total VOS 74 Other Nonideal Characteristics of the differential Amplifier 742 Input Offset Voltage of the Bipolar Differential Pair Va Va Figure 726 a The BJT differential pair with both inputs grounded Device mismatches result in a finite dc output V0 b Application of the input offset Voltage V05 V0Ad to the input terminals with opposite polarity reduces V0 to zero H Case 1 Q and 02 are perfectly matched but Flo and R02 show a mismatch ARC AIeC C VOS I VT Case 2 Mismatch in the emitterbase junction areas of Q and 02 will result in the mismatch in the scale currents IS I AIS VOS VT I S The total input offset voltage AR AI V V C 2 S 2 as RC IS 74 Other Nonideal Characteristics of the differential Amplifier 743 Input Bias and Offset Currents of the Bipolar Pair Input bias currents B1 2 B2 E 1 6 In ut offset current 390 OS 32 I Bl I M M l mz z 2 Mismatch in 3 I 12 11 Bl 16A62 21p 23 IBZZLJLO 16 A 2 216 26 m IOS 13 3 2 2 1 2 13 3 75 The differential Ampli er with Active Load 751 DifferentialtoSingleEnded Conversion Vin It 0 39 7 nIO i Q Q 0 quotl hll J I Ignore the drain current of Q Eliminate the drain resistor of Q1 lquotA Figure 727 A simple but inef cient approach for differential to singleended conversion 75 The differential Amplifier with Active Load 752 The ActiveLoaded MOS Differential Pair DC analysis VIN h Figure 728 a The activeloaded MOS differential pair b The circuit at equilibrium assuming perfect matching AC analysis An ac current is generated by 39 r 7 Ly the current mirro vl Iii2 Convert the signal to singleended with no loss of gain c The circuit with a differential input signal applied neglecting the r ofall transistors 7 5 The dillerenlial Ampiiiier with Active Load 753 Differential Gain of the ActiveLoaded MOS Pair Determining the shortecircuit transconductance Gm invidof the activeeloaded MOS differential pair Figure 729 Z N3 o A H Q 3940 i M The transconductance Gm v 1 Vg3 8m17dmll 703 II 701 r07 and r03 gtgt1gm gm th v z 7 7 g3 gmxz t v lo gm4vg3 gm2d M gm V V gm1 jdH gm NOW Since gms 9m and 9m ng 9m l0 gmvid i 0 Gm gm Vid The Output Resistance HO gm gm2gm and gm2r02gtgt1 Differential Gain v i R G v R Ad 0 0 0 m m 0 Gng gmrt72 IIrOA vld vld vld For Me case r02 r04 r0 Intrinsic gain A 1 a d gmra 2 2 l Exercise 763 In a version of the active loaded MOS differential amplifier a transistors have k WL02mAV2 and VA 20V For VDD 5V with the inputs near ground and a 100uA or b 400 uA calculate the linear range of Va the gm of Q1 and 02 the output resistances of 02 and Q4 the total output resistance and the voltage gain 75 The differential Amplifier with Active Load 754 CommonMode Gain and CMRR AC analysis Figure 731 Analysis of the activeloaded MOS differential ampli er to detennine its commonmode gain 71 i1 i2 z Vii 2 19 2RSS R1 R02 2 r0 2RSS1 gmro 0 1 1283 l1 I 03 m3 0V 3 1 14 218quot gm4vg3 llgm4 m3 H r03 1 Va 2 l4 l2r04 llgm4g r03llr04 m3 703 gm3 1 view 704 View 2Rss lgm3 703 72 gm 04 2Rss 1gm3r03 1 r 04 2RSS1gm3r03 IA CMRR I Aquot gmrl72 r042gm3RSS 02 r04ru and ng gm lCMRR gmroxngss 7 5 The differential Amplifier with Active Load 755 The Bipolar Differential Pair with Active Load quota 1 The shortcircuit Lransconductance Gm iovid l I I 939 quot Mir 39m Tl A J it f 1r 0 1 1 o r 9 u l L In HEMZ gt1 full1 o 1 v ml rm 1 w w my Figure 732 a Activeloaded bipolar differential pair b Smallsignal equivalent circuit for determining the transconductance GmiCVH 74 The transconducance Gm cont Vld Vld Vba 78m 7023 H rm rua C1 39 gmrea 7 VtA3 VMY the collector current 04 MI be v gmAVbA igmAgmlre37ld v v v in Mi mV mi m HA 53922 5394 53922 343132 Now since gm gm2 gm gm and IE3 19quot lo gravid Gm 75 l 2 The output Iesismnce R0 R02 2 oZ1 gmz 1r z nz gmzclgtz2m quot4 it i Vx Vx l lt7 R 2r 7 V 2 2 2 0 0 quotV 9 y V V V I 3r lx22l x xix quotl 704 702 704 6 V r r x 1 Ro r02r04 c Equivalent citcuit fox detetmining lx ND 2 l l 3 Differential Gain Ad Ad V0 GmR0 gm II r04 Vid For the case r02 04 1 A0 Ad Egmro Rd 2 Zr 77 l 4 CommonMode Gain Acmand CMRR Vicm l1 l2 f EE am 1 g P vb3 zl r3 r03 r14 7K IN m3 0 Va gm4vb3 i2r A V0 Refer to 7171 m vm 3REE on Page 737 2R CMRR 739 Ad 39I gma r04L3REE m r 1 CMRR5 3ngEE I Exercise 713 For the activeloaded BJT V differential amplifier let I O8mA VA 100V and B 160 Find Gm R0 Ad 01 E I Q and Rid If the bias current 7 source is implemented Q with a simple npn current mirror find REE Am and E CMRR i EX 741 For the differential amplifier shown below identify and sketch the differential halfcircuit and the common mode halfcircuit Find the differential gain the differential input resistance the commonmode gain and the commonmode input resistance For these transistors B 100 and VA 100V lSV 65 The commonsource and Commonemitter amplifier with active load 653 The CommonEmitter Circuit Va h Figure 619 a Activerloaded commonremitter ampli er b Smallrsignal analysis of the ampli er in 3 performed both directly on the circuit and using the hybridrzrmodel explicitly 66 HighFrequency Response of the CS and CE Amplifier 661 Analysis using Miller s Theorem CS amplifier C v v iv grin G II i n ng g T CK Ii Relating formulas V0 AM Vsig 1 1 sCinRsig wH Standard LP AM 1 fH inRsig Cm Cg ng1ng2 66 HighFrequency Response oi the CS and CE Ampli er 662 Analysis using OpenCircuit Time Constants Rgd Rug 1 ngi R2 1H Cgngs ngRgd CLRL CgsRsig CW Rug 1 ngg R CLR Zzn39H fHE It CL is substantial this analysis yields a better estimate of tH than that obtained by Miller s theorem Example 69 A CMOS commonsource amplifier of the type shown below has WL 72umO36um for all transistors unC0X 387 uAV2 upCOX 86 uAV2 REF 100 uA VA 5Vum and AV 6V pm Please find out the midband gain AM For QH Cgs 2 t ng 5fF CL 25tF and RW 10kQ Assume that CL includes all the capacitances introduced by Q2 at the output node Find tH using both the Miller equivalence and the opencircuit time constants I 1D 1 loomguncmlt gtv v VOV 016V gmleVOV2 IOOyA0162V125WUV r01 VAnIDI 5x036V01mA18kQ r02 MAUI 6X036V01mA 2mm AM gm1r01 r02 125rm4Vgtlt18216kQ 123VV Using the Miller equivalence Cm Cgs ng1 ngD 2051123 865fF 1 1 f 72 2184MHZ H 2miang 27zx865x10 15x10x103 CW MR1 I ngr39 V I q 39 h Using the opencircuit time constant method Rgs Rsig 10k 2 Rgd Rsig 1 ngg R 101123982 21428kQ RCL R 982142 a L Thus 715 3 rgs CgSRgS 20gtlt10 gtlt10gtlt10 200ps rgd ngRgd 5gtlt10 gtlt1428gtlt103 714ps rCL CLRCL 25 gtlt10 15 gtlt982gtlt103 246 ps 277H 27578S ng TCL fHE 137MHZ 27zgtlt1160gtlt10 12 Slide 60 h2 Homework 2 hulq 2102009 6 6 HighrFrequency Response ol the CS and CE Ampli er 664 Adapting the Formulas forthe Case of the CE Amplifier R B quot r a AAA If the Miller s theorem is applied to estimate the fH Cm C7 C 1 ngL f 1 H I 2 lC39irLRsig If the method of opencircuit time constant is applied to estimate the fH 1H 2 CRr C R CLRCL Cersig CJRsig1 ngL RL CLRL fHE 1 27er 66 HighFrequency Response of the CS and CE Amplifier 1 1 665 The Situation When R is Low ifH 3 5399 3 Z CinRsig 3 RW should be here rrrrrrrrrrrrrrrrrrrrrrr I t w Cal 39 II 1 H II H i A I v v NV 3 1 3 R C u w i 5 kg r L l iii r b Jam run 201mg llul f 1 l l ZUrJISducatlc H i 27rCL ng RL l infW l V M Hing wulcl l ll u AMfH F r l 7 1m r g m c Rsig 9 O the high frequency limitation happens 277CL ng at the amplifier output 63 Example 610 Consider the CS amplifier specified in Example 69 when fed with a signal source having a negligible resistance ie Ftsig 0 Find AM fadB ft and fz If the amplifying transistor is to be operated at twice the original overdrive voltage while W and L remain unchanged what value of IREF is needed What are the new values of AM fads ft and fz quot 01 Solution From example 69 we know that AM 123 VV The 3dB frequency can be found by 1 1 f H 27rCLCg1RL 27r255gtlt10 15gtlt982gtlt103 540MHz Here R r01 r02 18 II 216 k9 982 kQ f AMfH 123gtlt54066 GHZ f i i125x10 3 Z 27 ng 27 5x10 15 To increase VOV from 016V to 032V REF should be changed to 400uA E 40 GHZ The new values of gm r01 r02 and R ID 400 g quot V0V 2 0322 r01 2 VA Hm 5XO36VO4mA 45 kg 25 mAV r02 VAp1D2 6x036V04mA 54 kg R r01 11 r02 45 u 54 k9 245 kQ AM gmr01r02 25gtlt 245 615 WV 1 1 216 GHz 27rCL Cg R 225 5gtlt1015 gtlt 245gtlt103 fa f AMfH 615gtlt216133 GHz 67 The CommonGate and Commonbase Amplifiers with active Loads 672 The Common Base Amplifier Vu a Activeloaded commonbase amplifier 1 Analysis with RL i virgim virgvi v0r0 virg vi i0RLr0 2 vi rg vi ii vi r RLr0 Zhh i i 8 r0 r0 rUr R 1 1 R 1 Lzi Lvi r0 8 U 0 7 Vi r0RL r0RL r R r R li 1i7L 1i L b Small signal analysis re r7 75 1IB performed directly on the circuit diagram with the BJT T model used implicitly 1 Take RL out 2 Take voltage source out 3 add vX v v Rer7r ix 2 v RE r7 Rer I Re 2 Re H r m 1 ng v vx v 1x gmvr0 an V w 1 3er vx ixro lxRe 1 3er Rant 2 vx ix r0 1 gmr0R ra Ang mm my H Uhquot c Smallsignal analysis with the R output opencircuited 0 0 v R m w mg vug L RL 130 R sz RL 7 RL rg AWR V Vi R1 GW 039RLM IR AW R R 5157 z Vilg i 9 rlr W7 r R Discuss R r0 1 gmroR Rx N i d W R1ngro r E 1ngro I LN 7 y t IR quot m f Re ltlt r7 R R 6 RM 2 1ngero Rm re QRL m as Summaw r CommonGate CommonSource CommonBase CommonEmitter n R Input Resistance Rn liLRL ltlt Rm 00 Output Resistance Rm r Better no Miller effect 8 8 The Cascode Amplmer quot g quot by placing a g t amplifier stage in cascade with a commonsource commonemitter amplifier stage Vm 681 The MOS Cascode lt n Vim O l Im Commonsource Small Signal Analysis Ql Avol gm1rol Rm mo 0 Rout1r01 H Qg Av0221gm2gm122r02 1 RL mz ng 8me AvoZ quotNew Rout r02 Aerol E gm2r02r01 Rdl R H Rmz 89 in outl I The cascode with the output opencircuited or RL B u 4 ol il l V01 gm1r01Vi A01Vi V0 Avozvol Av02Av01Vi HAquot AaA01AW EAonz For the usual case of equal intrinsic gains Avg 2 2 gmr02 Ann n A n R E 8M A0 gmrg 2 b Figure 637 a and h quot A 1D i u I a r be used to determine the gain 1g vDvp which is equal to GV because Rm es and thus v vim Q and Q2 have equal intrinsic gains Wquot 1 R Rdlr0 L gm gmb A0 c Equivalent cimuit for detennining the Voltage gain of the CS stage Q1 68 The Cascade Ampli er 682 Frequency Response of the MOS Cascode Cgs1 sees R 31 Rsig g ngl sees Rgd11 gmle1Rsig Rd1 Rgd Rsig 1ngR for OS on Slide 55 Cdb1 C sees gs2 CL ng2sees TH C R ng11 gmle1Rsig Rd1 gsl Sig Cdb1 Cgs2Rd1 CL ng2RL Rant 1 27L39TH fHE In the case when R is very small sig TH E CL ng2RL Rm 1 fH 27rCL ng2RL Rm Common Source C SL OdB W E 739 v Fl R c H AHR 39 Cu um I r V o Itquot 7 It39 i DL Gum NHJW rliign l 4 A0 times Iarger quottquot 2mg 4 er zit CL 7 C lime 4 l A0 times smaller quot Zwtq 7 CW zinc co Gain as Amk l I Example 612 This example illustrates the advantages of cascoding by comparing the performance of a cascode amplifier with that of a commonsource amplifier in tWO cases a The resistance of the signal source is significant Rsig 10kQ b Rsig is negligibly small Assume all MOSFETs have WL of 72pm036pm and are operating at ID 100pA gm 125mAV Z02 r0 20kQ Cgs 20fF C d 5fF Cdb 5fF and CL5fF For case a let RL r0 20k for the CS amplifier and RL Rout for the cascode amplifier For all cases determine AV fH and it Solution For the CS amplifier A0 gmro 125gtlt2025VV AV 2 gmRL r0 125gtlt20 20 125 VV 1H 2 CgSRSig ngmsig 1 ng2gt R CL CdbR HereR RL r0 20l2010k 2 1H 2 20x1051125101055101025 ps 1 1 fH 2 42 27er 27rgtlt1025gtlt10 f 2 AV IfH 125gtlt155 194 GHz 155 MHZ For the cascode amplifier A01 gmlrol 125gtlt20 25 VV AW2 1gm2 gmb2r02 112502gtlt125gtlt2031VV AW 2 301sz 2 25x3 1 775 VV R0 r02 AWer1 20 3 1x 20 640 kg R A A L 775gtlti 235 VV RL Rom 20 640 Rourl r01 RinZ 1 RL 1 20 ii13k9 gm2gmb2 AvoZ 15 31 R Rnu1Ri2 20 II 13 122 kg 7H Cgissig ng11 gmle1Rsig Rdl Cdb1 Cg32Rd1CL Cdbz ng2RL H Rout 20x105115122520gtlt122 555gtlt20640 653ps 1 244MHz f 27rx653x10 12 f AV I fH 235gtlt 244 573 GHz CHAPTER 6 SingleStage Integrated a 739 iv Circuit Amplifiers Outline IC design philosophy Comparison between MOSFETs and BJTs IC biasingcurrent sources current mirrors and currentsteering circuits Highfrequency responsegeneral considerations The CommonSource and CommonEmitter amplifier with active loads Highfrequency response of the CS and CE amplifier The CommonGate and CommonBase amplifier with active load The Cascode amplifier The Source and Emitter Follower The CS and CE amplifier with source degeneration Current mirrors with improved performance transistor pairings Chapter 6 Single Stage IntegratedCircuit Amplifiers 61 IC Design Philosophy Integratedcircuit fabrication technology poses constraints on and provides opportunities to the circuit designer a Constant current sources are readily available a Large or even moderate value resistors are to be avoided a Small capacitors pf are used instead of large ones I Easy to fabricate in IC MOS technology realize a wide range of signal processing functions with MOS amplifier and M08 switches MOS transistors can be sized by changing their aspect ratios WL to fit design requirements a Arrays of transistors can be matched to realize such useful circuit building blocks as current mirrors Reducing device dimensions is the trend in IC technology Table 61 a CMOS 006pm low voltage operation low power dissipation CMOS is the most widely used IC technology for analog digital and mixed signal applications Bipolar circuits can provide much higher output currents in Favored in automotive industry for their high reliability under severe environmental conditions i BiCMOS high operating speed and low power dissipation U Chapter 6 Single Stage IntegratedCircuit Amplifiers 62 Comparison of the MOSFET and the BJT Hype x uhslmtc m B MOSFET BJT Chapter 6 Single Stage IntegratedCircuit Amplifiers 62 Comparison of the MOSFET and the BJT DC characteristics 0 Ln 0 139 in lel 39 u 5 07 mm To operate in the Active Mode two conditions have to be satisfied 1 Induce a channel 1 Forwardbias EBJ szz V1 Vl 05 07V VBEz VBEOH VBEOH 05V Let vGS Vtv0V 2 Pinchoff channel at drain 2 Reversebias CBJ VGD 5V1 VBClt VBCon VBCon 04V Or equivalently Or equivalently VDSZ VOV V0V 02 03V VCEZ 03V CurrentVoltage Characteristics in the Active Region 1 W 2 VDS v V VCE lD E nchfo as r 1V A lC 2 Se BE T1V A 1 W 2 V za ncavaov 1 VD lB lC iG0 iEziCa LowFrequency Hybrid1T Model B LowFrequency T Model 9 Transconductance gm 210 ID gszGS K VOV2 gm gm IunCoxWLV0V gm 2k JulLE Output Resistance r0VAID rOZVAIC Intrinsic Gain A0gmro A0 VA V0V 2 A0 2VLV0V v zuHCMWL A0 ID Input Resistance with Source Emitter grounded rn gm a 37 Example 61 For an NMOS transistor with WL 10 fabricated in the 018um process whose data are given in Table 61 on page 547 find the values of VOV and VGS required to operate the device at ID 100uA Ignore channellength modulation Find VBE for an npn transistor fabricated in the lowvoltage process specified in Table 62 p 549 and operated at IC 100uA Ignore basewidth modulation Example 62 We wish to compare the values of gm input resistance at the gate base re and A0 for an NMOS transistor fabricated in the 025um technology specified in Table 61 and an npn transistor fabricated in the lowvoltage technology specified in Table 62 Assume both devices are operating at a drain collector current of 100 AA For the MOSFET let L 04um and W 4pm and specify the required VOV HighFrequency Model I 1 lt 4 I II quot T lt 39 AA vvv O U L1 0 L 1 l rp Av v v 52 I II 393 Ir lt I All vvv O r High Frequency Model of MOSFETS Internal Capacitance P y I I The physical fir I v construction of FETs T quot I results In the 39 Introduction of vi m capaCItIve elements in These capacitances affect the frequencyE response of MOSF T circuits that must be considered in determining the V overall frequency response of a circuit in Models provide approximations of how these physical structures affect the frequency response MOSFETS Frequency Response of a Common Source Amplifier i The internalMOSFET 39 n H capacitance s and the Cw 39 7 1a capacitors in the circuit Q Fill T determine the frequency 4 T response of the circuit The frequency response of the circuit determines the H n limits on the applicability of small circuit analysis in the frequency domain BW fHfL GB AMwa Here AM VOVSIg D illi I BJT the High Frequency Model vvv iV r A v v v J T gt Table 57 page 57 summarizes the effective circuit components of a BJT D The capacitive elements are artifacts of the methods used to construct the BJT ie they are a result of the physical structure of the BJT l BJT the Effective circuit I 1 heZi 0 BdBofw a f IB 1SCzc rz B zcrr c c zi 2799 c7rcdecje Cde TFgm Cje 26j60 V m 6 ch0 1 m03 05 BJT the High Frequency Response of CE Ampli ers Fig 572 Solving for the frequency response of a39circuit from the small Signal model a Perform a DC analysis Determine DC bias quotI II a I voltages and currents L i Perform a 88 small I 7 TI 39 N I signal analysis V D I U B D D componen Find the estimated frequency response of D The circuitisredrawn 7 with the effective frequency selective N components I I l I I II Iquot 39 3939 7 i l Boclm c A 10 LIBdecade PM mIi Il I I I I 20 luv IANI I I I I I 0 l I III In wuch I BJT the Low Frequency CE Amp Response mmrmm r ledli dumh gt NHL in My 4 A O 4 v i i quotJ i Ill 2 0 I 7 Hquot I A ZtHug M n lBncuu c 0 uliducudc he NHLIug sL HIE 20 log 1M 6 dBocmw 20 dBLlccmic rm H2 lug scale hr mm me If Figure 573 Continued c the effect of CE is determined With CC1 and CC2 assumed to be acting as perfect short circuits d the effect of CC2 is determined With CC1 and CE assumed to be acting as perfect short circuits 20 V Vi dB 3 all j 2 f 1 rlBnclilvc ll dBuclavc 201m Aw IS LIBUL39lJVC 1 l J 1 lm fr NHL lug stilch C Figure 573 Continued e sketch of the lowfrequency gain under the assumptions that CCl C E and CC2 do not interact and that their break or pole frequencies are widely separated 21 Unitygain freguencx transition fre uenc ainbandwidth roduct L MB e til i I tllth htd 7 p frequency J quot 1m 1 llugscnlcl Figure 62 Frequency response eta cs ampli er loaded with i a capacitance CL and fed with an ideal voltage source It is quotlquot h lower hilan and thus the internal capacitances are not taken 39 0 account I Summary 3 I Cutoff frequency in dExlin 0 7 a in scale fr 7 5 we 0 7 7 2M C gt For cg gtgt 05 and c For g gtgt C and CA 2 q Example 63 In this example we investigate the gain and the highfrequency response of an npn transistor and an NMOS transistor For the npn transistor assume that it is fabricated in the lowvoltage process specified in Table 62 and assume that C s C 0 For IC10uA 100uA and 1mA find gm r0 A0 Cue 08 Cquot C n fT Also for each value of IO find the gainbandwidth product f a commonemitter amplifier loaded by a 1pF capacitance neglecting the internal capacitances of the transistor Forthe N 08 transistor assume that it is fabricated in the 025um CMOS process with L 04um Let the transistor be operated at VOV 025 V Find WL that is required to obtain lD 10uA 100uA and 1mA At each value of ID find gm r0 A0 Cgs ng and fT Also for each value of ID determine the gainbandwidth product f of a commonsource amplifier loaded by a 1pF capacitance neglecting the internal capacitances of the transistor Chapters SinglerSlage integratedrClrcullAmplifiers 63 C Biasing Current Sources Current Mirrors and CurrentSteering Circuits Biasing in integrated circuit design is based on the use of constant current sources a One constant dc current reference current is generated at one location and is then replicated at various ot er locations for biasing the various amplifier stages through a process known as current steering Advantages of using current steering u The effort expended on generating a predictable and stable reference current need not be repeated for every amplifier stage a The bias currents of the various stages track each other in case of changes in powersupply voltage or in temperature s 3 l0 Blasng rCurrerrl Sources Current Mirrors and CurrenlrSleerlng Circuits 631 The Basic MOSFET Current Source VIquot A 1 W 2 l Q11 DI EknflVGSVm w fk 1 an ID1IREFVDD7VGS 39 40quot R ml r r Ql 7 Q Q 1 W 2 I I knltfultvsvvmf M 0 m 2 The circuit composed of Q1 Q2 current mirror Figure 64 emu for a basic MOSFET constantrcunent source Io 7WL2 Current gai IRE WL1 Current transfer ratio Discuss Effect of V0 on lO A l l kl Q2 should be remain saturated So V0 2VGS Vz VOV Note To obtain high outputresistance Choose transistors with long channels 14 Example 64 Given VDD 3V and using IREF 100pA it is required to design the circuit of Fig 64 to obtain an output current whose nominal value is 100 pA Find R if Q1 and 02 are matched and have channel lengths of 1 pm channel widths of 10 pm VI 07V And k 200 pAVZ What is the lowest possible value of V0 Assuming that for this process technology the Early voltage V 20V pm find the output resistance of the current source Also find the change in output current resulting from a 1V change in V0 Vm D64 In the current source of Example 64 it is required to reduce the change in output current Alocorresponding to a change in output voltage AVO of 1V to 1 of IO What should the dimensions of Q1 and 02 be changed to Assume that Q1 and Q2 are to remain matched l im 1M l R l a 4i l I 1amp0 it Figure 64 Circuitforabasic I i lt 39 i i MOSFET constantrcurrent 239 LU m l f 7 16 63 IC D39 39 g 39 A c sv 39 1 Circuits 632 MOS CurrentSteering Circuits source not drain A Once a constant current is generated it can be replicated to provide dc bias W currents tor the various amplifier stages in an IC 12 IREF WL2 WLx WL3 3 REF WL1 To operation in the saturation region VDzVD3 2 Vss V051 V Vss V0V1 tn 4 WL4 V135 S VDD lVovsl


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