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Intro to Information Tech

by: Earlene Cremin III

Intro to Information Tech CPSC 1105

Earlene Cremin III

GPA 3.91

Edward Bosworth

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About this Document

Edward Bosworth
Class Notes
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This 29 page Class Notes was uploaded by Earlene Cremin III on Sunday October 11, 2015. The Class Notes belongs to CPSC 1105 at Columbus State University taught by Edward Bosworth in Fall. Since its upload, it has received 37 views. For similar materials see /class/221203/cpsc-1105-columbus-state-university in ComputerScienence at Columbus State University.


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Date Created: 10/11/15
Modern Computers Circa 2007 Computing machines are very common in a modern industrialized society The number of functions performed by these devices is almost endless Here is a partial list 1 General numerical computation involving both integers and real numbers Device automation and control Message switching including routers and rewalls on the Internet Computer generated graphics Graphics based computer games 9959quot Computer enhanced video How about those extra lines superimposed on football elds Computers come in two broad classes General purpose these are adaptable to a Wide variety of programs Special purpose these are designed for one purpose only 6 g routers Special purpose computers are usually limited to high volume markets It is often easier to adapt a general purpose computer to do the job General Purpose Computers This course will focus on general purpose computers also called Stored Program Computers or Von Neumann Machines In a stored program computer a program and its starting data are read into the primary memory of a computer and then executed Early computers had no memory into which programs could be stored The rst stored program computer designed was the EDVAC designed by John Von Neumann hence the name John Mauchley and J Presper Eckert The Electronic Discrete Variable Automatic Computer was described in a paper published on June 30 1945 with Von Neumann as the sole author The rst stored program computer to become operational was the EDSAC Electronic Delay Storage Automatic Computer completed May 6 1949 This was developed by Maurice Wilkes of Cambridge University in England The rst stored program computer that contained all of the components of a modern computer was the MIT Whirlwind rst demonstrated on April 20 1951 It was the rst to use magnetic core memory Components of a Stored Program Computer The four major components of a modern stored program computer are Jaws The Central Processing Unit CPU The Primary Memory also called core memory or main memory The Input Output system One or more system busses to allow the components to communicate System Level Bus ALU Arithmetic Lngic Unit Major Components De ned The system memory of which this computer has 512 MB is used for transient storage of programs and data This is accessed much like an array with the memory address serving the function of an array index The Input Output system IO System is used for the computer to save data and programs and for it to accept input data and communicate output data Technically the hard drive is an IO device The Central Processing Unit CPU handles execution of the program It has four main components 1 2 3 4 The ALU Arithmetic Logic Unit which performs all of the arithmetic and logical operations of the CPU including logic tests for branching The Control Unit which causes the CPU to follow the instructions found in the assembly language program being executed The register le which stores data internally in the CPU There are user registers and special purpose registers used by the Control Unit A set of 3 internal busses to allow the CPU units to communicate A System Level Bus which allows the top level components to communicate Reality Intrudes Part 1 of Many The design on the previous slide is logically correct but IT WON T WORK IT IS TOO SLOW Problem A single system level bus cannot handle the load Modern gamers demand fast video this requires a fast bus to the video chip The memory system is always a performance bottleneck We need a dedicated memory bus in order to allow acceptable performance Here is a refinement of the above diagram Main Memor Memory Bus CPU Video Display Video Bus System Level Bus This design is getting closer to reality At least it acknowledges two of the devices requiring high data rates in access to the CPU Reality Intrudes Part2 of Many We now turn to commercial realities speci cally legacy 10 devices When upgrading a computer most users do not want to buy all new 10 devices expensive to replace older devices that still function well The 10 system must provide a number of busses of different speeds addressing capabilities and data widths to accommodate this variety of 10 devices Main Memor Memory Bus CPU Video Display Video Bus Here we show the main 10 bus connecting the CPU to the 10 Control Hub ICH which is connected to two 10 busses one for slower older devices one for faster newer devices The Memory Component The memory stores the instructions and data for an executing program The memory can be imagined as a collection of boxes each referenced by an address The address allows the CPU to read data from memory and place data into memory The CPU has two registers dedicated to handling memory The MAR Memory Address Register holds the address being accessed The MBR Memory Buffer Register holds the data being written to the memory or being read from the memory This is sometimes called the Memory Data Register READ sequence 1 Place the address into the MAR and command a memory read 2 Transfer the data from the MBR to the CPU WRITE sequence 1 Place the address into the MAR data into the MBR and command a memory write 2 Wait for the results to take affect Multi Level Memory What we want is a very large memory in which each memory element is fabricated from very fast components But fastmeans expensive What we can afford is a very large memory in which each memory element is fabricated from moderately fast but inexpensive components Modern computers achieve good performance from a large moderately fast main memory by using two levels of cache memories called Ll and L2 These work due to an observed property of programs called the locality principle A typical arrangement would have a large L2 cache and a split Ll cache The Ll cache has an Instruction Cache and a Data Cache Level 1 amp Level 2 Main Cache I Memory MB 16KB lorZ I Cache Each Note that the Instruction Cache I Cache does not write back to the L2 cache Organization of Primary Memory We turn our attention again to the primary memory When we left it we had a linear View with an N to 2N decoder We shall study decoders in a later class At present it should be obvious that construction of a 32 to 4294967296 decoder would be very difficult Memory on all modern computers is obViously built from smaller chips Each of these chips will be constructed from a number of smaller chips For example a 1 GB memory might have four 256 MB memory modules Cl C EDDUEDD IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII Connector Each 32 MB chip would be organized as eight 32 Mb chips Each 32 Mb chip is organized as an 8192 by 4096 array 32MB memory chip Primary Memory 9 4 Also called core memory store or storage Beginning with the MIT Whirlwind and continuing for about 30 years the basic technology for primary memory involved cores of magnetic material ImpHumanssnnarzamnsenmmemnryhrml Virtual Memory All modern computer systems use virtual memory At various times in the course we shall give a precise de nition but here is the common setup Main Memory 4 Kb SRAM buffer 16 Mb chip 4K Rows of 4Kb each 64 bit 8way interleaved byte addressable memory 16 MB Databurst System Disk DRAM Cache 320 GB SATA Drive In M87Windows the area of the system disk that handles virtual memory is called the paging le My system has a 768 MB paging le The Central Processing Unit CPU Traditionally the CPU is considered as having four main components Instruction Register Register Set Control Signals Control Unit The Arithmetic Logic Unit The three bus structure that feeds the ALU and accepts its results The control unit that interprets the machine language The register set containing both general purpose user registers and special purpose registers The latter include the Memory Address Register MBR the Memory Buffer Register PC the Program Counter pointing to the next instruction lR the Instruction Register holding the current instruction hmmH Memory Creeps onto the CPU Chip Modern computers such as the P4 have placed both L1 caches and the L2 cache on the CPU chip itself Here is a picture of the P4 chip annotated by Intel In older computers the main difference between CPU registers and memory was that the registers were on the chip and memory was not This no longer holds The ALU Arithmetic Logic Unit The ALU performs all ofthe arithmetic and logical operations for the CPU These include the following Arithmetic addition subtraction negation etc Logical AND OR NOT Exclusive OR etc B1 B2 B3 This symbol has been used for the ALU since the mid 1950 s It shows to inputs and one output The reason for two inputs is the fact that many operations such as addition and logical AND are dyadic that is they take two input arguments Historical Summary Re ecting on the last 60 years of the history of computing machines we see a development constrained by the available technology and economics We see a constant move towards devices with less cost and physical size more performance and reliability longer time between failures As an example the ENIAC seldom functioned for more than a few hours continuously before it suffered a failure Memory technology is a good example We have four stages 1 No memory ENIAC 2 Very unreliable memory such as mercury delay lines and Williams tubes 3 Very reliable memory specifically magnetic core memory 4 Very reliable and inexpensive memory specifically solid state devices We now begin a look at the computer from a logical view The Fetch Execute Cycle This cycle is the logical basis of all stored program computers Instructions are stored in memory as machine language Instructions are fetched om memory and then executed The common fetch cycle can be expressed in the following control sequence MAR PC The PC contains the address of the instruction READ Put the address into the MAR and read memory IR MBR Place the instruction into the MBR This cycle is described in many different ways most of which serve to highlight additional steps required to execute the instruction Examples of additional steps are Decode the Instruction Fetch the Arguments Store the Result etc A stored program computer is often called a von Neumann Machine after one of the originators of the EDVAC This Fetch Execute cycle is often called the von Neumann bottleneck as the necessity for fetching every instruction from memory slows the computer Bytes How to Size Computer Memory The most convenient de nition of the term byte is that it is the smallest unit of memory that can store a character letter digit punctuation mark etc In sizing internal memory the multiples of bytes represent powers of two This is due to the use of binary numbers in addressing memory 1 KB 210 bytes 1 024 bytes 1 MB 220 bytes 1 048 576 bytes 1 GB 230 bytes 1 073 741 824 bytes Commercial use adopts powers often for disk sizes 1 GB 109 bytes 1 000 000 000 bytes 1 TB 1012 bytes 1 000 000 000 000 bytes Experiment 1 Go to Explorer and right click on the C drive 2 Click on properties Note the disk capacity My computer says the disk has 372 GB 39 966 633 984 bytes The disk was sold as having 40 GB Memory Volatile and Non Volatile One way to classify computer memory divides it into two classes volatile the contents are lost when the computer is turned off non volatile the contents are preserved when the computer is turned off Roughly these correspond to main memory and disk memory In older computers main memory was not volatile We have moved to a volatile technology for memory because the new chips are smaller cheaper and more reliable We can get a lot of memory for not much money The hard disk drive is the storage medium of choice for storing data when the computer is not running There used to be a class of disks called oppy disks but these have been replaced by the USB Drives also called ash drives or thumb drives Flash drives present a signi cant security threat to both government and commercial activities as it is very easy to hide a 16 GB ash drive It is very easily carried in a purse or in a pocket Sample Disk Drives Here are two pictures The one on the left shows the internal workings of a drive The picture on the right shows an external disk drive that is connected to the computer via a USB port I bought a 512 GB external drive for 150 Structure of a Large Disk Drive The typical largeicapacity and physically small disk drive has a number of glass platters with magnetic coating These spin at a high rate 7200 rpm or 120 second ReadWriia Head This drawing shows a disk with three platters and six surfaces In general a disk drive withN platters will have 2N surfaces the top and bottom of each platter On early disk drives before the introduction of sealed drives the top and bottom surfaces would not be used because they would become dirty More 011 Disk Drive Structure Each surface is divided into a number of concentric tracks Each track has a number of sectors Inlerseclur a X J I G p lnterlrack w Header Gap m L Synchronizahon lniormation H ErrorA c necmg Code ECG A sector usually contains 512 bytes of data along with a header and trailer part Seek Time and Rotational Latency In order to read from a disk track the readwrite heads must be moved to the track This is a mechanical action as the readwrite heads are physical devices There are two seek times typically quoted for a disk Track to track the time to move the heads to the next track over Average the average time to move the heads to any track The rotational delay is due to the fact that the disk is spinning at a xed high speed It takes a certain time for a speci c sector to rotate under the readwrite heads Suppose a disk rotating at 12000 RPM That is 200 revolutions per second Each sector moves under the readwrite heads 200 times a second once every 0005 second or every 5 milliseconds The rotational latency or average rotational delay is one half of the time for a complete revolution of the disk Here it would be 250 milliseconds The Idea of a Cylinder Fixed head disks have one head per track The last time I heard of such a device was 1977 when working with a 1 MB xed head disk on a PDP 1145 I claim that xed head disks are obsolete Revisit the picture of a typical disk 39 ReadWrite Head Question How many tracks can be read before the readwrite heads must be moved Answer One track per surface can be read without moving the heads Here it is 6 De nition A cylinder is that set of tracks that can be read without moving the disk read write heads A disk has as many cylinders as a surface has tracks A cylinder has as many tracks as the disk has surfaces The System Unit This figure shows the configuration of a typical system unit in the tower format A laptop has the same components configured differently Power drive drive card reader pone audio FireWire USB Floppy drive optional This figure just shows some features that are available Most system units are configured with fewer options say a DVDRW and the productivity ports Inside the System Unit Essential electronic Comioonents used v to process data Types of ComIOonents I Power suppy 39 I Hard disk drive I J I I Motherboard 7 CPU Expansion cards The Motherboard CPU RAM Expansion cards and slots Builtin components 39 manger 5po 39 The Central Processing Unit This executes the program and does the work of the computer It processes the commands and controls all of the functions of the computer The CPU is rated in terms of l clock speed or 2 processing power This is occasionally called the brains of the computer but I dislike the term Modern research has shown the human brain to be very much unlike a computer The Clock Speed Modern computers are synchronous devices This means that a single electronic clock is used to emit pulses clock ticks that coordinate the operations of all of the components One master clock can be used to derive several speeds For example a 2 GHz clock for the CPU can use a divide by 12 circuit to generate a 167 MHz clock pulse for use on the memory bus Here 1 GHz Gigahertz implies 109 clock pulses per second 1 MHz Megahertz implies 106 clock pulses per second In the above example the CPU clock provides 2 000 000 000 pulses per second Every l2th pulse is passed to the memory bus The bus rate is 2000000 00012 166 666 667persecond 1667MHz The clock speed is related to the work the computer can do A modern computer With a 2 GHz clock can execute about 2 000 000 000 operations per second The clock speed is an approximate measure of a computer s processing power Memory Module Random access memory RAM Stores instructions and data Temporary volatile storage Opera


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