MICROPROCESSOR SYSTEM DESIGN
MICROPROCESSOR SYSTEM DESIGN ECE 473
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This 16 page Class Notes was uploaded by Sam Robel on Monday October 19, 2015. The Class Notes belongs to ECE 473 at Oregon State University taught by R. Traylor in Fall. Since its upload, it has received 29 views. For similar materials see /class/224415/ece-473-oregon-state-university in Engineering Electrical & Compu at Oregon State University.
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Date Created: 10/19/15
Atmel Atmega128 Overview ALU Particulars RISC Architecture 133 Mostly single cycle instructions 2 Address instructions opcode Rs Rd offset 32x8 Register le 6 can be used as 16bit registers Harvard architecture Status Register half carry sign OV Neg Zero Carry GIE not stored when entering ISR Atmel AtmegalZS Overview Memory System There are four separate memory spaces on the AVR Pr0gram space 128K byte 64le6 incircuit ash programmable Endurance minimum of 10K cycles Can be accessed by program for storage of constants SRAM Data Memory 4K bytes Variable storage area io and peripherals are located here also EEPROM 4K bytes separate data space single byte readwrite access Via EEPROM access registers 85mS to write data slow but durable Atmel Atmega128 Overview Memory System Mega128 board has added 32K external SRAM memory Uses multiplexed lower address and data Addr bit 15 selects external memory if XMEM register is programmed Ex ornal RAM r m PmLi m Atmel Atmega128 Overview Timers and Counters TCNTO 8bit internal synchronous clock or external asynchronous 32Khz clock especially used for time keeping with 32Khz clock has no external pin for clocking only two crystal sources Conlml Lia5i EEI I39I39DM TIZIF39 l olw1 Wanbrrn 39 I Garwalk Atmel Atmega128 Overview Timers and Counters TCNTl TCNT3 16 bit timercounter requires special access method clocked by internal clock or by external pin 3 output compare registers and output pins set reset toggle multiple compare registers input capture register captures when external event happened ADC interrupt input can capture time at Which some voltage is detected Atmel AtmegalZS Overview Timers and Counters TCNTl TCNT3 DATABUS quotH1 TIITBI39J39 Canter T ml Tow mar jlrtRqu Direction mm LCquot TC2LK cm Select imp Bowm x N 5 L From Prescaler f DCFXA Irnleqj I l Wa39nsmrm I quot Caretatlon 39 IE atan mp rim99 I Values l b I Garemuan 39 I I I I I UCFIC FilmFbaq E Wa39 mrm I Generation I I I I Frcrn nnabg Compare or Dun I ICFX mL FEEq I I 39 Icm llllllllllll39 I menu 0 Tatiana 113an t t Atmel Atmega128 Overview Timers and Counters TCNTZ 8 bit countertimer 1ike TCNTO but has external clocking capability has PWM capability DATA BUS Atmel Atmega128 Overview T imercounter prescalers separate prescalers available for TCNTl23 only used when operating from internal or external clock pin clock can be prescaled by 8 64 256 or 102 39 PIE 5 T TE PF E5 ILEH E E 553 I cast 3quot 5510 739 1531 a 3quot 521 5 2 2511 E1 125321 a If c525 Ilt Iquot 2512 a a a l 11 mumrem a LZIZH 5 I u Fr E cur l T IEFI I39LN39I39 E HE ISLEGK ED LEG E TIEHquot ll TE H I ISLE 3k ECLFE E El g l Atmel Atmega128 Overview Interrupts 3O interrupt sources external pin levels or edges timercounters SPI USART and TWI RX and TX complete ADC conversion complete EEPROM ready input capture external event capture ADC interrupt All interrupts are vectored reset is vector zero highest priority all other interrupts are prioritized in ascending order interrupt response time is 4 cycles interrupt return time is also 4 cycles Atmel AtmegalZS Overview Serial Intelfaces SP1 Serial Peripheral Interface full duplex three Wire interface MSB first or last programmable bit rates to clock2 F39IN CONFROL LDGlC sm comnm sm lNIERRUFT lN l ERNAL REQUEST mm aus Atmel AtmegalZS Overview Serial Interfaces USARTuniversal synchronous asynchronous receiver transmitter 2 identical and separate units USARTO USARTl full duplex serial communications programmable number of bits parity stop bit error detection interrupt on tX done or ready or tX register empty Atmel AtmegalZS Overview Serial Interfaces USARTO 1 CIGCK GENETEENquot I I l I l I l I l I l ga E SYNC LCHSIC pl H CCIHTRIZIL 39 39 1 Trims ml TX I I I r mu m I TRANJMH JHIFT REEIJTER CENTRle I Ta E l c D Recewerl I Lom mm I REDZI IJ39EFi f 39 CCINTRIZIL l I mm Fm 7 Ram SHIFT REblSTER mommy CONTROL I l I I I g UDR IRece39u39el 53ng C n m a h C n laquot 1 m c n m x D Atmel AtmegalZS Overview Serial Interfaces TWI two Wire interface half duplex serial communications 7 bit device addressing multimaster operation 400khz data rate 12C compatible Atmel AtmegalZS Overview Analog to Digital Converter lObit resolution l3260uS conversion time 8 multiplexed single input channels 7 differential input channels selectable internal reference 256V input range OVcc interrupt on completion Atmel Atmega128 Overview Analog to Digital Converter Atmel Atmega128 Overview