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by: Lavonne Streich


Marketplace > Rice University > Bioengineering > BIOE 445 > ADVANCED INSTRUMENTATION LAB MODULE
Lavonne Streich
Rice University
GPA 3.89


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Class Notes
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This 16 page Class Notes was uploaded by Lavonne Streich on Monday October 19, 2015. The Class Notes belongs to BIOE 445 at Rice University taught by Staff in Fall. Since its upload, it has received 22 views. For similar materials see /class/224926/bioe-445-rice-university in Bioengineering at Rice University.




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Date Created: 10/19/15
ANALOG DEVICES Low Cost Low Power Instrumentation Amplifier FEATURES EASY TO USE Gain Set with One External Resistor Gain Range 1 to 1000 Wide Power Supply Range 23 V to 18 V Higher Performance than Three Op Amp IA Designs Available in 8Lead DIP and SOIC Packaging Low Power 13 mA max Supply Current EXCELLENT DC PERFORMANCE B GRADEquot 50 pV max Input Offset Voltage 06 pVl C max Input Offset Drift 10 nA max Input Bias Current 100 dB min CommonMode Reiection Ratio G 10 LOW NOISE 9 nVVm 1 kHz Input Voltage Noise 028 pV pp Noise 01 HZ to 10 HZ EXCELLENT AC SPECIFICATIONS 120 kHz Bandwidth G 100 15 ps Settling Time to 001 APPLICATIONS Weigh Scales ECG and Medical Instrumentation Transducer Interface Data Acquisition Systems Industrial Process Controls Battery Powered and Portable Equipment PRODUCT DESCRIPTION The AD620 is a low cost high accuracy instrumentation ampli fier that requires only one external resistor to set gains of l to 30000 m 3 25000 SOPAMP i u IN AMP g 3 0P075 5 20000 gt 7 IL 395 4 I 5 15000 39 r k r g AD620A v E 10000 i if v R6 1 395 5000 0 5 10 15 20 SUPPLY CURRENT mA Figure 1 Three Op Amp IA Designs vs A0620 REV E Information furnished by Analog Devices is believed to be accurate and 39 39 39 Analog Devices for its ems or other rights oft ird parties use No license is grante y implication or otherwise under any patent or patent rights of Analog Devices CONNECTION DIAGRAM 8Lead Plastic MiniDIP N Cerdip Q and SOIC R Packages RGE ERG E 3 IN E a OUTPUT 45E AD620 EIREF TOP VIEW 1000 Furthermore the AD620 features 8 lead SOIC and DIP packaging that is smaller than discrete designs and offers lower power only 13 mA max supply current making it a good fit for battery powered portable or remote applications The AD620 with its high accuracy of 40 ppm maximum nonlinearity low offset voltage of 50 LIV max and offset drift of 06 LIV0C max is ideal for use in precision data acquisition systems such as weigh scales and transducer interfaces Fur thermore the low noise low input bias current and low ower of the AD620 make it well suited for medical applications such as ECG and noninvasive blood pressure monitors The low input bias current of 10 nA max is made possible with the use of SuperBeta processing in the input stage The AD620 works well as a preamplifier due to its low input voltage noise of 9 nV Im at 1 kHz 028 LIV p p in the 01 Hz to 10 Hz band 01 pA Im input current noise Also the AD620 is well suited for multiplexed applications with its settling time of 15 its to 001 and its cost is low enough to enable designs with one in amp per channel RTI VOLTAGE NOISE 01 10Hz 0v pp SOURCE RESISTANCE 0 Figure 2 Total Voltage Noise vs Source Resistance One Technology Way PO Box 9106 Norwood MA 020629106 USA Tel 781 3294700 World Wide Web Site httpwwwanaogcom Fax 7813268703 Analog Devices Inc 1999 Typica 25 cvx 15 V and R1 2 k9 unless otherwise noted ADGZOA ADGZOB ADGZOSI Model Conditions Min Typ Max Min Typ Max Min Typ Max Units GAIN G 1 494 kRG Gain Range 1 10000 1 10000 1 10000 Gain Error2 VOUT 10 V G 1 003 010 001 002 003 010 G10 015 030 010 015 015 030 G100 015 030 010 015 015 030 G 1000 040 070 035 050 040 070 Nonlinearity VOUT 710 V to 10 V G 171000 RL10 k9 10 40 10 40 10 40 ppm RL 2m 10 95 10 95 10 95 ppm Gain vs Temperature G 1 10 10 10 ppm C Gain gt12 750 750 750 ppm C VOLTAGE OFFSET Total RTI Error V05 VQgQG Input Offset V03 Vs 5 V to 15 V 125 15 50 30 125 11V OVerTemperature 5 V to 15 V 185 85 225 11V Average 5 V to 15 V 03 10 01 06 03 10 uV C Output Offset V030 15 V 400 1000 200 500 400 1000 11V 5V 1500 750 1500 11V OVerTemperature Vs 5 V to 15 V 2000 1000 2000 11V Avera eTC Vs 5 Vto15V 50 15 25 70 50 15 uV C Offset Referred to the Input vs Supply PSR Vs 23 V to 18 V G 1 80 100 80 100 80 100 dB G 10 95 120 100 120 95 120 dB G 100 110 140 120 140 110 140 dB G1000 110 140 120 140 110 140 dB INPUT CURRENT Input Bias Current 05 20 05 10 05 2 nA Over Temperature 25 15 4 nA Avera e 30 30 80 pA C Input Offset Current 03 10 03 05 03 10 nA OVerTemperature 15 075 20 nA Average TC 15 15 80 pA C Input Impedance Differential 10112 10112 10112 G911pF CommonMode 10112 10112 10112 G911pF Input Voltage Range3 VS 23 V to 5 V 7VS 19 VS 712 7VS 19 VS 712 7VS 19 VS 712 V OVerTemperature 7VS 21 VS 713 7VS 21 VS 713 7VS 21 VS 713 V VS5Vto18V 7VS19 VS714 7VS19 VS714 7VS19 VS714 V OVerTemperature 7VS 21 VS 714 7VS 21 VS 714 7VS 23 VS 714 V CommonMode Rejection Ratio DC to 60 Hz with I k9 Source Imbalance VCM 0 V to 10 V G 1 73 90 80 90 73 90 dB G10 93 110 100 110 93 110 dB G100 110 130 120 130 110 130 dB G1000 110 130 120 130 110 130 dB UTPUT Output Swing RL 10 k9 Vs23Vto5V 7Vs11 V3712 7Vs11 V3712 7Vs11 V3712 V OVerTemperature 7V3 14 Vs 71 3 7V3 14 Vs 71 3 7V3 16 Vs 71 3 V Vs5Vto18V 7Vs12 V3714 7Vs12 V3714 7Vs12 V3714 V OVerTemperature 7V3 16 Vs 71 5 7V3 16 Vs 71 5 7V3 23 Vs 71 5 V Short Current Circuit 18 18 18 mA 2 REV E AD620 ADGZOA ADGZOB ADGZOSI Model Conditions Min Typ Max Min Typ Max Min Typ Max Units DYNAMIC RESPONSE Small Signal 73 dB Bandwidth G 1 1000 1000 1000 kHz G 10 800 800 800 kHz G 100 120 120 120 kHz G 1000 12 12 12 kHz Slew Rate 075 12 075 12 075 12 Vus Settling Time to 001 10 V Step G 17100 15 15 15 us G1000 150 150 150 115 NOISE Voltage Noise 1 kHz Total R77 Noise 1 27m emG2 Input Voltage Noise em 9 13 9 13 9 13 nVVE Output Voltage Noise eno 72 100 72 100 72 100 nVVE RTI 01 Hz t010 Hz G1 30 30 60 30 60 11V pp G 10 055 055 08 055 08 11V pp G 10071000 028 028 04 028 04 11V pp Current Noise f 1 kHz 100 100 100 owm 01 Hzto 10 Hz 10 10 10 pApp REFERENCE INPUT lN k9 IN VIN VREF 0 60 60 60 11A Voltage Range 7VS 16 VS 716 7VS 16 VS 716 7VS 16 VS 716 V Gain to Output 1 00001 1 00001 1 00001 POWER SUPPLY Operating Range4 23 18 23 18 23 18 V Quiescent Current VS 23 V to 18 V 09 13 09 13 09 13 mA OVerTemperature 11 16 11 16 11 16 mA TEMPERATURE RANGE For Speci ed PerforTnanCe 740 to 85 740 to 85 755 to 125 C See Analn 39 H 39 for 88313 2Does not include effects of external resistor R6 3One input grounded 1 AThis is de ned as the same supply range which is used to specify PSR Speci cations subject to change without notice REV E 3 ADBZU BSO LUTE MAXIMUM RATINGS ORDERING GUIDE IntetnaI Powet DIsstatIon Model Temperature I 39 Input Voltage Common Mode AD zoAN 740 C to 85 N78 DiffetentIaIInput Voltage AD zoBN 740 C to 85 N78 Output Shott Citcuit Dutation AD zoAR 740 C to 85 Stotage Tempetatute Range Q AD zoARgREEL 740 C to 85 13quot REEL Stotage Tempetatute Range N R e65 C to 125 C AD zoARVREEU 740 C to 85 7quot REEL Opetating Tempetatute Range AD zoBR 740 C to 85 AD620 A B 40 C to 85C ADmOBR REEL 740 C to 85 13quot REEL AD620 S 55 C to 125 C ADmOBR REEU 740 C to 85 7quot REEL Lead TeWPem me Range 0 AD620ACHIPS 40 C to 85 C Die Fon n Soldetmglo seconds 300 C ADmOSQggm 755 C to 25 C Q78 OTES 7 stIesses ahoye those IIsted undeI Absolute MaItImum RatIngs may cause peImae m 5 DIE Q ce d so Sm Om deyIce at these oI any otheI condItIons above those IndIcated In the opemtIonaI condItIons tot extended peIIods may affect deyIce IeIIahIIIty zSpethcatIon Is tot deyIce In free III e e d FlasucFackage 9 87Lead Cerde Parka e B 87Lead 501C Package BIA 155 CW METALIZATION PHOTOGRAPH DImensIons s own In In es an mm Contact hcton tot Iatest dImensIons RE quot 5 OUYPUI E I a b l II 5 V J 5 b J H125 I 7V R5 in 131Em Jquot I 5 FOR cum uppucunous tut PADS1RE AND ERBMUSI BE couutctto IN PARALLEL to tut txttumu cum REGISIERRE no not couutct tututu SERIES to R5 FOR uum cum uppucunous wuth RE Is not utuututo tut PADS1RE my SIMPLY BE uouoto manta wen AS tut ms ERG InN ESD electtostauc dIIchatge IenIItIve deVIce Electrostauc chatges as hIgh as 4000 V teadIIy WARNING accumulate on the human body and test eqqument and can dIIchatge WIthout detectIon 39 Q Although the AD620 featutes ptopnetaty ESD ptotectIon cItcuItty petmanent damage may occut on deVIceI subjected to hIgh enetgy electtostauc dIIchatgeI Thetetote ptopet ESD ESDSENSWEDEVICE ptecautIonI ate tecommended to and pettotmance degtadatIon 011033 offuncuonahty 747 REV E A0520 Typical Characteristics 25 cvs 15v M 2 k9 unless otherwise noted PERCENTAGE OF UNITS INPUT BIAS CURRENT nA 75 25 25 75 INPUT OFFSET VOLTAGE pLV TEMPERATURE C Figure 3 Typical Distribution of Input Offset Voltage Figure 6 Input Bias Current vs Temperature gt 40 l1 m 0 tn g E 30 395 2 w E u w 1 lt u I u z 20 o E z Lu m m E 10 lt I U 1200 600 0 600 1200 0 INPUT BIAS CURRENT pA WARMJJP TIME Minutes Figure 4 Typical Distribution oflnput Bias Current Figure 7 Change in Input Offset Voltage vs WarmUp Time 50 40 w I Z I u 30 O m O 5 E 20 U n m n 10 1 10 100 1k 10k 100k INPUT OFFSET CURRENT pA FREQUENCY Hz Figure 5 Typical Distribution oflnput Offset Current Figure 8 Voltage Noise Spectral Density vs Frequency G 1 1000 REV E 5 ADBZU Typical Characteristics CURRENT NOISE HUM 10 100 FREQUENCY Hz Figure 9 Current Noise Spectral Density vs Frequency Figure 11 0 1 Hz to 10 Hz Current Noise 5pADiv FET INPUT a lNAMP 1ooo ADSZOA RTI NOISE 20 pLVIDIV I I g TOTAL DRIFT FROM 25 C TO 85 C RTI pLV TIME 1 SECDIV SOURCE RESISTANCE 0 Figure 103 0 1 Hz to 10 Hz RT Voltage Noise G 1 Figure 12 Total Drift vs Source Resistance 1 60 1 40 1 20 2 Q E 100 c I 30 M g a E 60 IE 40 20 0 TIME 1 SECDIV 01 1 10 100 1k 10k 100k 1M FREQUENCY H1 Figure 10b 01 Hz to 10 Hz RTI Voltage Noise G 1000 F 17 73 CM VS Frequency RT I Zero to 9 Source In a 3705 6 REV E A0620 PSR dB OUTPUT VOLTAGE Volts pp BW LIMIT 01 1 10 10k 100k 1M 100 1k FREQUENCY Hz FREQUENCY Hz Figure 14 Positive PSR vs Frequency RTI G 1 1000 Figure 77 Large Signal Frequency Response vS 00 I L o o o L in 3 390 INPUT VOLTAGE LIMIT Volts 39o REFERRED TO SUPPLY VOLTAGES 05 vS 00 01 1 10 10k 100k 1M SUPPLY VOLTAGE 1 Volts 100 1k FREQUENCY Hz Figure 75 Negative PSR VS Frequency HT G 77000 Figure 18 Input Voltage Range vs Supply Voltage G 1 vs 00 A 05 o gtl 10 4 E g 1 5 gt 39 5 Z39 O 3 lt I lt I D O D 15 gt D I RL 3 M m n 10 m 3 L D m 05 RL 10kn vs 00 10k 100k 0 FREQUENCY Hz SUPPLY VOLTAGE 1 Volts Figure 16 Gain vs Frequency Figure 19 Output Voltage Swing vs Supply Voltage G 0 REV E 7 A0620 i N o OUTPUT VOLTAGE SWING Volts pp 100 1k LOAD RESISTANCE 0 n 0 10k Figure 20 Output Voltage Swing vs Load Resistance Figure 23 Large Signal Response and Settling Time G 10 05 mV 001 Figure 21 Large Signal Pulse Response and Settling Time Figure 24 Small Signal Response G 10 RL 2 k9 G105mV001 CL100pF Figure 22 Small Signal Response G 1 RL 2 k9 Figure 25 Large Signal Response and Settling Time CL100pF G 100 05mV 001 8 REV E AD620 SE39I39I39LING TIME us OUTPUT STEP SIZE Volts Figure 26 Small Signal Pulse Response G 100 Figure 29 Settling Time vs Step Size G 1 RL2kQ CL100pF I I E I E 1 1 10 100 1000 GAIN Figure 27 Large Signal Response and Settling Time Figure 30 Settling Time to 001 vs Gain fora 10 VStep G 1000 05 mV 001 Figure 28 Small Signal Pulse Response G 1000 Figure 31a Gain Nonlinearity G 1 RL 10 kg RL2kQCL100pF 10uV1ppm REV E 9 10k0 A3 OUTPUT GAIN SENSE GAIN SENSE Figure 33 Simplified Schematic ofAD620 Figure 31b Gain Nonlinearity G 100 RL 10 kg 100 HV 70 PM THEORY OF OPERATION The AD620 is a monolithic instrumentation ampli er based on a modi cation ofthe classic three op amp approach Absolute value trimming allows the user to program gain accurately to 015 at G 100 with only one resistor Monolithic construc tion and laser wafer trimming allow the tight matching and tracking of circuit components thus ensuring the high level of performance inherent in this circuit The input transistors Q1 and Q2 provide a single differential pair bipolar input for high precision Figure 33 yet offer 10x lower Input Bias Current thanks to Super eta processing Feed back through the Q1 A1 R1 loop and the Q2 A2 R2 loop main tains constant collector current of the input devices Q1 Q2 thereby impressing the input voltage across the external gain setting resistor R6 This creates a differential gain from the inputs to the A1A2 outputs given by G R1 R2RG 1 The unity gain subtracter A3 removes any common mode sig nal yielding a single ended output referred to the REF pin potential Figure 31c Gain Nonlinearity G 1000 EL 10 kg The value of R6 also determines the transconductance of the 1 mV 100ppm preamp stage As R6 is reduced for larger gains the transcon ductance increases asymptotically to that of the input transistors mm This has three important advantages a Open loop gain is boosted for increasing programmed gain thus reducing gain related errors b The gain bandwidth product determined by C1 C2 and the preamp transconductance increases with pro grammed gain thus optimizing frequency response c The input voltage noise is reduced to a value of 9 nVVm deter mined mainly by the collector current and base resistance ofthe input devices 1k0 10T 10k0 INPUT 10V 11k0 1k0 1000 The internal gain resistors R1 and R2 are trimmed to an abso lute value of 247 kQ allowing the gain to be programmed accurately with a single external resistor The gain equation is then quot 494 kg ALL RESISTDRS1TDLERANCE G 1 RG Figure 32 Settling Time Test Circmt so that RG 49 4 M G 7 1 10 REV E AD620 Make vs Buy A Typical Bridge Application Error Budget The AD620 offers improved performance over omebrew three op amp IA designs along with smaller size fewer compo nents and 10X lower supply current In the typical application shown in Figure 34 a gain of 100 is required to amplify a bridge output of 20 mV full scale over the industrial temperature range of 410 C to 85 C The error budget table below shows how to calculate the effect various error sources have on circuit accuracy Regardless of the system in which it is being used the AD620 provides greater accuracy and at low power and price In simple 620A MONOLITHIC PRECISION BRIDGE TRANSDUCER mDSTRUMENTATIDN AMPLIFIER G 100 SUPPLY CURRENT 13mA MAX REFERENCE V systems absolute accuracy and drift errors are by far the most significant contributors to error In more complex systems with an intelligent processor an autogainautozero cycle will remove all absolute accuracy and drift errors leaving only the resolution errors of gain nonlinearity and noise thus allowing full 14 bit accuracy Note that for the homebrew circuit the OP07 specifications for input voltage offset and noise have been multiplied by 12 This is because a three op amp type in amp has two op amps at its inputs both contributing to the overall input error HOMEBREW IN AMP G 100 002 n RESISTOR MATCH 3PPMI C TRACK NG DISCRETE 1 RESISTOR 100PPMFC TRACKING SUPPLY CURRENT 15mA MAX Figure 34 Make vs Buy Table I Make vs Buy Error Budget AD620 Circuit Homebrew Circuit Error ppm ofFull Scale Error Source Calculation Calculation AD620 Homebrew ABSOLUTE ACCURACY at TA 25 C Input Offset Voltage IN 125 uV20 mV 150 IN x V220 mV 6250 10607 Output Offset Voltage IN 1000 uV10020 mV 150 IN x 210020 mV 500 150 Input Offset Current nA 2 nA x 350 920 mV 6 nA x 350 Q20 UN 18 53 110 dBgt3l6 ppm X 5 V20 mV 002 Match X 5 V20 mVIOO 791 500 Total Absolute Error 7558 11310 DRIFT TO 85 C Gain Drift ppm C 50 ppm 10 ppm x 60 C 100 ppm C Track x 60 C 3600 6000 Input Offset Voltage Drift uV C 1 uV C x 60 C20 UN 25 uV C x V2 x 60 C20 mV 3000 10607 Output Offset Voltage Drift uV C 15 uV C x 60 C10020 mV 25 uV C x 2 x 60 C10020 mV 450 150 Total Drift Error 7050 16757 RESOLUTION Gain Nonlinearity ppm of Full Scale 40 ppm 40 ppm 40 40 Typ 01 H2710 Hz Voltage Noise uV pp 028 IN pp20 mV 038 IN pp x V220 UN 14 27 Total Resolution Error 54 67 Grand Total Error 14662 28134 G 100 Vgil5V All errors are minmax and referred to input REV E 11 A0620 ADBZUB 010mA Figure 35 A Pressure Monitor Circuit Which Operates on a 5 VSingIe Supply Pressure Measurement Although useful in many bridge applications such as weigh scales the AD620 is especially suitable for higher resistance pressure sensors powered at lower voltages where small size and low power become more signi cant Figure 35 shows a 3 k9 pressure transducer bridge powered from 5 V In such a circuit the bridge consumes only 17 mA Adding the AD620 and a buffered voltage divider allows the signal to be conditioned for only 38 mA oftotal supply current Small size and low cost make the AD620 especially attractive for voltage output pressure transducers Since it delivers low noise and drift it will also serve applications such as diagnostic non invasive blood pressure measurement PATIENTCIRCUIT PROTECTIONISOLATION Medical ECG The low current noise ofthe AD620 allows its use in ECG monitors Figure 36 where high source resistances of 1 M9 or higher are not uncommon The AD620 s low power low supply voltage requirements and space saving 8 lead mini DIP an SOIC package offerings make it an excellent choice for battery powered data recorders Furthermore the low bias currents and low current noise coupled with the low voltage noise of the AD620 improve the dynamic range for better performance The value of capacitor C1 is chosen to maintain stability of the right leg drive loop Proper safeguards such as isolation must be added to this circuit to protect the patient from possible harm OUTPUT 1VImV OUTPUT AMPLIFIER 6V Figure 36 A Medical ECG Monitor Circuit 12 REV E AD620 Precision VI Converter The AD620 along with another op amp and two resistors makes a precision current source Figure 37 The op amp buffers the reference terminal to maintain good CMR The output voltage VX of the AD620 appears across R1 which converts it to a current This current less only the input bias current of the op amp then ows out to the load vm gt Re vm I vX Vm VIN 1 G L R1 Figure 37 Precision VoltagetoCurrent Converter Operates on 18 mA i3 V GAIN SELECTION The AD620 s gain is resistor programmed by R6 or more pre cisely by whatever impedance appears between Pins 1 and 8 The AD620 is designed to offer accurate gains using 0171 resistors Table II shows required values of RG for various gains Note that for G 1 the RG pins are unconnected R6 co For any arbitrary gain RG can be calculated by using the formula RG 49 4 M G 7 1 To minimize gain error avoid high parasitic resistance in series with R6 to minimize gain drift RG should have a low TCiless than 10 ppmOCifor the best performance Table II Required Values of Gain Resistors 1 Std Table Calculated 01 Std Table Calculated Value of R5 0 39 Value of R5 0 ain 499 k 1990 493 k 2002 124 k 4984 124 k 4984 549 k 9998 549 k 9998 261 k 1993 261 k 1993 100 k 5040 101 k 4991 499 1000 499 1000 249 1994 249 1994 100 4950 988 5010 499 9910 493 1003 REV E INPUT AND OUTPUT OFFSET VOLTAGE The low errors ofthe AD620 are attributed to two sources input and output errors The output error is divided by G when referred to the input In practice the input errors dominate at high gains and the output errors dominate at low gains The total V05 for a given gain is calculated as Total Error RTI input error output errorG Total Error RTO input error X G output error REFERENCE TERMINAL The reference terminal potential defines the zero output voltage and is especially useful when the load does not share a precise ground with the rest of the system It provides a direct means of injecting a precise offset to the output with an allowable range of 2 V within the supply voltages Parasitic resistance should be kept to a minimum for optimum CMR INPUT PROTECTION The AD620 features 400 Q of series thin film resistance at its inputs and will safely withstand input overloads of up to i15 V or r 60 mA for several hours This is true for all gains and power on and off which is particularly important since the signal source and amplifier may be powered separately For longer time periods the current should not exceed 6 mA IIN S V1N400 9 For input overloads beyond the supplies clamping the inputs to the supplies using a low leakage diode such as an FD333 will reduce the required resistance yielding lower noise RF INTERFERENCE All instrumentation amplifiers can rectify out ofband signals and when amplifying small signals these rectified voltages act as small dc offset errors The AD620 allows direct access to the input transistor bases and emitters enabling the user to apply some first order filtering to unwanted RF signals Figure 38 where RC 12 fit and where f 2 the bandwidth of the AD620 C S 150 pF Matching the extraneous capacitance at Pins 1 and 8 and Pins 2 and 3 helps to maintain high CMR Ra V E E iiiiiilLiLIJ Figure 38 Circuit to Attenuate RF Interference 3 A0620 COMMONMODE REJECTION Instrumentation ampli ers like the AD620 offer high CMR which is a measure of the change in output voltage when both inputs are changed by equal amounts These speci cations are usually given for a full range input voltage change and a speci fied source imbalance For optimal CMR the reference terminal should be tied to a low impedance point and differences in capacitance and resistance should be kept to a minimum between the two inputs In many applications shielded cables are used to minimize noise and for best CMR over frequency the shield should be properly driven Figures 39 and 40 show active data guards that are configured to improve ac common mode rejections by bootstrapping the capacitances of input cable shields thus minimizing the capaci tance mismatch between the inputs Vs Figure 39 Differential Shield Driver 0 39 VOUT REFERENCE 0 V5 Figure 40 CommonMode Shield Driver 14 GROUNDING Since the AD620 output voltage is developed with respect to the potential on the reference terminal it can solve many grounding problems by simply tying the REF pin to the appropriate local ground In order to isolate low level analog signals from a noisy digital 39 e 39 39t39 A h ve separate analog and digital ground pins Figure 41 It would be conve nient to use a single ground line however current through ground wires and PC runs of the circuit card can cause hun dreds of millivolts of error Therefore separate ground returns should be provided to minimize the current ow from the sensi tive points to the system ground These ground returns must be tied together at some point usually best at the ADC package as At shown ANALOG as DIGITAL PS 1 v c 15v 5 01m 01m 1uF mF 1p IV ll 1 I 1 C J u V J AD620 a 39 AD585 An514A 323Tquot s SIH ADC OUTPUT Figure 41 Basic Grounding Practice REV E A0620 sources such as transformers or ac coupled sources there must be a dc path from each input to ground as shown in igure 42 Refer to the Imlrummmtion Ampli er Application Guide free from Analog Devices for more information regarding in amp GROUND RETURNS FOR INPUT BIAS CURRENTS Input bias currents are those currents necessary to bias the input transistors of an ampli er There must be a direct return path for these currents therefore when amplifying oating input applications vS INPUT R6 0 VOUT f INPUT REFERENCE n I TO POWER TO 3ng SUPPLY GROUND GROUND Figure 42b Ground Returns for Bias Currents With Figure 423 Ground Returns for Bias Currents With Thermocouple Inputs Transformer CoupIed Inputs NPUT 100k0 100k0 n u GROUND Figure 420 Ground Returns for Bias Currents With AC CoupIed Inputs REV E 15 AD620 OUTLINE DIMENSIONS Dimensions shown in inches and mm Plastic DIP N8 Package 0430 1092 343 4 0325 325 PIN 1 0300 0060152 0210 5337 0015033 10195 495 MA 7 7 7 i so 0115293 0160 406 7 Raw 7 MIN w 0115293H4 1 00150 381 SEATING 0022 0558 0070 177 PLANE 0003 0104 0014 0356 B39SC 0045 115 Cerdip Q8 Package 0005 013 0055 14 MIN M k 1 0310 737 072720 559 kPN1 0320 313 0405 1029 7 M k AX aw 0200 503 11015 038 MAX 7 7 7 Lowe 0200 503 7 1331 L MIN 0125 318 lt H H 41 00150 38 SEATING a 0023 058 0100 0070 178 PLANE 105a 7 0003 020 0014036 2500030 076 BSC SOIC SO8 Package 01963 500 1 1390 4391 1 1 01574 400 01497 330 PN1 00633 175 00196 050 a 00093 025 W 1 VWYMS 00040 010 i SEATING 3592 0009325 0 00500 127 PLANE BSC 39 39 00075 019 00160 041 16 C15990404799 PRINTED IN USA


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