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# Introduction to Digital Electronics EL ENG 42

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This 20 page Class Notes was uploaded by Kris Heathcote on Thursday October 22, 2015. The Class Notes belongs to EL ENG 42 at University of California - Berkeley taught by Staff in Fall. Since its upload, it has received 23 views. For similar materials see /class/226763/el-eng-42-university-of-california-berkeley in Electrical Engineering at University of California - Berkeley.

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Date Created: 10/22/15

Notes l Midterm l Thursday February 24 in class Covers through text Sec 43 topics of HW 4 GSIs Will review material in discussion sections prior to the exam No books at the exam no cell phones you may bring one 812 by 11 sheet of notes both sides of page OK you may bring a calculator and you don t need a blue book EECS42 Spring 2005 Week 4b Slide 1 Prof White Lecture Week 4b OUTLINE Transient response of lstorder circuits Application modeling of digital logic gate Reading Chapter 4 through Section 43 EECS42 Spring 2005 Week 4b Slide 2 Prof White Transient Response of 1StOrder Circuits In Lecture Week 4a we saw that the currents and voltages in RL and RC circuits decay exponentially with time with a characteristic time constant 1 when an applied current or voltage is suddenly removed In general when an applied current or voltage suddenly changes the voltages and currents in an RL or RC circuit will change exponentially with time from their initial values to their final values with the characteristic time constant TI where xt is the circuit variable voltage or current xfiS the final value of the circuit variable tn is the time at which the change occurs EECS42 Spring 2005 Week 4b Slide 3 Prof White Procedure for Finding Transient Response 1 Identify the variable of interest For RL circuits it is usually the inductor current iLt For RC circuits it is usually the capacitor voltage vct 2 Determine the initial value at t 10 of the variable Recall that iLt and vct are continuous variables iLt0 iLt0 and vct0 vct0 Assuming that the circuit reached steady state before t0 use the fact that an inductor behaves like a short circuit in steady state or that a capacitor behaves like an open circuit in steady state EECS42 Spring 2005 Week 4b Slide 4 Prof White Procedure cont d 3 Calculate the final value of the variable its value as t 9 00 Again make use of the fact that an inductor behaves like a short circuit in steady state 2 9 00 or that a capacitor behaves like an open circuit in steady state 2 9 oo 4 Calculate the time constant for the circuit 1 UK for an RL circuit where R is the Th venin equivalent resistance seen by the inductor r RC for an RC circuit where R is the Th venin equivalent resistance seen by the capacitor EECS42 Spring 2005 Week 4b Slide 5 Prof White Example RL Transient Analysis Find the current it and the voltage vt t O R Q Vs100V 1 First consider the inductor currenti 2 Before switch is closed i 0 gt immediately after switch is closed i 0 3 A long time after the switch is closed i Vs R 2 A 4 Time constant LR 01 H50 Q 0002 seconds it 2 O 2 et00 002 2 26 500 Amperes EECS42 Spring 2005 Week 4b Slide 6 Prof White Vs100V Now solve for vt for t gt 0 From KVL W 100 iR 100 2 2e 500t 50 100950 volts EECS42 Spring 2005 Week 4b Slide 7 Prof White Example RC Transient Analysis Find the current it and the voltage vt R1 10 k t O igt Vs5V R210k9 vC1uF 1 First consider the capacitor voltage v 2 Before switch is moved v 0 gt immediately after switch is moved v 0 3 A long time after the switch is moved v Vs 5 V 4 Time constant RIC 104 Q10396 F 001 seconds W 5 0 5 e U OWO1 5 5610 Volts EECS42 Spring 2005 Week 4b Slide 8 Prof White s R210k 2 VC1 F Now solve for it for t gt 0 o V t 5 55 100r From Ohm s Law 1t S v e R1 104 5 X 10394639100tA A EECS42 Spring 2005 Week 4b Slide 9 Prof White EECS42 Spring 2005 Week 4b Slide 10 Prof White EECS42 Spring 2005 Week 4b Slide 11 Prof White Application to Digital Integrated Circuits le When we perform a sequence of computations using a digital circuit we switch the input voltages between logic 0 eg O Volts and logic 1 eg 5 Volts Typical Logic 1 x Iiutput 5 V Digital Logic Gate Buffer The output of the digital circuit changes between logic 0 and logic 1 as computations are performed EECS42 Spring 2005 Week 4b Slide 12 Prof White Digital Signals We compute with pulses T We send beautiful pulses in g time But we receive lousylooking T8 pulses at the output m L time gt Capacitor charging effects are responsible Every node in a real circuit has capacitance it s the charging of these capacitances that limits circuit performance speed EECS42 Spring 2005 Week 4b Slide 13 Prof White Circuit Model for a Logic Gate Recall from Lecture 1 that electronic building blocks referred to as logic gates are used to implement logical functions NAND NOR NOT in digital ICs Any logical function can be implemented using these gates A logic gate can be modeled as a simple RC circuit R Vina C Vow switches between low logic 0 and high logic 1 voltage states EECS42 Spring 2005 Week 4b Slide 14 Prof White Logic Level Transitions Transition from 0 to 1 Transition from 1 to 0 capacitor charging capacitor discharging RC RC mm 1 e t m t Vout Vhigh 063Vhigh O RC 0 R39C time Vhigh is the logic 1 voltage level EECS42 Spring 2005 Week 4b Slide 15 Prof White Sequential Switching A What if we step up the input E S wait for the output to respond then bring the input back down gt Vout 39 time I Prof White EECS42 Spring 2005 Week 4b Slide 16 Pulse Distortion R The input voltage pulse IW width must be large enough otherwise the Vint C out output pulse is distorted We need to wait for the output to reach a recognizable logic level before changing the input again Pulse width 01RC Pulse width RC Pulse width 10RC 1 0 5 10 15 20 25 Time Time Time EECS42 Spring 2005 Week 4b Slide 17 Prof White Example Suppose a voltage pulse of width R 5 us and height 4 V is applied to the Wn Nerout input of this circuit beginning at t 0 C R 25 kQ IRC25us C1nF First Vout will increase exponentially toward 4 V When Vin goes back down Vout will decrease exponentially back down to O V What is the peak value of VOL The output increases for 5 us or 2 time constants 9 It reaches 1e392 or 86 of the final value 086 x 4 V 344 V is the peak value EECS42 Spring 2005 Week 4b Slide 18 Prof White 4 35 3 25 Vent 2 39 15 1 05 O0 2 4 6 810ts 44e39t25H8 for O S t S 5 MS VOUtt 3449t5HS25HS t gt 5 EECS42 Spring 2005 Week 4b Slide 19 Prof White EECS42 Spring 2005 Week 4b Slide 20 Prof White

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