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by: Sterling Schmeler


Sterling Schmeler
GPA 3.95


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Class Notes
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This 7 page Class Notes was uploaded by Sterling Schmeler on Monday October 26, 2015. The Class Notes belongs to CS2410 at University of Pittsburgh taught by Staff in Fall. Since its upload, it has received 12 views. For similar materials see /class/229402/cs2410-university-of-pittsburgh in ComputerScienence at University of Pittsburgh.

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Date Created: 10/26/15
Virtual Memory Virtual Memory Main memory is quotcachequot for secondary storage Secondary storage disk holds the complete quotvirtual address spacequot Only a portion of the virtual address space lives in the physical address space at any moment of time Page 1 Virtual Memory Main memory is a cache for secondary storage Address translation Virtual addresses physical addresses Physical memory caches part of the virtual space into a physical memory Disk storage contains the 1 virtual address space Advantages Illusion of having more physical memory Disk acts as the I rimar memory Comes from the days of limited memory systems Multiple programs share the physical memory Permit sharing without knowing other programs Division of memory among programs is automatic 0 Program relocation Program addresses can be mapped to any hlsical location Physical memory does not have to be contiguous Protection Per process protection can be enforced on pages Page 2 Basic VM Issues reisters missing item fetched from secondary memory only on the occurrence of a fault gt demand load poiicy missing item fai Addr Trans Mecha sm physical address disk 7 pages OS performs this transfer Pages Virtual Memory Blocks 0 Page faults the data is not in memory retrieve it from disk Huge miss penalty millions of cycles disk access thus pages should be fairly large eg 4KB to amoritize the high access time Reducing page faults is important due to high access time LRU is worth the price fully associative mapping Can handle the faults in software instead of hardware the cost is in the disk access so we have time to do more clever things in the OS Use write back because write through is too expensive writethrough not reasonable due to high cost ofdisk Page 3 Address Translation 31 11 0 Virtual page number I Page offset I Virtual address Physical page number Page offset PhySCaaddress Full associativity tag is the virtual page number Tag comparison is replaced by a table lookup This example 4GB virtual memory 1GB physical memory page size is 4KB 2 with 28 physical pages Page Tables How do we know what s where On disk In memory Virtual page number Physical memory Page table Dlsk storage 39 7 Is Virtual page mapped Where is the virtual page mory physical page Disk location Page 4 Page Tables for Address Translation Page Table Base Reg Index into page table Page table memory located in I h sical address memory TLB s Away to speed up translation is to use a special cache of recently used page table entries this has many names but the most frequently used is Translation Lookasicle Buffer or TLB Really just a cache on the page table mappings TLB access time comparable to cache access time much less than main memory access time Page Tables Start of page table Page Offset Page address register I Virtual page nu er Page table Physical address Memory Space Page address register start of a process s page table Page table PAR part of process context Each memory reference requires two memory operations Page fault needs memory operation disk access Page 5 Page Table Entries Valid bit has the page been loaded Read and write permissions can the user program read and write to this page Dirty bit has the physical page been written to and will need to be written back to disk when replaced Use bit has the page been used recently Physical memory page mapping of virtual page to physical page in memory Disk location mapping of virtual page to virtual page on disk Translation Lookaside Buffer TLB Reduce memory reference time if we can store the page table in hardware Example VS 32bit address one page 4KB page table 4MB Memory references virtual address TLB gt Vtrtual Physical Space address 0quot diSk Physical memory l Page 6


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