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Advanced Digital Design

by: Stanford Cummings DDS

Advanced Digital Design ECPE 174

Stanford Cummings DDS
GPA 3.84


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Class Notes
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This 3 page Class Notes was uploaded by Stanford Cummings DDS on Monday October 26, 2015. The Class Notes belongs to ECPE 174 at University of the Pacific taught by Staff in Fall. Since its upload, it has received 15 views. For similar materials see /class/229910/ecpe-174-university-of-the-pacific in ELECTRICAL AND COMPUTER ENGINEERING at University of the Pacific.

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Date Created: 10/26/15
Quartus 11 Introduction Using VHDL Design This tutorial presents an introduction to the Quartus H CAD system It gives a general overview of a typi cal CAD ow for designing circuits that are implemented by using FPGA devices and shows how this ow is realized in the Quartus II software The design process is illustrated by giving stepbystep instructions for using the Quartus II software to implement a very simple circuit in an Altera FPGA device The Quartus II system includes full support for all of the popular methods of entering a description of the desired circuit into a CAD system This tutorial makes use of the VHDL design entry method in which the user speci es the desired circuit in the VHDL hardware description language Two other versions of this tutorial are also available one uses the Verilog hardware description language and the other is based on de ning the desired circuit in the form of a schematic diagram The last step in the design process involves con guring the designed circuit in an actual FPGA device To show how this is done it is assumed that the user has access to the Altera DE2 Development and Education board connected to a computer that has Quartus II software installed A reader who does not have access to the DE2 board will still nd the tutorial useful to learn how the FPGA programming and con guration task is perform ed The screen captures in the tutorial were obtained using the Quartus II version 5039 if other versions of the software are used some of the images may be slightly different Contents Typical CAD ow Getting started Starting a New Project VHDL Design Entry Compiling the Design Pin Assignm ent Simulating the Designed Circuit Programming and Con guring the FPGA Device Testing the Designed Circuit Computer Aided Design CAD software makes it easy to implement a desired logic circuit by using a pro grammable logic device such as a eldprogrammable gate array FPGA chip A typical FPGA CAD ow is illustrated in Figure l Design Entry Functional Simulation Yes Timing Analysis and Simulation No Timing Programming and Configuration Figure 1 Typical CAD ow The CAD ow involves the following steps 0 Design Entry 7 the desired circuit is speci ed either by means of a schematic diagram or by using a hardware description language such as VHDL or Verilog 0 Synthesis 7 the entered design is synthesized into a circuit that consists of the logic elements LES provided in the FPGA chip 0 Functional Simulation 7 the synthesized circuit is tested to verify its functional correctness this simulation does not take into account any timing issues


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