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C LIT 3610

by: Mara Bechtelar

C LIT 3610 C LIT 3610

Mara Bechtelar
The U
GPA 3.95


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This 17 page Class Notes was uploaded by Mara Bechtelar on Monday October 26, 2015. The Class Notes belongs to C LIT 3610 at University of Utah taught by Staff in Fall. Since its upload, it has received 28 views. For similar materials see /class/230019/c-lit-3610-university-of-utah in Literature at University of Utah.


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Date Created: 10/26/15
Electronics 1 lecture 5 Iliuital logic Digital Systems Digital Logic Bobrow pp 749790 Binary Numbers Binary Arithmetic Digital Logic Circuits Boolean Algebra Logic circuit families nigital Systems umlcgmx h x 1 Iv m haf 1quot Computer Motherboard Intel Quad Core CPU But need to start simple first nigital Systems Combinational Logic Sequential LOQiC State Systems nxstmic L f current i C nmhmazmnnl slau logic Clan Examplu M u l39iniluvslulc machine A process Malcmcnl cun com cnicnlly code the combinations logic ohhc smlc machine Start Ili ilal Systems Example of a finite state machine A counter SNSMS I SN54L5191 SN741915N7ILSI91 SVNCIIRDNOUS UPDUWN CHUNIERS WITH DDWNIUP MODE CONTROL luau11191anpnshwulumcl 9 TEXAS INSI RUM EN39I39S Binary numbers Binary Arithmetic Digital Logic Circuits Boolean Algebra Bill l ll NIIIIIIIBI SIBaSB 2 Decimal Binary 5362510 I 1101011012 Decimal anx10n an1x10n1a0x100a1x101 amx10m Binary anx 2n an1x 2n1a0x 20a1x 21 amx 2m Octal Hexadecimal Binary Arithmetic Addition carries Subtraction nm borrows Convert to addition by using 1 s complement 1 To n add the 1 s complement of m 2 Ifthe sum has a carry at the left end add a 1 to the least sinificant digit endaround carry of the sumThe result is nm 3 If the sum has no carry at the left endtake the 1 s complement of the sum and place a negative sign in front of it The result is nm 1 s complement is obtained by changing 1 s to 0 s and 0 s to 1 s circuits that deal with Os and 1s IF IT electronic states lllG39lll LbW either or I X I Boolean states TEE FampSE I I digital input 9 digital output digital information combinational tasks 9 gates transmit without sequential tasks noise 9 flipflops 9 g Gates and Truth Tables 823 inputs A B output Q 2 or more OR AND NOR NAND XOR AB A B 7MB NB AGDB e 3 3D ABQ ABQ ABQ ABQ ABQ 000 000 001 001 000 011 010 010 011 011 101 100 100 101 101 111 111 110 110 110 llsing 09 on Gates AND FATE FAB gtLngt gtAn4 gtono gtongt gtgtngt gtgtngt gt3Mno gtNHA NH 20 Qmomqmsom 220 gtwuwgt gtwuwgt gtw9uwvo gtiwovuwvo gtAwovugtwgto gtiwovuwvov 43206 gtwngtw gtwuww gtUmo omltltmn gtgtwugt gtgtwugtw gtAgtwvugt gtAgtwvugtw logic circuit Families Define 2 voltage or 2 current levels representing binary 1 or O 1960 Fairchild Semiconductors RTL 1964 DTL 9 higher speed 1963 SUHL Sylvania Universal High Level Logic TTL 1968 CMOS now PLD 9 programmable logic device ASIC 9 application specific integrated circuit Trends UN 5V 33V 25V 18V 12V 09 V TN 10ns 9 ns level Terminoloum VIH HIGHstate input voltage logic 1 input VIL LOWstate input voltage logic 0 input VOH HIGHstate output voltage logic 1 output VOL LOWstate output voltage logic 0 output lIH HIGHstate input current logic1 input llL LOWstate input current logic 0 input lOH HIGHstate output current logic 1 output lOL LOWstate output current logic 0 output Fanin of standard outputs that an input can take Fanout of standard inputs that an output can drive Delay times between input and corresponding output transition tFHL turn off delay logic 1 to O tFLH turn on delay logic 0 to 1 5 0 quot Vm Input High level thage 4 A VIL Input Low level Voltage e Von Output High level Voltage 3939393939 39 VOL Output Low level Voltage 4 f k A quot VT Threshold thage Typical values 3 OX rquot Averaged over Families 1 0v u 1 um Imu I uuuuuu u n u u 12V Ull V C IS TTL 1IS TIL L TI39L L 1IS AC HC ACT HCI39 F S AS LV LV LVC AHC C AHCTFCT LS ALS ALVC B39I39l Resistor Transistor logic vIH 36V vIL ov First logic family of Integrated Circuits From the sixties outdated Limited fanin three Inputs before it lost Tolerance to noise iCTED23 if GENERAL DESCRIPTION l4 uuai munulitnic circuits that are xlna3i39 Wk 3 Planar Epitaxial Process The anoo Blifer is an inverting driver capable ul supplying IEmA 01 current at 09 velt its principal uses are as a butter tn provide isolation and increase furroul and as a line driver other required The um device is a dual twn input gate Each gate perturms he NANDNOR logicallunct39lon using RTL circuitry Bntn tne uL 900 and the limit are curnpntible with the nasic industrial Mierulngie Family and are guaranteed to operate reliably over the temperature range 15 to 55 OPERATING VOLTAGE RANGE Collector Supply Voltage vcc 35 v t 10 e 15 C lo 55 C 55 C to 125 C LOGIC SYMBOL AND LOAD FACTORS Operating Temperature Rang Storage Temperature Range uL 900 1L 914 3 3 6 FAN 0UT 80 3 To order the following 3 number should be specified UHASQDOZEX UHA991428X LOADING RULES AND DRIVE FACTORS AUGUST 1965 I SLA66 PHYSICAL DMENSiONS tslMtLAR to r05 w T FANOUT 16 FANOUT 16 Since these units are compatible with ll39le Enllre Industrial Micrnlogic Family which includes lowpower units a normalized set of rules has been established when driving lowpower Micrulugie it will he noted that each lowpower input base represents a load factor a 1 while each mediumpower Micrulugic lnput represents a load factor of 3 inputs provided the sum of the lnpuk loads dues nut exceed the uutpul drive factor The output drive 13mmquot can be used to drive any combination of DUAL TWO INPUT GATE SCHEMATIC TYPICAL RESISTOR VALUES R1 450 R 640 COPYRIGHT FAIRCHILD SEMICONDUCTOR 1955 MANUFACTURED UNDER ONE OR MORE or THE FOLLOWING u s PAYENTS 29E1877 3025589 3064167 3103359 M17250 OTHER PATENTS PENDING BUFFER ELEMENT SCHEMATIC TYPICAL RESISTOR VALUES R1 450 R2 640 R3 100 R4 looo PRINTED IN usA 2340042736 1 M SlanHlO GELLVHEELNI OISO IOHOIW ILM IVIHlS GNI l quot1 Transistor Transistor logic Power supply 5V HIGH 5V 2V 5V LOW OV 00V 08V Standard naming TTL starts with 74 0 C 70 C or 54 military 55 C 125 C Subfamilies 74xx standard 74L lowpower 74H highspeed 74S Schottky 74LS lowpower Schottky 74AS advanced Schottky 74ALS advanced lowpower Schottky 74FAST fast advanced Schottky 39I39Tl FanOut canahilities 74 1050 8 8 3920 quot74L 21oi 1p1r1o quot74H1250quot 1010 25 7481210010 1050 74LS5A40 4 4 10 74 74L 74H 74s 74LS TTL drivers 9 TTL loads 9


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