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by: Eve Hane

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# Digital Intgrtd Circuits ECET 331

Eve Hane
WCU
GPA 3.98

Paul Yanik

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COURSE
PROF.
Paul Yanik
TYPE
Class Notes
PAGES
17
WORDS
KARMA
25 ?

## Popular in Electrical Engineering & Computer Science

This 17 page Class Notes was uploaded by Eve Hane on Thursday October 29, 2015. The Class Notes belongs to ECET 331 at Western Carolina University taught by Paul Yanik in Fall. Since its upload, it has received 9 views. For similar materials see /class/230967/ecet-331-western-carolina-university in Electrical Engineering & Computer Science at Western Carolina University.

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Date Created: 10/29/15
Chapter 2 Logic Functions and Gates ECET331 rDmnai imagvated cwmms Basic Logic Functions Three Basic Logic Functions 39 AND 39 OR 39 NOT ECET 331 r Dmnai magma Circuits Logic Function Representation Logic functions can be represented 39 Algebraically 39 Using truth tables 39 Using electronic circuits ECET 331 r Dmnai magma Circuits Algebraic Representation 0 Uses Boolean algebra o Boolean variables have two states binary o Boolean operators include AND DR NOT ECET 331 r Dignal integrated 01mm Truth Table Representation Defines the output of a function for every possible combination of inputs A system with n inputs has 2quot possible combinations ECET 331 r Dignal integrated 01mm Electronic Circuit Representation 0 Uses logic gates to perform Boolean algebraic functions 0 Gates can be represented by schematic symbols 0 Symbols can be either distinctiveshape or rectangularoutline ECET 331 r Dignal integrated 01mm Distinctive Shape Schematic Symbols Uses different graphic representations for different logic functions Uses a bubble a small circle to indicate a logical inversion ECET 331 7 Diana lnlEuvaled cwcmls RectangularOutline Schematic Symbols All functions are shown in rectangular form with the logic function indicated by standard notation inside the rectangle The notation specifying the logic function is called the qualifying symbol Inversion is indicated by a 12 arrowhead ECET 331 7 Diana lnlEuvaled 01mm NOT Function One input and one output The output is the opposite logic level of the input The output is the complement of the input ECET 331 7 Diana lnlEuvaled 01mm NOT Function Boolean Representation o Inversion is indicated by a bar over the It signal to be inverted Truth Table YA ECET 331 r Dignal lnlEmaled chmts NOT Function Electronic Circuit 0 Called a NOT gate or more usually an Inverter boluses a triangle with inversion e o Distinctiveshape sym t ECET 331 r Dignal lnlEmaled chmts NOT Function Electronic Circuit 0 Rectangular symbol 1quotandthe inversion half A arrowhead IEEE std 84 ECET 331 r Dignal lnlEmaled chmts AN D Fu nction Two or more inputs one output Output is HIGH only when all of the inputs are HIGH Output is Low whenever any input is Low Logical Product Eczrnl Dvnai imnvmnd was AND Boolean Representation AND symbol is Wquot or nothingata vAE vAE Eczrnl Dvnai imnvmnd was AND Function Electronic Circuit n Called anANDgate A B n Distinctiveshape sym bol uses AND designation A symbol b u Distinclivesnupe use 8 as designator Eczrnl Dvnai imnvmnd was OR Function 39 4 one output Output is HIGH whenever one or more input is HIGH Output is Low only when all oftheinputs are Low Logical Sum Eczrni Dvnai mm owns OR Boolean Representation 0R Sym bol is m YAE Eczrni Dvnai mm owns OR Function Electronic Circuit Called an OR gate on Y A B Distinctiveshape symbol uses OR a nisunoiivesnape designation 3 7 ye a Rectangularshape 5Vquot39b l uses 2 as h Reclanguiirnu inu designator Eczrni Dvnai mm owns Active Level The logic level defined as ON for a circu39 When a logic HIGH is ON the signal is activeHIGH When a logic LOW is ON the signal is activeLOW ECET 331 r Dlunal lnlEgvaled Clvculls NAND Function Generated by inverting the output of the AND funct39on Output is HIGH whenever any input is LOW Output is LOW only when all inputs are HIGH ECET 331 r Dlunal lnlEgvaled 01mm NAND Boolean Representation Uses AND with an Inverslon overbar Tmh Table A quot 39 ECET 331 r Dlunal lnlEgvaled 01mm NAND Function Electronic Circuit o Called a NAND gate 0 Uses the AND symbol with inversion on the output 3 en A V scam um mm was NOR Function 0 Generated by inverting the output of the 0R function Outp 39 Low 0 Outputs is LOW whenever any input is HIGH Eczrw um mm was NOR Boolean Representation R W39m 3quot Ilulh Iahle Inverslon overhar YAE Eczrw um mm was NOR Function Electronic Circuit 0 called a NOR gate 0 Uses 0R symbol with inversion on the output 433 2434 jwv scam um mm was Exclusive OR Gate 0 mo inputs one output 0 Output is HIGH when one and only one Input 39 Is H GH 0 Output is LOW when both inputs are equal both HIGH or ho W o vABA EB Eczrw um mm was Exclusive 0R Gate Electronic Circuit I Called anXORgate A i E VA B a Dlstiuullveshape Irth table 1 v A vn E QB Eczrw um mm was 1 41 390 n Reclungulsvoutllne Exclusive NOR Gate 0 mo inputs one output 0 Output is HIGH when both inputs are equal both HIGH or both Low 0 Output is LOW when one and only one input is HIGH Eczrw um mm was Exclusive NOR Gate Electronic Circuit Called anXNORgate quot 3D mm B D a Dlsrlncllveshlpa A YgtA B B r 9 n Ranangular outlina Yrmnhhle 3 r Eczrw um mm um Gate Equivalence NAND o A NAND gate can he represented by an AND gate with inverted output 0 A NAND gate can he represented by an OR gate with inverted inputs V El Eczrw um mm was Gate Equivalence NAND H ED E m t i m SeD qb H D 1D 3 9 WWWquot mvcnmnoa Eczrw um mm was Gate Equivalence NOR o A NOR gate can he represented by an OR gate with inverted output 0 A NOR gate can he represented by an AND gate with inverted inputs 0 EXERCISE Eczrw um mm was Gate Equivalence DeMargan Farms 0 Change an AND function to an OR function and an OR function to an AND function 0 lnverttheinputs o Invert the outputs Eczrw um mm was DeMorgan s Theorems Eczrnl Dvnal mm was Logic Switches Can be used to create logic voltages for circuit inputs Provides a logic HIGH orLDW depending on switch position Commonly used switches include nnrmzliyrnpen pushhmlnn nn Eczrnl Dvnal mm was Logic Switches V Eczrnl Dvnal mm was Light Emitting Diodes LEDs illuminates when it is conductln Conducts current in one direction and only 39 9 n Can be used to monitor outputs ofa logic circuit Provide a visual indication of a logic state a Can be wired to display activeHIGH or active Low Eczrnl Dvnai imevmed we LEDs a 4739 Anvdc modo I Eczrnl Dvnai imevmed we LED Operation 0 Lights when current flows from anode to cathode 0 Use a resistor to avoid burning out the D with too much current Eczrnl Dvnai imevmed we L E D C i rcu it 470 ismer mm s npm IO or closed Vi Eczrw um mm was Logic Gate Enable 0 The input to a gate that allows the output to respond to other inputs 0 A logic LOW for an OR or NOR gate a logic HIGH for an AND or NAND gate Eczrw um mm was Logic Gate Inhibit o The input to a gate that forces the output to ignore any other input 0 A logic HIGH for an OR or NOR gate a logic LOW for an AND or NAND gate Eczrw um mm was Tristate Buffer Three output states 1N Um HIGH Low and high gt4 impedance or Mm Requires a separate input to control which iN our output state is i selected at a mnna EcErnl Dvnal lmevmed was Tristate Buffer Applications Used to connect multiple outputs ogether Used in controlling the operation of buses EcErnl Dvnal lmevmed was Integrated Circuit Packages integrated circ ts qul cnntain many devices in a s e package several packaging nplinm are available 0ne cnrnrnnn package is called dua 39n 39ne package 1mm EcErnl Dvnal lmevmed was Other IC Packages Sam2 vwvwadaplevs cam Eczrni Dvnai mm was Integrated Circuit Technology 0 One common form is transistortransistor logic called 139I39L o The other common form is Complementary MetalOxide Semiconductor called CMOS Eczrni Dvnai mm mm Integrated Circuit Designation o Standard form is 74XXNN x is the logic family designation NN identi es the speci c Iogic function 0 See textbook p 47 Eczrni Dvnai mm was Terms 0 SSI MSI LSI VLSI Small Medium Large or Very Large scale Integration depending on the number of gates in an IC package lt121210010010kgt10k gates o Throughhole IC packages which are mounted on circuit boards by inserting pins through holes in the board and soldering them in place MT Surface Mount Technology A system of mounting ID to the surface of a circuit board rather than through hole ECET 3317Dlunallmwlaled Cllculls

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