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by: Baylee Wehner

MicroNanoFabricationEgr EE480

Baylee Wehner
GPA 3.63


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This 61 page Class Notes was uploaded by Baylee Wehner on Thursday October 29, 2015. The Class Notes belongs to EE480 at Wright State University taught by Staff in Fall. Since its upload, it has received 18 views. For similar materials see /class/231094/ee480-wright-state-university in Electrical Engineering at Wright State University.

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Date Created: 10/29/15
Willkil l39l Sl39 t Wright State University EE480680 MicroElectroMechanical Systems MEMSl Summer 2006 LaVern Starman PhD Assistant Professor Dept of Electrical and Computer Engineering Email lavernstarmana tedu EE 480680 SummerZOOG WSU L Starman MloroElectroMechanloal Systems MEMS 1 o How are they made 0 What are they made out of Fli lengthsaim Williilllflll39l l ilt V Willillln ilillillll 39 tilll lllllii l39llllr39i llillll lilli39yt39li l llllillllwllllllll Transistors ill it ll llllilllllll i Nthl w mm D10des quot Resistors 39 3 Capacitors EE 480680 Summer 2006 WSU L Starman MioroElectroMechanioal Systems MEMS 2 Microelectronics FFAWFH ummvnnn m nmn Course Outline Semiconductor Materials Crystal structure growth amp epitaxy Film formation oxidation amp deposition Metalization Lithography amp etching Impurity doping diffusion amp implantation Lithography Etching Resistivity Measurement Other Techniques EEA Fi H mmmm Fr Wm H i rzrmzn 5 Wmuill Sm t 39 113 is r W tag 1 g r g 5 gang m4 mmmm Fr Wm H i rzrmzn 6 Semiconductor Materials RICH1T S39IITE Material Classes Solid Insulators Semiconductors Conductors Liquid Gas 0000 o o 0 one 39 0 o o o o o o 0 on o o 0 O on quot0 0000 o o o 000 39039039 39 Crystalline AmorphOUSLiquid Gas 2D schematic representation of crystalline solids amorphous materials or liquids and gases EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 7 Solids W39R SI1T STAT E General classification of solids based on the degree of atomic order a Amorphous b Polycrystalline c Crystalline No recognizable Completely ordered Entire solid is made up of longrange order in segments atoms in an orderly array Semiconductors are sensitive to Temperature photon flux illumination magnetic field pressure Variability controlled by selectively adding impurities on the order of 1ppm Lattice the periodic arrangement of atoms in a crystal EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS EE 480680 Summer 2006 WSU L Starman W39iill l lT SET E TABLE 2 Semiconductor Materials2 Compound Semiconductors NOTE We will concentrate primarily on Si most common MEMS material Reasons for Silicon usaqe General Semiconductor 39 39 l N Room Temp performance good ClaSSI Catm Symbquot me Element Si Silicon High quality Silicon di0Xide 39Ge Germanium Binary compound Grown thermal IVIV SiC Silicon carbide 39 Red U ced COSt IIIV AlP Aluminum phosphide AlAs Aluminum arsenide 2nOI most abundant element on earth Am Aluminuman momde 39 GaN Gallium nitride OXyg e n fl GaP Gallium phosphide 39 E a rth 8 CFU St GaAs Gallium areside GaSb Gallium antimonide Silica amp Silicates InP Indium phosphide 0 InAs Indium arsenide 0 11181 Indium antimonide 11V1 l ZnO Zinc oxide ZnS i Zinc sul de ZnSe Zinc selenide 39 I Z T Z39 t ll 3911 Compound semiconductor usaqe Cg ijm jufwj de 0 I CdSe Cadmium selenide B I n a ry CdTe Cadmium telluride 39 Te m a ry HgS Mercury filll de IVVI PbS Lead sul e Q u rn a ry PbSe Lead selenide Better electrical amp optical properties We Leadfe u de Ternary compound AIxGaHAs Aluminum galllum arsenide 39 GOOd f0 r AlxlnHAs Aluminum indium arsenide o 39 39 GaAs 4P Gallium arsenic phosphide H lgh Speed eeCtron ICS GaxIanAs Gallium indium arsenide Photon lC deVIces can Gallium indium phosphide Quaternary compound AleaHAsySbLg Aluminum gallium arsenic antimonide GaxInH AsLyPy Gallium indium arsenic phosphide MicroElectroMechanical Systems MEMS W39RlGHT S39i iiifi Elemental semiconductors column IV Crystal Structure Ex Si E SiO2 very stable oxide hydrophobic moderate ni Ge E oxides are soluable to H20 large leakage currents as Temp T Compound Semiconductors column IllV llVl etc Ex GaAs E no stable oxide but direct bandgap Applications microwave and photonic devices Crystal Structure Arrangement of atoms that define a particular material 3 Categories Amorphous density varies no unique pattern Crystalline one region defines all regions Polycrystalline sets of crystalline regions with boundaries b Polycrystalline VICFOIZIGCIFOIVIGCHEHICEI DYSIemS IVIIZIVID a Amorphous EE 480680 Summer AUUO VVDU L Starman c Crystalline 10 w Simgle unit cells RM Mk Unit Cell a representative of the entire lattice By repeating unit cell throughout the crystal one can recreate the entire lattice A generalized primitive unit cel Simple exam les of unit cells come from the family 0 14 Bravais lattices Fi ure 23 Three cubiocr stal unit cells a S simple cubic so polonium bc fcc Al Cu Au Pt large number ofelements exhibit this lattice form EEARnann ummsronna Ill II larman 39 39 11 VRIGH l S I39A i l EX Problem 1 Determine of atoms in each cubic structure sc bcc fee 2 Find fraction of filled cell of an fcc EEARnann ummsronna Ill II larman 39 39 12 W39RMH39J S39D 39 E Lattice fcc Ital Diamond Structure bl Figure 24 a Diamond lattice b Zincblende lattice Basis two C atoms at 000 and 141414 associated with each fcc lattice point 8 atoms in conventional unit cell Two interpenetrating fcc sublattice with one sublattice displaced by 1A of the distance along the body diagonal of the cube displacement of a3 4 ELEMENTS WITH THE DIAMOND CRYSTAL EE 480680 Summer 2006 WSU STRUCTURE ELEMENT CUBE SIDE a A diamond 39 57 i 543 Ge 566 aSn grey 649 13 W134 EG HT S39I39A39lquot E Zincblende lattice Bravais lattice fcc Ex cubic zinc sulfide structure Basis Zn 000 amp S 141414 Two interpenetrating fcc lattices One composed entirely of Zn Other of S offset by 1A of a cubic diagonal Most lllV compound semiconductors have zincblende lattice Identical to diamond one fcc from column lll other from V Ex GaAs SOME CONIPOUNDS WITH THE ZINCBLENDE STRUCTURE CRYSTAL a A CRYSTAL a A CRYSTAL a A CuF 39 426 ZnS 541 Ale 613 CuCl 541 ZnSe 567 Ga 545 CuBr 5 69 ZnTe 609 GaAs 565 Cu 604 yCdS 582 GaSb 612 AgI 647 CdTe 648 InP 587 368 485 1138 585 InAs 604 835 507 HgSe 608 InSb 648 BeTe 554 HgTe 643 SiC 435 MnS red 560 AlP 545 MnSc 582 MAS 562 EE summer Zuuu vvuu uLaIIIIaII IVIIUIUI ICULI UIVIUUI Ial Ilbal UyOLUI I I0 IVII IVIU Zinc Blende or Sphalerite Lattice caxis T Simplified Lattice Representation 1 NH NJ STA39JI39 E Epitaxial layer 339 Substrate ab a b The lattice mismatch or misfit is defined as bagtao Aa aa0 a a Could be substrate a or the average a of two or more epitaxialsubstrate layers gmgg n39 am m um um ll 47 4 3M Lust 14 34 l 1 c a lt aO Accommodation of lattice of epitaxial layer with that of substrate for different cases a latticematched growth aa0 b biaxial compressive strain agta0 and c biaxial tensile strain a lt a0 EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 15 Miller lndices iie39iiiuii r 5mg Cubic lattices hkl E crystal plane A convenient method of defining the various planes in a crystal is to use Miller indices These indices are obtained using the following steps 1 Find the intercepts of the plane on the three Cartesian coordinates in terms of the lattice constant 2 Take the reciprocals of these numbers and reduce them to the smallest three integers having the same ratio 3 Enclose the result in parentheses th as the Miller indices for a single plane Used to define planes amp directions in a crystal lattice th plane that intercepts reciprocals of indices lthkgt J to hkl plane hkl specific direction hkl sets of equivalent planes lthkgt sets of equivalent directions lFiqure 25 A 623Crvstal plane EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 16 WRIGHTSTM E Indices Examples 39 7 r l w ll Itzh A Y x 1 1 1 Figure 214 illustrations showing several planes and their Miller indices 1 001 Z u a i I I I I I I Him I I I Fr 1 I I I I l l 3 l H l 5 I i 0 II I 139 r f II u U 1 l x HUD HID Ill Miller indices of some important planes in a cubic crystal EE 480680 Summer 2006 WSU L Starman MicroEIectroMechanical Systems MEMS 17 SemiconductorMEMS Device Fabrication MIMI1391 S39IZ I39l E Fabricated through a series of m repeated steps of Oxidation u 39 u Sin3 Photolithography F Etching Diffusion 39m 39 Evaporation or sputtering Chemical vapor deposition CVD Figure 5 Hate Ion Implantation mus E itax I we p l P type Annealing I Metal Eliride I Channel MOSFET EE 480680 Summer 2006 WSU L Starman MicroEIectroMechanical Systems MEMS 18 crystal Growth Si ViLlGHi SLH39L Crystal Growth A Two Techniques Brldgmaquot Si crysiai growth rrorn tne Meit Czochralski gtBEI n 5i erystais gruvvn wttn Czuchraiski 3 gtF39ure renn er sand Sic 7 e uanZitE SICSSZOZS gt SzsSzOgCOg gtResuits in metaiiurgicai grade 5r 7 98 pure gt5t puiverized amptreated wttn HCi te furmtrichiumsiiane amt SIS 3HClg gt SIHCI3 g H2 g gtTrichiumsiiane iiquid at RT Framenai distiiiatiun er iiquid remuves unwanted impurities gtPunrtee Sit tots used in hydrugen reductiun te prepare tne ei Ctrunicrgrade 5i SiHC13g H2 g gt Siv 3HC1 g gtPure E68 7 impurity concentrations ii i pansBiiiion FFAWFH ttmmv Win Hi tvmn 19 Bridgman Technigue WRIGHT mu Stud LTdeI GaAs meii Zunr 1 Zone ilnii i000 Him Gm Dimitmt ni itmivtt Iranl gt FFAnnn Wynn nr Mnquot Zn Basic Crystal Growth Technigue w Crucible heated by RF in u ion or thermal resistance Melting pt 1412 deg C Crucible rotates Prevents formation of local s i Amt l uml unruly ium l mm quotWm wumm SMWM hotcold region Argon back lled Seed crystal used to initiate the growth ofthe ingot with correct crystal orientation Pulled until Si in crucible depleted 5m lmklur V Svul m mmy mme Valw mum mil A r mun slmll FFAHFH ummvnnn lll WM 21 Czochralski Technigue Pull rate few mmmin ex 2mmmin 47 in in 1hr Magnetic eld used for large ingots to control concentration of defects impurities nd oxygen content Crystal diameter controlled by thermal input amp pull rate EGS also produced by the pyrolysis of silane CVD reactor at SOODC lower cost amp less toxic byproducts SiH4 gheat gt Sis 2H2g Figuvel l Czuc ralski crystal puller cvv cluckwise ccvv cuunter cluckwise FFAHFH ummvnnn lll trmn M m ZZ D stribution of Dogant VlLlGHl S39lAl L For Si most common dopants Boron pty e Phosphorous ntype As crystal is pulled from melt dopant concentration in solid is usually different than the melt at the interface Ratio of quot 39 quot quot 39 39 coef cient o g 4 where Cs and Ci are concentrations of solute by weight in solid d q and liqui TABLE I Ellulllbnum Segregation Coaliloloms Iar anmus in si Dulmlll L lini noniiil It 39l ipi ll x in i l wllxlil ii ZXIHquot sli l iXlU39 ii is x IUquot y 1 ll x loquot ii lxlltl i 1 liixlii ii 23 ll tii lilxlil it Txlll ii ii 3 in l 33 ii nitii liiioiiiiiiiiinii lml FFAllnll iimmr nnn ill tvmn z Float Zone Process lll WRIGHT mu loeal forcrystal purl catlol l Hign purlty cast polyslllcon rod As e ew crnl5heatedby RF neater Floatan Zone traverses rod 7 rnolten si is held in place by surrace tension o contarnination rrorn crucb a oi miliiiiii illiiit iii W l 5 mm mm 5 5mm Flgure in a Relatlve impurity concentration versus ii i iiuiiii iaiiuiiiu i tnennte tne zone lersl gth pm w n iimmr nns ii i Hm n MlcluEleclmMechanlcalSy ernsMEMs 24 Material Characterization Wafer sha in Remove seed with diamond saw Grind exterior surface to establish desired diameter Grind ats along ingot Planes crystal orientation and doping type Primary at used as mechanical locator for subsequent processing steps Secondary ats identify orientation amp conductivity type Slice wafer with diamond saw Surface orientation lt111gt amp lt100gt common for Si Thickness 05 to 07 mm Taper thickness variations across wafer Bow curvature variation from center to edge Mechanical lappingpolishing Polish one or both sides of wafer Lapped using mixture ofAIZO3 amp glycerine Flatness uniformity within 2 pm FFA Wu H WM Win Hi lvmn rfoer Identification Figure in 13 ldent llwilmw flats an a semicundumurvvafer mm x Slivmhuwmn lm m Wmumsnm Wm l l39 i r FFA w H mm mm m N L Crystal Characte ation Real crystals are not perfect they have defects two types Loca 39zed D 39 t quot W foreign 39 39 either a substitutional site or an interstitial site Missing atoms host atoms Frenkel defect host atom is situated between regular lattice sites amp adjacent to a vacancy onLoc Ii 2 2 d Ine an extra or incomplete plane results in an edge dislocation a Twinning change in the crystal orientation across a plane Grain boundary transition region between singlecrystal regions within a polycrystalline material Volume impurities or dopants migrate to form a speci c high concentration region Precipitates of impurities cause dislocations because of atom size mismatch Some defects can be removed by high temperature anneals FFA m n iimw nnn iii Hm n Cystal Defects Walth Fm 39 J P 0 00 0 0000000 Oi 0L iUCiLu xO we 4 i id ilil Figure in 16 ai Eugc and o screw dislucatlun rciimaiicin in cubic crystals in 0000000 0000000 0000030 0 quotf i 0 0 0 0 O 0 0 O 0 90 U 0 0 000 000 0 00000 0000000 0 0 O 0 C o quoti 0000000 M ii Figuvel l Puinldelecls 55ubsliluliunalirnpuvily b imcisiiiiai lmpullly c Lanicc vacancy a7 ricnkciiypc cciccis a sciiiiimmiiiic 7 my siiamalagtiiumm a innminimum FFAHnn iimwnnn iii tvmn 28 Film Formation Fil lerrzd Romance healei h Ceramic L39UllllJ J suman Siliirun wale 0201 if 20 i D To vent camquot lt7 End cap quartz gas hum Llll tll ll Fund quam lm llil39l lnlw mm m boat mi mum u cm mm 4 I Exhaust N Example LEDVCSEL FFAnnn Hmmv lll lvmn 29 WP llTsT Em Substrate wafer acts as the seed crystal The regular oriented growth ofa single crystal layer s with controlled thickness and doping over a similar single crystal called the substrate Originally used to make high quality materials with characteristics superior to those of substrates Today epitaxial techniques are used for the synthesis of ultra thin layers monolayers precise doping pro les or uniformity and variable material compositions in addition to low defect density material nhances performance of devices and opens up many new possibilities Epitaxy processes occur at temps 3050 lower than the melting pt Types of epitaxial processes Vapor r quotP MOVPE Liquid phase epitaxy LPE rarely used Molecular beam epitaxy MBE MOMBE gas source MBE GSMBE atomic layer epitaxy ALE FFAHFH ummvnnn lll WM 1 I avorr r 1 Vapor Phase Epitaxy VPE Also called CVD chemicalvapor deposition Ep39 growth by vapor transport of reactants Precursors are mixed with a carrier gas ie H2 which dilutes the mixer The gas with its proportionate constituents flows over or toward a heated substrate Some of the precursors are cracked into atommolecule fragments while diffusing toward substrate surface 2 935 At the surface the atoms move to an appropriate lattice site and incorporate else they recombine with other fragments Stagnant boundary layers form above the substrate from which reactant atomsmolecules diffuse to the substrate surface FFAHFH ummvnnn ill WM 31 VPE Ad vantagesDisadvantag es Advantages Low temperature process High purity low defect density material Readily automated for mass production Ability to grow thin layers with precise composition dopin density thickness 0 on an atomic scale for advanced systems Well suited to research has opened new physics Disadvantages Toxic gases are used must have gas monitors and stainless steel plumbing The exhaust pump system includes a scrubber quot L 39 quot toxicendr 39 39 39 burn the gases Research systems are expensive as are many of the precursors purchased as pressurized gases in cylinders or as bubbler s VPE works well with Si and GaAs usually not used and related elemental and compound semiconductors FFAHFH ummvnnn ill WM 32 M WRIGHT STA17E 39 Four Silicon sources precursors SIC4 Silicon tetrachloride most studied SinCl2 dichlorosilane SiHCl3 trichlorosilane Sz39H4 silane I III OI Iii I Ilt1 Typical reaction temp is 1200 C y r Iainu l l quot i J IIOII IIOEI Smartpm N N HH 171nm H Still ll Overall reaction a SiCI4 gas 2H2 gas D Sis01ia 4HCIgas mum SiCI4 gas Si solid D 2SiCI2 gas 39 I Wm j g quot Ruth Lm m V I l Reversible reaction deposit or etch J quot quot quot Q lll OIIO39gIIIL g l quot quot 3 ICU O IOIII g lquot l I old 0 o 439 II R I Figure 1020 Three common susceptors for chemical vapor in uo j J disposition a horizontal b pancake and 0 barrel susceptor T quotHr EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical S lhl 1 MBE Thickness Uniformitv WRIGHT STEVIE THICKNESS UNIFORMITY IO I III IOS WOS HO I 100 ioz ios i04104 I98 25 mu wu 1m Int 100 92969697 94 919139 37 37 a WITHOUT ROTATION 39 b WITH ROTATION FIGURE 4 Measurement of the Si layer deposition uniformity across a 3in substrate with and without rotation after Ref 18 EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems M EMS 34 17 Defects in Epitaxial Layers Homoepitaxial growth r ra r uu Hat 7 semiconductor layerand substrate are the same rhatehai 7 same lattice constant e lattice matched epitaxial process heteroeortaxye epi layer and substrate are two different rhatehais e Eoriayer Spacing 7 Cases referred to as e latticerrnatched epitaxy e strainedrlayer epitaxy rm II Schematic illustration of a lattice matched o strained aho related R hum lim heteroepitaxial structures W Homoepitaxy WZRM is structurally identical to the lattice quot 39 a ched heteroepitaxy 2 FFA W h Hmmv m H l Hm n MrcruEiectmi m y llrl WRIGHT mi E itax Defects Strained La er E itax Defects degrade device properties reduced mobilities increased leakage currents l Defect categories 1 defects 39om substrates may propagate from substrate into epi layer must begin with defect 39ee substrates 2 defects 39om interface oxide precipitates or contamination can cause misoriented clusters or stacking faults thoroughly clean or reversible etch 3 precipitates or dislocation loops due to supersaturation of impurities or dopants 4 Edge dislocations formed in the heteroepitaxy oftwo latticemismatched semiconductors l l Figure in 27 llluslraliun eithe elements and lurmaliun er a strainedrlayer superlamce W Anuws shuwlhe direcliun er the shah EMS 35 FFAWFH hmmrhhn lll trmh O a on ampFilm Ders on filmsusedfor u lid 1 current conduction orisolation lC fabrication requires manytypea of films 7 Thermal oxidesr highest quality 7 Dielectriclayersrlowerquality r Polycrystalline mms M tal flims Wm M L wi l m MW ii i rm FFAHnn Hmmv m fvmn 37 wamm ml 0 a n 8 De OS on Thermal oxides r gate oxide establish the source to drain conducting channel 7 h s amorp ous 02 crystal 7 D oxidation resuits in a slower rcWIh rate but higher density amp smaller defect repainte ace states denSlty S b2 a e51 quailty Fleid oxide 7 lSOiaUOn of lllllldl oxides W 7 Maskfordlffuslonlmpiams r urface passwauon CVD Dielectric layers 7 deposited 5 02 and SW4 7 USedfOr insuiauon between conductor as an ion lmpiantatlon mask oras as Nation layer5 Polycrystalline smcon Poly w Metal flims 7 Al suicide Au for low resistance interconnectsbonding pads General requirements be de nable by litho raphy and etching Perform function quot quotquot anu ylly Emmy below and any surface applied above FFAHnn Hmmv m fvmn 38 Growth Mechanism and Kinetics Dry W si solid 02 gas a sio2 etstearn W si solid 2H20 gas a sio2 solid 2H gas ln orderforthe Odelle lg species to reach the sisio2 lrlterface and grow the owde solid thel li u expands upward during growth relatwe to the original siairposition n W ori in ii at consurnes a layerof silicon 044xthlcllt in mi X anlf Ill in i air tmii r miiii uiiim rmiiii iii iii iiii ull magnumquot tiliii ii iiirauiiii riiuil iiii ii i Figure ll 3 Growth ulsilicun dluxldE bylhelmal uxldallun him igu 2 ll Schemallc cluss secllun ula resistance deallunlumaca healedu FFA w n iimmi nnn ll l Hm n MlcluEleclluMechanlcalSystemsWEMS 39 raisingii Simple modelgrowth model of one mole Molecular weight of SiDensity of Si 4 SI M w T 233gcm3 Molecular weight of SiOleensity of Slo2 a Sta2 2113ch male 21gcm 1206cm3 male Thlckrless otSi x Arearihickness 0f SlOZX Area Volume 0M rnol ofSlvolurne 0M rnol otSio2 VolSi 7 1206cm3mole e 3 044 V0SIOZ 2718cm mole Equation Format NAX FLA1X M E Density ofsilicon A ea X thickness of silicon consumed N 7 Density ofthe oxide X 7 thickness of the oxide layer Utility 7 thin oxlde5S1000 Ang use dry process pertorrn electrical dewce tunction 5 oxldes a 5000 Ang use wet process 7 faster growth lower quality used for isolation FFA nm n iimmr nns lll iimn Oxidation W141 lG HT S39ll39A39i E Under a given oxidation condition oxide thickness grown on a 111substrate is larger than that grown on a 1 OO substrate Why Because of the larger linear rate constant of the 111orientation Note For a given temperature and time oxide film obtained using wet oxidation is about 510 times thicker than dry oxidation Figure 118 Experimental results of silicon dioxide thickness as a function of reaction time and temperature for two substrate orientations a Grow h in dry oxygen b Growth in steam3 EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Sy llliir39kfilt uquot Egllni quot311 I in lelrh39 ihlr k I m1091 pint H I39l l I 11110 V I n I I HH chm lll ll quot IHIICI l l r a a 14 r mt 3111C 01M Iiquot 1 l I Ml I l DxldaruJri Inn hr in ll39l 39n39i v Ilil1 liilll 1 I H l I l lll llll 0 I 0 l0 lIflIl Drldamm lll39IiIZ lhrl llil FREQ11391quot 5 1393 1391 E 200 E 3 on I i quot 2 M I v quot a X o 0 900 C 111 s a 1 H 005 o 100 s 0 7 521 O l I I l l 0 31 02 05 10 20 50 100 OXIDATION TIME h Oxide thickness vs oxida ion time for Si in H20 at 640 Torr 01 100 10 Crystal Orientation Wet Oxidation 5 atm l Pressure 20 atm 10 atm Substrate lt100gt 310 ohmcm Oxidation duration 60 min I l 800 900 1000 Oxidation temperature C Wet oxide growth at increased pressures EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 42 21 r OXIde Growth vs Temp amp Pressure MIGHT S I39A I E 40 7 I m I T DK DRY 0 900 C WHO 393 05 ATM 05 01095I m BED 39G 01 ATM 300 1030 0 01 ATM a I E 395 I 530 0101 ATM 3 03 39 In 39 In ran 0 239 g E 200 I I 1030 3912 CLUE ATM I e 395 a S 10039 1030 390 001 ATM l in 7 I 4 I quotI 4e 7 I 01 39 l 1 L 39 D 20 50 EU 02 05 10 20 50 10 20 WMT39Dquot quot5 W OXIDATION TIME I hr Onion thlckms versus time for dry oxldatlon 1 EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 43 ImpurItv Effects 10 WI39FMGIi39i STM39E 8 I e 5 06 D 8 z 04 a 9 Ptype 5 Oxidation of Bdoped Si in wet 3923 02 ca 25 x 102 cm 3 oxygen 95 C H2O as a function 6 A ca 10 x 102 ch3 of temperature and concentration 39 CB 10 X 1 16 cmquot 0 1 I I J I I l I I I J I l i 3901 02 04 06 08 10 20 30 10 OXIDATION TIME quot1 i39quot 03 g 05 039 g z 04 Ntype E Oxidation of Pdoped Si in wet I 02 CB 5 x meow3 oxygen 95 C H2O as a function g on 37 x 1019 cm393 of temperature and concentratIon Zn40 x 10 6 cm393 0 1 I I I I I I I I I I I quot01 02 04 06 08 10 20 30 OXIPATLQIE h IVIIcrolzlectroMechanical Systems MEMS 44 22 Masking Properties of SiO2 Wltl Iil STATE 10 l I llll1 l I IIIIIII I I lllIll Boron Phosphorus llilll Mask impurities during high temp diffusion Deep diffusions can take place in unprotected regions of Si whereas no significant impurity penetration will occur in regions covered by SiO2 Arsenic amp antimony diffuse slower than P Masking thicknesses of 0510 um are typical in 0391 IC processes 1 Failure if 10 impurity fraction under mask as compared to background conc in the Si Silicon nitride used to 00101 mask Ga Diffusion time hr Thickness of SiO2 needed to mask B amp P diffusions as a function of diffusion time an temperature EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 45 Mask thickness um Selective Oxidation WR iG HT 514139 E 39 Si3N4 pad Si3N4 Silicon wafer 1 Silicon wafer l Silicon etch Oxidation L j Silicon wafer I Oxidation mm s o Bird39s beak Bird sbeak 1 2 I Nitride removal Nitride lremoval a b FIGURE 312 Cross section depicting process sequence for local oxidation of silicon LOCOS a semirecessed and b fully recessed structures Silicon nitride used as oxidation barrier Thin layer of SiO2 oxide 1020 nm 1St grown to protect Si surface SiN deposited over surface amp patterned using photolithography Oxidized grows where not protected by SiN semirecessed oxide structure most common Oxide growth occurs under edges causing nitride to bend up bird s beak lose geometry control in VLSI structures must be minimized Fully recessed oxide formed by etching the Si prior to oxidation planar following SiN removal however subsequent processing reduces these advantages EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 46 Dielectric amp Polysilicon Deposition Wdely used in modern VLSI circuits Provide conducting regions electrical insulation between metals environmental protection Require uniform thickness amp reproducible Most widely used material for lm deposition excluding metals Polycrystalline silicon typically dope heavily n or ptype Silicon dioxide Stoichiometric silicon nitride SiGNA Plasma deposited silicon nitride Common deposition methods Chemical vapor deposition CVD Low pressure chemical vapor deposition LPCVD Plasma enhanced chemical vapor deposition PECVD FFAHFH ummvnnn lll nmn Pol c stalline Si Pol or ol silicon I Pyrolize silane SiHo at 575650 C break apart silane Conducting lines for multilevel metallization Contact for shallowjunctions Usually deposited without dopants but not always Dopants As P B reduce p resistivity added by diffusion or ion implantation p on diox e CVD lms Dielectric Insul or between conducting lms Masks for diffusion and ion implantation Diffusion source om d ped oxides ng doped lmsSi prevent dopant loss Gettering impurities process which removes harmful impurities or defects Phosphorousdoped SiO2 Pglass used as doping source ie phosphosilicate glass or PSG Inhibits diffusion ofNa softens amp ows at 95011OODC creating a smooth topography agood for subsequent metal enhances hydrophoblclty quot 39 D quot Wafer ulIaLe like PR FFAHFH ummvnnn lll nmn Silicon Nitride Nearly impervious to moisture Si3N4 deposited at 700900 C is used as an oxidation mask Plasma deposited silicon nitride SiNH forms at 200350 C used for passivation The low T allows for deposition over Au or Al CVD Technigues most o en used for deposition Temp range 1001000 C Pressure range 005 Torr 760 Torr 1 atm Reaction energy a supplied by photons glow discharge thermal Poly amp dielectric lms have historically been deposited at 1 atm in a variety of reactor geometries Wafers are placed on susceptors heated by radiation using high intensity lamps RF induct39 ance Ion or electrical resist Horizontal reactors ow gas across the hot wafers o en at high velocity Vertical reactors o en consist of a bell jar chamber with samples on a rotating assemble perpendicular to gas ow FFAHFH ummvnnn lll nmn Plasma CVD Plasma CVD Cylindrical reaction chamber made ofquartz or stainless steel with aview ort Capacitor parallel plate electrodes made of Al Samples ay on the bottom Al capacitor plate or on a quartz plate placed on the Al System is heated resistiver 1004OODC The source gas ows radially throughout the reaction chamber Used for SiO2 amp Si3N4 Advantages Low temperatures Fast easy Disadvantages imited capacity Manual loadunload gas purge etc Wafer contamination FFAHFH ummvnnn lll nmn Fl iquotitiir lull39llil l quot SEX JTE Hrsimr 1 I If f I tillis ii 33000 furnace m I l Considerations in selecting a deposition I I I I I I I I I I I If PM process n 39 I I39 h Substrate temperature I I l 1 Usquot DepOSItion rate 39I h 53quot Film uniformity Llquot 7L rliiur inliI Morphology a Electrical properties insultith RF illIIl 39Iih nhl Chemical composition of dielectric 39 39 ti 339quot l Elm I if if i39fi lii39iii lisr I ms Plasma f3 Iii Allii39iiiinuiii I I lilt i I39i ia liquot395 l I l l I Grit F39U39Tll l if Figure 119 Schematic diagrams of chemicalvapor m i m39I P I deposition reactors a Hotwall reducedpressure H l quot reactor b Parallelplate plasma deposition reactor4 rf 53mph radio frequency l mll39lf39r hi EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 51 gt Silicon Di0Xide tttiticii i STATE TABLE 1 Properties of SiOz Films Property Thermally grown SiH4 02 TEOS SiC12H2 N20 at 1000 C at 450 C at 700 C at 900 C Composition SiO2 SiO2 H SiO2 Si02Cl ensi cm3 22 21 22 22 Depos39tlon methOdS Eefragi finde 146 144 146 146 For lowtemp depOSItion 30050000 Difllggtgmeng l gt10 8 10 10 Etch rate A min 4500C 1001 H20HF 30 60 30 30 SZH4 02 SI 02 2H2 Etch rate A min 0 C buffered HF 440 1200 450 450 4P H 3 502 450 2205 6 H 2 Step coverage Nonconformal Conformal Conformal For intermediatetemp deposition 5008000C SiOC2H5 4 Lac S102 by products Tetraethylorthosilicate TEOS Suitable for Polysilicon gates requiring a uniform insulating layer with good step coverage For Hightemp deposition 900 C 5111sz 2N20 L06quot 5102 2N2 2HCZ Deposition gives excellent film uniformity amp sometimes used to deposit insulating layers over polysilicon NOTE CVD SiO2 does not replace thermally grown oxides as best electrical properties are obtained from thermally grown films EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 52 26 Polysilicon Deposmon Pyrolyze silane at 575650 C in a low pressure reactor 39 SH 2H Two common low pressure deposition recipes 100 silane at 25130 Pa 0210 Torr 2030 silane in N2 at 25130 Pa Deposition rates are 1020 nmlmin Deposition ofpolysilicon depends on temp pressure silane concentration and nt concentration Polysilicon may be oxidized Usually done in dry 02 T9001000 C Polysilicon properties Density 23 cm Coef cient ofthermal expansion a 2E6 C Temp coef cient ofresistance k 1E 3 C Addition of oxygen to poysiicon increases the film resistivity 2 51H4 xNZO gt 10K 2H2 xN2 FFAWFH iimminnn lll iimn SteQ Coverage Him Conformal Uniformity of the film thickness regardless of topography is due to the rapid migration ofreactants alter adsorption on the step surfaces Nonconformal step coverage 0 g 5 180 Top surface reactants corne from many different angies quotquot 0 g 62 g 90quot Reactants ar vl g at tne top ofvertical Wall 1 W 93 2 tan 7 Related to Widtn ofopening and distance from top Film thickness on the top surface is double that ofa wall sur ce This type of step coverage is thin along the vertical walls with a possible crack at the bottom of step caused by self shadowin lhl Figure ii i2 Step cuverage uf deppsited fiirns a Cunfurmal step tqung b Nuncunfurmal step cuverage Most evaporated or sputtered materials have a nonconformal step coverag FFAWFH iimminnn lll iimn 54 Silicon Nitride cvo WRIGHT 512m 7007800 C1At 3SZH4 4NH3 mgtSlsN4 12H2 Sllane ammonia 7007800 ClAtm 3S239CZZH2 4NH3 gtSz393N4 6HCZ 6H2 dichlorosilane ammonia Properties of silicon nitride Deposition LPCYD Good film uniformity and high wafer tun Sim throughput S V H 1 J i Refractive Index a related to composition M lt i is 70 l n mlquot to Sac W I lCri T 09 await m EE 480680 Summer2006WSU L Slarman 39 39 yslems MEMS 55 SiN Plasma CVD WRIGHT STA l39E SiaN4 High tensile stress 1E10 dynecm2 1 Pa1Nm21E5 bar 10 dynecm2 7501 E3 torr Films d gt 200 nm sometimes crack due to the high stress SiN Plasma CVD usually radial flow parallel plate hot wall reactor SiH4 NH3 gt SiNH3HZ Argon plasma ZSiH4 NZ gt ZSiNH 3HZ Reduce silane in a nitrogen discharge The products depend strongly on the deposition conditions Plasma deposited films contain large H concentrations Other materials Silicon ogtltynitride SiON A ogtltide Al nitride Ti ogtltide high p a Polyimides spin and cure BOO350 C a planar surfaces poorthermal stability and moisture protection EE 480680 Summer2006WSU L Slarman 39 39 yslems MEMS 56 Deposition Comparisons RIGHT STATE Comparison of different deposition methods In Medium ummphcric leniperulurc lumpuralnrn kuu pressure CVD LP39I LPCVU 4 VI Tcmpdmt urc 10C PHD r Sill 310 5 U gt JUU lll ll WM Munml SiOg six Mm SK 3 911 l Uses P1xltilliun inmluion 391 hruughpul High Step cm39 Pwvr l drhulci Fm rum pmpcrliux Um Lmv lcmpcmmre ch Ya EE 480680 Summer 2006 WSU L Siarman 39 39 iems MEMS 57 wmcH r S l39ATl M etal I Izatl on Desired properties of the metallization for le MEMS amp microelectronics Low resistivity Easy to form Easy to etch for pattern generation Should be stable in oxidizing ambients Mechanical stability good adherence low stress Surface smoothness Stability throughout processing including high temp sinter dry or wet oxidation gettering phosphorus glass or any other material passivation metallization No reaction with final metal aluminum Should not contaminate devices wafers or working apparatus Good device characteristics and lifetimes For window contacts low contact resistance minimal junction penetration low electromigration Silicide interface formed between Si amp metal EE 480680 Summer 2006 WSU L Siarman 39 39 iems MEMS 58 29 W39Rlij HT S l 39l E Most common methods Physical Vapor Deposition Evaporation source material heated above melting point in evacuated chamber evaporated atoms travel at high velocity in straight line trajectories Heated by resistive RF or focus electron beam Ebeam evaporation Plasma spray deposition Sputtering a source of ions is accelerated toward the target and impinged on its surface Ti Al Cu TiN Au can be deposited this way a 1 at l39 H H If Anode a H i hit I39 i i E i 4 ltaii imami 73 iii illTl Figure 1118 a Standard sputtering b longthrough sputtering and c sputtering with a collimator EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS Vacuum chamber l Pl Cathode shield Cathode target Wafers g g W High voltage 1336 To vacuum pump A DC sputtering system 5 9 Within STATE Metal Deposition CVD metallization offers Conformal coating Good step coverage Coat a large of wafers simultaneously Basic CVD setup is the same as the deposition of 5393 JFCCE DMD GRAIN I 2quot l H Ti ti39i I39 7 gt w h u A schematic drawing of a multilevel metallization structure Four types of CVD systems a APCVD b hotwall LPCVD using three zone furnace tube c Parallelpolate plasmaenhanced d PECVD EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS Wafers N2 Gas N2 i i i Iii lllllll Li 1 Conveyor Exhaust belt a Pressure sensor Wafers Wilmazone furnace gt Pump WM Load Gas Quartz door inlet tube b Insulated RF input 39 Wafers Glass cylinder Aluminum electrodes Heated Gas sample Pump Gas inlet holder inlet Plasma 0 Pressure Graphite sensor electrodes 30 CVD of Metals WRIGHT S l 39l39h Process by which a metal film is deposited by a chemical reaction or pyrolytic decomposition in the gas phase in the neighborhood of the substrate Advantages Conformal metal films good step coverage Large of wafersrun Lower resistivity than with physical evaporation Refractory metals Useful for depositing heavy metals ie W Chemistry Tungsten W l WF6 wry 3F2 WF6 3H2 WW 6HF HF very toxic will eat your car s windows Other metals Mo Ta Ti can be deposited by hydrogen reduction in an LPCVD reactor 2MC15 5H2 W Wgt 2M 10ch Al deposition using an M0 source triisobutyl aluminum M0 metalorganic 2CH3 ZCHCHZLAI gt 2A1 3H2 by products EE 480680 Summer2006WSU L Slarman MEMS 61 De osition b Eva oration I i rm 1 bay5 39 r U i N li r t y Evaporation F39mmr Thermal resistive heating pm pm I L Electron beam ebeam de ecting math Potential disadvantages Source filamentcrucible contamination Aquot WWWquot me 539quot9 e39e quot quot39beam hemmg39 The beam is generated out ofthe line of sight ofthe onIZIng xrays penetrate substrate source and is focused into it by a B eld A heated lament supplies electrons and the accelerating electrodes form them into a beam 39 MEMS damage lattice EE 480630 Summer2006WSU L Slarman 31 Factors governing step coverage in evaporation WRJG HT S39lel E a Perpendicular step on 7 perpendicular substrate No coverage b Rotating planetaries with some substrate inclination Improved 7 coverage quot I l c Same con guration with substrate I I 39 LIL 39 V8 4 heating Furtherimprovement quot 7g J d Reduced slope of step plus rotation and heating No thinning over step II EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 63 WIGHT STATE S 100 I I I Sputter depositions has a threshold energy this energy E 10 of bombarding ions must be E exceeded before sputtering g 1 begins g I Thresholds 1 10erorAl a 10 15 eV for Pd g a 10 2 21 eV for Mo 0 34 eV for Pt 3 r Normalized ion energy sputter yield atoms liberated from target 2 7 of incident ions Typically want operation with sputter yield 2 10 J N E flux or of atoms per unit area per unit time leaving the target N Z7 J E current density of the bombarding ion q Z E of charges per ion EE 480680 Summer 2006 WSU L Starman MicroElectroMechanical Systems MEMS 64 32 mg m Lithograghy Transfergeomemc patterns on a mask to a th ayerof radtatton sensmve matenat caHed restst covermg tne surface ofa semtconductorwafer as above OpttcaHtthography r m e Etectron beamhthography e erayhthography 7 ton Beam tthography OpttcaHtthography uttrawotetradtatton e 7t02t00 e reststdphotorestst Expusure Tum perrprmanee 3 parameters Resututmn e mtntmum feature mmenspn tnat can be transferred thn ntgnneetttytp a rests m Regtstrattun 7 measure at new accuratety patterns un uncesstve mask can be ahgned Thmughgutm numberuf vvafersthat can be Expused per npurrpr a gtven mask tevet i FFAWFH nmmrnnn ttt trmn 65 WRIGHT mu m M m a FF A w n nmm v r n rm WRIGH l S Il I Exposure Methods A r N g a 2 FZ OZEITtw Ami CA un uquot mnuui p m lmim lc mum mm zl1m m m lqurs JICunIJJKPm ng m arm mafcr 1 rv Proximity shadow printing method used to minimize mask damage 39 39mu inewidth or critical dimension aCD1m m Mg 9 gap between maskwafer amp includes resist thickness EE ABEBED Summer ZEIEIE WSU L Starman 67 Wkkiln S I M 1 Exposure Methods l nmmm 7 L ml in Schemath or optlcal shadow p 3 lb nntlng remmquesi a roxlmlty prlntlng Con act pm 9 In physical contact Jr39 Approximately 1 pm resolution quot Major drawback dust particlesSi dust M m Can be Imbedded in mask Permanently damaged Image parimonlng technlques for projectlon prlrmng a Proximi in n annual eld wafer sc 11 51 ep andrepeat 4 M1 small gap a 1050 pm reduction stepandrepeat and d M1 reduc ion stepand Gap results in optical dif 39action scarquot Approximately 25 pm resolution EE ABEBED Summer ZEIEIE WSU L Starman 34 Pro39ection Printing o Avoids the mask damage problem of shadow amp contact printing Projects image of the mask pattern onto resistcoated wafer Many centimeters between mask amp wafer To increase resolution only small portion ofmask exposed at atime Image scanned or stepped across entire wafer Resolution ofprojection system 1 007 pm can be calculated by m k 2 9t exposure wavelength NA k1 process dependent factor NA numerical aperture NA 75in t9 3 Where 7 ll39ldex of refractlorl in tne image medium usually ain Where 7 1 6 Degrees of Freedom DOF DOF Mm 1 k2 42 4 tan a sin 6 NA k process dependent factor Franan iimminnn lll iimn Lithography Masks K I 2 Figuie l2 7 An lntEgiatEdrclicun phutumask Mask plates 7 increasmg cost amp performance 39 LOW COS glass remulslorl 7 100 5e 39 Qua emulslorl chrome ll Ol l oxlde several thousand forse Sapphll e e l0 s oi tnousand 7 Chrome m in i W in lll iimn wuicii i S39iAiL Exposure DefectsY eld Patterns on a mask represent one level of a design K Typically 4 Standard size mask 15 x 15 cm 0 cm Ic Defect density mask defects Introduced during the manufacture ofthe mask During subsequent litho processes de Ined as the ratio of good chipswafer to the total 1 of chipswafer as d ough n quot S a a thr l I inspection quot Cleanin of masks uitraclean processing area Y N 6 average er tatai dEfE Sunit area A area et an it chip it D remaihsthe same ter aii mask ieveis N rNDA Ye Nufieve 5 2 m m 5 Figure i2 8 Yieid rer a iEIernask iithugraphi h an in h w m m iiii iih rm zui FFAWFH iimmi hhn iii iimh MicmEiEcthE tiiihiir rm mE Clean Room integrated circuit tabrication requires a cieah processing room Dust and other particuiates cah settie ch masks ahdih device iayers causes detects amp circuittaiiure Ciass too amp beicrw Workers Wear body suits amp headgearw respirator Figure izi Vaviuusways ihwhich dust pamcies can ihteheie wnh phuiumask patterns Figure i2 2 Particiesize dis mbutiun curve rerEhgiish m and metric 7 eiasses er eieahreems 0 Fri hrs h iimmr ms iii tvmn Itiiiii ii iv iuiiii vv iuiii 5 1ii Clean Room Reguirements Ratings by Class of Effectiveness of Filmalien in Clcnn Rooms Number or 0 51mquot particles Number of Sum pm Clan per ri im i per 11 nr i 0X0 10000 350000 75 rumor 1000 1000 35000 6 5 230m 100 100 u w r 10 m 391 is Very difficuli 0 measure particulate mums below to per fr 5 35x a if moo ssno i 00 v 3500i 39L Temp and humidity must be tightly controlled ousr mum or cnpinnwv now m x devices are reduced to the deep submicron Am L RGEH mm 5mm pnmicu 5IZE mm nnmtcLEscualc root mimic ME rm mm to range 9 ost IC fab rooms require at least a Class 3 10 V 100 cleanroom 150 4 a ie dust count 4 orders of magnitude lower 5 93quot than ordinary room air A quotwe In litho area a class 10 or lower is necessary 3quot ca 0 m 13 um 4 as i o no auriCLE 2 pr1 EE 430680 Summer 2006 wsu L Slarman 39 a mm i7 quot quot 1quot39 quot quot39 73 AFIT Cleanroom EE 480680 Summer 2006 WSUL Slarman 39 39 ms MEMS 74 37 Ph oto resist Radiation sensitiye compound Ciassified as either positiye or negatiye I 39ve 7 Patterns formed images are the sarne as those of the mask Negative 7 Exposed regions iess soiuoie Patterns formed are the reyerse otthe mask patterns Positiye photoresists made up otthree components 7 Photosensitiye compound 7 prior to exposure insoiuoie in oeyeiopersoiution After exposure aosoros radiation amp changes ohernioai structure and become soiuoie amp rernoyaoie during oeyeioprnent 7 Base resin 7 Organiosoiyente keeps the resist a uidiiquid forease ofappiicatiori e Aterexposure absorbs the optioai energyano oonyerts it into ohernioai energy to initiate a poiymeriinking reaction 7 Causes crossiirikirig of poiyrner rnoieouies which ends up haying a higher rnoieouiar weight and becomes insoiuoie in oeyeiopersoiution u u i Maior u i p i i ii for a i p 10720 mtJcm2 Negative resist soiyents are usuaiiy mixtures othyorooaroons FFA W n iimmi mm H i Hm n 75 1 Photoresist m 5quot 7 mm Positive resist rmiiimii n VEWfTTW mii 50 quotm L n r a it 1 Expuer ginrs iniirml EY eerrespengste the sensitiyity E is the energy ubtained by gravying the tangent at Etei reaeh munn resist thickness Sensitiyity is defined as the energy required to soiuoiiity in the exposed region A iargery irnpiies a higher quotV quotquot soiuoiiity of the resist With an i i i i i i i i i i i i inorernentai increase of exposure energy amp resuits in M sharper images a bi Figure i2 9 Expusurerrespunse curve and cross SECUDH or the resist irnage 7 l 4 after deveiupment a Positiye photoresist o negatiye photoresist V F 7 Negative resist FFAHFH iimminnn iii iimn 7o u mu m 39i Imam EE 480680 Summer 2006 vvau L Dldlmal l Exposure vs Developer liqumurc in um um r mma mmluu mum u quot4i stems MEMS 77 VKIGI H 5 ml h l mu Resist Thickness Resist Thickness kP2 Z J where Z resist thickness pm P of solids in the resist viscosity thickness of resist w rotational velocity of the spinner k empirical constant m Typically want 10 15 pm thick m a 9mm m M m m m w m 39 01er 1 mm nl1idwhu1it mwgmu EE 480680 Summer 2006 WSU L Siarman h 8 mm v nil mggum m a 11 hm stems MEMS Rs 39 Wm S lA lk Silicon Wafer Cleaning Procedure 3mm wiirur Cleaning Procedure Generally not performed in this fashion Typical Method W m Acetone spin 30 sec min Organic Innii C 39l39lminalmn M9than Spin 30 sec 1 5quot WOMWL lsopropyl spin 20 sec DI waterspin 20 sec IfSi dip in BOE for 15 l 1 ant hold m 10 n ht suluunn under ninnlng DI uric or 1 min in D i c 5 min C Hydmm Oxidc Rumoml 1 mi 39 5m mluuon of HF D t r Removes native oxides DI rinse for 60 sec i uxcmpc 1 Qupnen mp suluuan un V running D1 vulcl furl min 39 3 quotihh in nmnmg DI Jatcr pr 0 mm Dry W39th N2 EE4 HR H HmmPr Wm H l tarman Pattern Transfer Wkiuiii Sl Al t Cleanroom illuminated with yellow light Why Photoresists are not sensitive to wavelengths i greater than 05 pm Following cleaning and hotplate bake Wafer placed on vacuum spindle Liquid photoresist is applied to center ofwafer Wafe rapidly accelerated up to a constant rotational s ee Maintained at this speed for 30 sec Spin speed generally ranges from WOO10000 rpm to coat uni orml Resist lm thickness about 0510 mm Resist thickness correlated to its viscosity Following spin wafer placed on hotplate for so bake typically 90 180 C for 60120 seconds Bake used to remove solvents amp increase adhesion Align wafer with mask and expose to U Develop resist and presto you have your design pattern lfno you need remedial training and s a over Rinse off developer 60 sec in DI water amp dry with N2 Continue with depositionetch processes Inspect fab process continuously under microscope IOTE each PR will have its own spin speed amp developer I times and settings Figure ii in Details ufthe eptieai lithugraphi pattern transfer preeess EEA nn H HmmPr mm H i tarman MEMS 8O 40 VRlGH l39 S39l39A l39E Liftoff RI E Figure 1211 Li off process for pattern transfer in mm szcer tors EYCH uimr M w v ibl o m i 1 5402 3 mepzssr v z o Manama sinus rm 1 liluyov luslst39 Ed on n ummprmn IQll I larman ii MiaMir 39l39vpical pusrliw mm ncgnlh resist dmiap Qtiu Wm sm h Masking Alignment Factors affecting alignment accuracy a stepandrepeat error linear spacing b stepandrepeat error reticle rotation c Runinmnout of mask relative to substrate d Alignment error translational e Alignment error rotational EE 480680 Summer 2006 I91 I larman 39 41 FF 4 fl 8 fl iimm r2006 WSU L Starman wmnsm Next Generation Litho Methods Optical lithography widely used due to High throughput Good resolution Low cost Ease in operation However limited in deepsubmicron IC processes Need postoptical lithography to process deepsubmicron or even nanometer le Harms ELECTE JNS New techniques Electron beam Primarily used to make photomasks Xray candidate to replace optical lithography can be used for the fabrication of lC s at 100 nm Ion Beam can achieve the highest resolution used to repair the m masks for optical lithography W55 7 Wm navam quotwas Wm M r i l ueamlilhogr phy xmylilhogvavhy dlun beamlifnagmphy x ifquotng lDIElecnnn WRIGH39I39 S ml i Direct patterning on a wafer without I 39 k lt l39iml iin mil Disadvantages Have low throughput 10 wafershr at quotquot quotquot less that 025 pm resolution L alumni Fine formask making LUleixiiiimlxlagu Schematic of an electronbeam machine FFA on n umm FZOOB WSU L Starman 84 Electron Beam Litho ra h Electron gun generates the beam of E 39Lquot quot eleCtrons Mum v Mugumlw Lull Tun sten thermionicemisswn cathode Mam use for electron un Condenser lenses used to focus the rim mmiunw electron beam to a spot size 1025 nm in it lame er Beam bla iiimmmiimm inggfalates turn the electron l k 0 nk beam on and 211d Lumlruwr in Precision mechanical stage used to limilml illl lllllt39 1 mm rmilrii r l position the substrate to be patterned Advantages Permits generation of submicron resist geometries Highly automated Precisely controlled operation Greater depth of focus 42 39 Raster scan WRIGHT S39l39Al39l39 4Mquot TeChm ues Resist patterns are written by a beam that moves through a regular mode vertically oriented Beam scans sequentially over every possible location on the mask and is blanked turned off where no exposure is required Pattern must be subdivided into individual addresses a Pattern must have a W minimum incremental interval evenly divis ble by beam address size a Raster scan writing scheme b vector scan writing schemes and c shapes am roun 39 ol electron be 1 variable cell projection veCtor scan Snme electron resism Beam directed only to the Scncimin mam Rectum reqlleSTed Pattern features mm hilaril t n lumt d Jumps from fe 1 an a ure to feature rather than scanning f the whole chip 5 Average exposed region is only 20 of the chip area M saves time lvlll PMMA polymethyl methacrylage Electron Resist lngtdm39 tn mm lain Important factors in limiting resist resolution 1 Swelling in developerneg resist 2 Electron scattering tlrl Schematic at positive and negative resists used in electronbeam lithography Positive res s Exposure causes chemical bonds to be broken molecular weight is reduced which enhances dissolving in developer solu ion Common positive resists P amp P S polybutene1 sulfone Achieve resolution of01 pm or better Negative resist Causes radiationinduced polymer linking Electron resists are polymers t u a Simulated tralectnries er lDD eiectrens lrl Higher molecular werg PMMAfnr a ZDrkeV electan beam 15 b Dnse utlnn fnrfnrward scattering and cattean at the resistcsubstrate interface C Swells during development resolution limited to 1 pm Mb ommon negative resist polyglycidyl methacrylatecoethyl acrylate backs OP EE 480680 Summer2006WSU L Stannan 39 86 Wkiuin39 S39i39A39lE XRay raphy Uses a shadow printing method similar to optical proximity printing Xray wavelength is about 1 nm and printing is through a 1X mask in close proximity 1040 pm to the wafer Xrays produced in vacuum and in He environment separated by a thin vacuum window usually beryllium Mask substrate will absorb 2535 on the azavww fmng mzar wiuoow l i illia ir l l mimosa 7 i r 1 445 1 H l mum r1 l Hr iw mm il Chumquot l l r Punsx AXZZY S Lg nxrn mninuungaymmrmun ummmgm alumnatwigs inmwvmw h Amman Exacsuna r r AND LOAD PDSl Y mu 39Ilm PDSlTIoN 55 430630 sHmme 2006 WSU L Slam I 55mm m an m lmngmmm WRIGHT S39l39A l39E Ion Beam thhOg raph M Ion Beam Lithography Higher resolution than optical ebeam or xray lithography Higher ion mass 2 less scatter Use PMMA resist more sensitive to ions that to es Scanning focused beam or masked beam system Ion optics for scanning systems more difficult to operate than electron optic scanning systems Ion source ionize gas surrounding a W tip liquid metal flowing to Wtip Ion current density Ga 01 pm spot 2 15 Acm2 W H 065 pm spot 2 15 Acm2 fquot y quotl 5 5 it 3i y quot Must use electrostatic rather than magnetic lenses N M l39ll u x mm Trajectories of an key H ions traveling through PM MA mm Au Si and PM MA EE 480680 Summer2006WSU L Starman 39 39 slems MEMS 44 Etching Two types of etching Wet chemical etching Dry plasma etching we etchin Transfer pattern from a resist to a lm on a substrate oxide epilayer or directly to the substrate mnimlied raie 39 39 h with human monitoring stagnant layer that covers the surface the solution gitation of dilfusion The etching of poly and amorphous materials is isotropic Wet etching of 39 39 39 39 39 on the nature ofthe reaction kinetics Isotropic etches polishing etches result in smooth surfaces Used for lapping and polishing to give an optically at damagefree surface FFA hm n iimmr nns iii tvm n 89 mm mic Wet Etching Mechanisms forvyet chemicai etching inyoiye three essentiai steps Reactants are transported by oirrusion to the reacting surface Chemical reactions occur at the surface Products frorh the surface rerhoved by diffusion 2 m rate or spraying the Wafers With the etchant solution Spray etching repiacing immersion etching 7 increases the etch rate 7 increases unitormity by constant fresh supply of etchant to Wafer Etch rate unitormity giyen oy Etch rate uniformity maximum etch rate minimum etch rate X 100 my maximum etch rate minimum etch rate mm iiiitm him i eiiii W FFA iis ii iimm r iiiis ii i trm n etchiriQEI Oxide Etching Buffered oxide etch commonly used to etch windows in silicon dioxide layers BOE contains HF and a buffer in water Room temp 25 C BOE etches SiO2 film much more rapidly than Si or PR Depending on the density of the SiO2 film etch rate r10 to 100 nmmin at RT A high concentration of phosphorous in the oxide enhances the etch rate A reduced etch rate occurs when a high concentration of boron is present P36 886 Length of etch may be controlled visually by monitoring test wafers Hydrophobic condition beading indicates completion HF amp H2O wet silicon dioxide hydrophilic but not silicon 102 4HF gt 51E 2H20 Buffer HF with ammonium fluoride NH4F Knui NH4F gt F NH4 439 1 Mi Mi mmug m puma ur mimicmi miing 5mm rm rm 0 mm r2006 WSU L Starmari 91 InsulatorConductor Etchants Ecriarits lor lnsulainrs and Conductors Mamiai Elthzml Composiiinn Eli ll Rare 3 ml HF sir i7n ml H30 Bummi HF lUDll A mm ll 3 N HF ii i l 1 l0 rril HNCli FAElCh i1o1 mm Jan nil H30 1 515 Bu crcd HF 5 35mm J 1 mo A imin M lml on 350 Armin 4 ml CHiCOCiH um i i 0 Au 4gKl i um min i ii 40 ml iio Mn Sml iiir oi osiimimm m HMOl ml cHicoou h ml H20 P 1 mi HNO mixmm 7 ml HCl H mm l UGAIH iil l FCN 1010 make 1 liicr FFA 08 n iirnrn VZOOB WSU L Starman 92 46 Etchanxs iar Noncrysxalllne Films39 VRIGI l39l39 STA39I L 3 mm 4 1 mu min in m m w mun m s n am illll mm rm e m l n mm W ll mi in mm rm 5 m 2 mm Sm H r mu W M a Pal lmlicun mm i nui H mm min was rm 6m H10 FFA me n mm rms w iamwmn 93 Etch Rates WRIGI 1139 STATE Rate determining step slowest reaction step Rule of thumb reaction rates double with every 10 C of increased temperature Thus i100 can change etch rates 10 and temperature control is important in etching reactions Etching of crystalline silicon Wet etching proceeds by oxidation followed by the dissolution of the oxide by a chemical reaction Common etchants for silicon HNO3 nitric acid HF hydrofluoric acid in H2O or CHBCOOH acetic acid Si 2H 4 Si2 auto catalytic process higher oxidation state Oxidizing specie OH39 formed by the dissociation of H20 H20 D OH H Si ZOH a S139OHZ a 102 HZ liberates H2 The HF is used to dissolve SiO2 ISI39OZ 6HF gt HZSI39F6 ZHZOI I Takes place in MEMS process to remove sro2 I H4 Soluble in water EE 480680 Summer 2006 WSU L Starman ems MEMS 94 47 3907 w 1111 Hum Etch Profile L KOH in water amp isopropanol 100 6 pmmin 110 01 pmmin 7 111 0006 pmmin 180 60 Angmin 1 Ratio ofetch rates 100161 where W mm ufthe Wmduvv un Wafer surface 115mg Etched map 11 u Onemauunrdependem212mm aThvuughwnduwpa emsun lt1EEgtruv12med smmm mmuugwm wpanems un lt1nngtr unarmed 5111ch FFAWFH umwnnn n1 WM 95 x111 1 1 m Mum u 110011er n 39 11 m w F1 M10101 1m um 1115111 mmn 1111111 7 7 m 1111111 H1111 1m 111111112111 1 M 1 K mm 11 11111111111 FFA m n wwwv mm 111 MM 71 MEMS 95 Etch Technigues Methods trauma urr orr CaDSlT LAVEF cum RESiS39 quot39 n EElET SUBSTHAT DEPC39S T L I 2 l l r a c a l E t r 1 r b Hi 1 M 2m asunr u m mtmq MM is a w 3939 ll m M Cnmparisnn nfvvet chemical etching and dry etching fur pattern transfer EE 480680 Summer 2006 WSU L Siarman 39 39 MEMS 97 Dry Etching Summation Major disadvantage of wet chemical etching for pattern transfer is the undercutting of the layer under the mask results in loss of resolution in etched pattern In practice for isotropic etching the film thickness should be about onethird or less of the resolution required If patterns are required for resolutions much smaller than the film thickness anisotropic etching must be used Dry etching techniques include lasma etch39ng fully or partially ionized gas composed of equal s of positive amp negative charges amp a different of unionized molecules Produced when an Efield of sufficient magnitude is applied to a gas causing the gas to break down amp become ionized Reactive ion etching RIE Extensively used in microelectronic industry Uses parallelplate diode system RF capacitivecoupled bottom electrode which holds the wafer Low etch selectivity when compared to traditional barrel etch systems Sputter etching High density plasma HDP etching EEA n n n ummpnnnn I I iarman 39 39 MEMS 98 49 lm uri Overview Basic diffusion process under high temp amp high concentrationgradient conditions Extrinsic diffusion impurity pro les for constant diffusivity amp concentration dependent diffus39vity Diffusion related processes impact of lateral diffusion Range of implanted ions process amp advantages lmplant damage amp annealing ion distribution in crystal lattice amp how to remove lattice damage lmplant related processes masking highenergy implantation and high current implantation FFAHFH ummvnnn ill trmn Diffusion Doping Diffusion and ion implantation provides an important means ofintroducing 39 39 quot 39 L 39 39 a crystalline semiconductor substrate Diffusion is used for pn junctions bipolar transistors ntubs for CMOS selectively disordering regions oflasers ohmic contact formation et al In practice semiconductor wafers are placed in a furnace and an inert gas N2 me Wale 39 4 quot dopant sources liquid and solid sources are used Diffusion slowly amp high temp Ion implant Gaussian distribution func Fastampat room tem Peak dependent on incident ion energy Anneal ions to activate them mparisun we d lusiun and b inmmpiamanun C lEIEI ll techniqueslurthe selecwe introduction uldupants intuthe semiconductor substrate FFAHFH ummvnnn ill trmn Diffusion System Qmui Iqu Liquid f impurin Q2 The schematic diagram of a typical Openrlube diffusion system Diffusions in Si the furnace amp gas ow arrangements are similar to those used in oxidation systems r4 39 r J 394 rr39 oin r r the loss ofAs by decomposition or evaporation 4POC13 302 213205 6C1 Chemicalrifeaction for phosphorus difquiOi i uSli ig liquid sou 2P 0 55 4P 5510 P205 forms a glass oh Sillcoi i Wafei amp theh reduced 2 5 2 tonySilicon FFAWFH HMMY Huh ill Hmh lEIl Silicon Diffusion Implementation 80012000C Ptype B BN boron nitride solid BBr3 boron bromide liquid BZH6 diborane gas Ntype AsP AsZO3 arsenic trioxide solid P205 phosphorous pentoxide solid AsCl3 arsenic trichloride POCI3 phosphorous oxychloride AsH3 arsine PH3 phosphine All dopants have solid solubilities gt 5E20 cm 3 at the temperatures of interest FFAWFH Hmmv h ill nmn Mechanisms of Diffusion and Doping Diffusion describes the process by which atoms move in a crystal lattice Although this includes selfdiffusion our primary interest is the diffusion of impurity atoms that are introduced into the lattice for the purpose of altering its electronic properties Concentration gradients temperature geometrical features orientation defect densities and bonding strengths play an important role in the diffusion process The wandering of impurities in a lattice takes place by a series of random jumps in three dimensions A ux of diffusing species results if there is a concentration gradient Interstitial Diffusion Substitutional Diffusion primary mechanisms for diffusion Interchange Diffusion Combination Effects Diffusion is fast if some defects are present in the crystal FFAHFH nmmcnnn ill tvmn in Impurity Doping Mechanisms n 0000 GOOD 139 0000 0000 GOOD OOOO 0000 0000 i an Alumic d lusiun mccnamamaicn a Murdimensiunal iamcc mccnamam b interstitial mccnamam a Vacancy a substitutian dmwnn impunivmnves amnnc vacuums with lattice a mammal mechansm wipr atnm letting a at atnm n the lattice width at alum s asplaced tn a inteistmals c interstmal dillusinn man alums an nut ieplace alums n the Nstai lattice FFAHnn Hmmv nnn ill tvmn 1m Diffusiun byjurnping pmccss Wm m m Impurity Doping Mechanisms yacancy orsupstitutionai uu iiiuiiiigi i 7 WM not occur in a pertect crystai interstitiaiDirtusion e impu ri atoms moyet stitiaisitetotn Tney iaiiai iiii iiaiii i p type of site 7 39ia di sion r one interstitial site to 7 Can occur crystai Dissociatiye Mecnan sm 7 supstitutionai atom can become an interstitiai occupy potn sites Tnis mec anism may controi dittusion cuNiAuinsi Zri c Cu in eaAs intercnange dittusion 7 two or more atoms dittuse by an intercnange process ot atoms ne p opapiiity ot intercnange dittusion is reiatiyeiy iow Combination Effects as name impiies a traction ot tne impurity atoms may dirtuse supstitutionaiiy and tne rest interstitiaHy WO stream process FFAHFH iimmrnns iii trmn ins iiiuiciirmic Ion ImQIantation i i impurity gas Ba A5H3 02 etc is ionized yia a nign yoitage acceierator Beam otionized impurity atoms pius moiecuiartragments witn i cm diameter is generated Beam current is io uA to i mA giying a cnarge o transported down a iinearacceierator impiant dose range 10 to tow atomscm2 oo ormaking smaii deyices Typicai ion energies 30 to 300 Keyeuptoi Mey Aye ag p srangingtrom i0nmto urn Adyantages precise controi and reproduc piiity of impurity dopings and its iower processing temperature W PW N Nmiiml twain Hap Wind iiiniiiiniiignn BUNquot trait HIM Nl mm i iHHl iii wh iii in Few Aztnlmmiim tiiiiii rrim Q rmllli39l wiiior iii i iiii iiuiiiiii iiiiiniimi iiiaiiiimi Ti miiiiai Emmi Scnematic ota mediumrcun ent ion im iantor EE WEIBEE Summei ZUUE WSU L Siaiman MicmEiecimM echamcai Systems EMS l vmm SLH39L the crysta surface FFAWFH Hmm y nnn NahHe at me Concenxmuon Flame Due m Iun lmpiamahun m M a mp anttnruugn an amurphuus uxwde ayer o m nmn Ion Implantation u m mum w magnum x mm n K m u r mwsunent FFAWFH WRIGHT mu target nuc ew o to n mec Nuc ear5toppwngr E E ectromc stoppmg r nteractwon of moment On Wm the doud of e ectrons surroundwngthe target atoms 45 11quot E Average rate uf Energy uss vth Mame x I dE 75quot Myquot swam ha ms transfemng energy to the Ion Stopping Cumer uf hard spheres Hmm y mm m 1 S ESE range Wm M 39 22E 7 the enevgy atwhmh nuc eav and ewecuumc M M We n 3m 1m hm mm H W m MW Nuc eav sluppmg puwevSnE and exememc stuppmg pDWEYSEE39D1AS P and a m s The pumts uhnte sectmn eme curves cunespund m stuppmgave R 5 N2 JAM121R M23M Prmemed ran e stemsw EMS 141ng2 Prmeetee stragg e lEIB Damaqe Disorder amp quot quot rathuman lm mm wmm S39lAl L Estimated dose required to convert a crystaume matehat to ah amorphous matehal 39ljj llil The heavily damaged polycrystalline state m eaAs makes tHlS material semrtnsulattng With ah H z active camer COl lCel ltl athn lt to1 em3 DavTum w Material parameters are degraded e mobility M lifetime mm implanted tons most are hot m substitutional W sites 1 rll R t u implantation disorder caused by a ilght lOl lS and b heavy ions FFAWFH ttmmv Hm lll tvmn 1U Material ResistIVIy WRIGHT TIME Rmmlvnt htsz n H lll quot l1H ill Il H Ill ll lll Ill I ml lll ll ll 39 l I l l l l t l t l l Guiunull um sum 0 Ohm I Nltklt llllh Slllum Si t lluivl f 39 hum thlllumnmunittruth Altmgtmm Gallium lillmpllltll mm Phuhmm I Sullm quot 39 Fimtl Charmin l lf r Em m W l l l l l l l l Al I l Ill39 lllquotquot lll39 lll39 lll39m Ill39 lll quot inquot In 1 llquot lll In l1 nmlutlwllx lSt39ml lt7 ilmilnlm 439 7 tmtmmlmtm glii39nudmlm a rum 0 r mi 1 t r Quartz 1018 Qcm insulator Silicon si amp gallium arsenide GaAs 1 Qcm semiconductor Silver 10E Qcm conductor FFAWFH rrmmrms ill trmn 1m Resistivity Conductivity Half HT STAT I 1 I Ohm s Law J 2 GE 2 E III I l I II p w 39 J the current density Acmz I I L i quot 39 I 1 iquot E Current density is proportional to f in ii tini l I the Efield o H I firm A 10 E reSlSUWQO Q cm 1 H L 39 a E conductlvzty 9 CM Figure 35 Current conduction in a uniformly doped semiconductor bar with length L and crosssectional area A 1 GE Derivation Electric field is E C MW 6 dx Electron current In 2 anun U unE TABLE 1 Portion of the Periodic Table Related to Semiconductors Period Column II III IV V VI 2 B C N O Boron Carbon Nitrogen Oxygen 3 Mg Al Si P 5 Magnesium Aluminum Silicon Phosphorus Sulfur 4 Zn Ga Ge As Se Zinc Gallium quot Germanium Arsenic Selenium 5 Cd In Sn Sb Te Cadmium Indium Tin Antimony Tellurium 6 Hg Pb Mercury Lead EE 480680 Summer 2006 WSU L Starman MicroEIectroMechanical Systems MEMS 111 villain mi SheetResistance Definition Resistance R of the rectangular block of uniformly doped material shown below ref i i i l i A t M i 5 w L where p material s resistivity p L L L length of block R 7XW RAW A crosssectional area of block where R5 pt is called the sheet resistance of the layer of material 1 0 g and 039 qunnupp 1 m a quot 7 H 7 Sheet resistance of a material is the ratio of F l l i reSIstIVIty to thickness i t quot5 TX I r I i V V r Top and side views of two diffused resistors of different l physical size having equal values of R Each resistor has a T j 3 i if M quotfjiu ratio LNV equal to 7 squares Each end of the resistor g 39 Q 739 g g 39 s quot 1 quot contributes approximately 0 65 additional squares J m EE 480680 Summer 2006 WSU L Starman MicroEIectroMechanical Systems MEMS 112 56 RC Time Constant Vlel l39l SI A l E Problem Calculate the RC time constant for a l cm long doped polysilicon interconnection runner on 1 pm thick SiOZ The polysilicon has a thickness of 5000 Angs and a resistivity of 1000 pQcm leiCm Soln 1 v V lT l lv r r711 4 liri RC time constant per unit length for three conductive materials as a function of feature size NOTE As Width of line T RC l As line length T RC T EE 480680 Summer 2006WSU L Starman Systems MEMS 113 FourPoint Probe Measurement VRIG HT STATE Fourpoint probe with probe spacing 5 used for l C direct measurement of bulk wafer resistivity 1 and the sheet resistance of thin diffused l layers Aknown current is forced through the ale t HI 1 l outer probes and the voltage developed is 39 measured across the inner probes p 2mV1 Qcm tgtgts p7rt1n2V Qcm sgtgtt For shallow layers R5pI7rnZVI453VI Qcm sgtgtt lIJ Based on thickness of layer t thick compared to s EE 480680 Summer 2006WSU L Starman Systems MEMS 114 57 Ivitv FourPoint quot L Measuring Resl FourPoint probe Method Key features I Probes equally spaced e Small current I passed through outer probes Voltage V measured between inner probes amp Thin semiconductor with thickness w much smaller than sample diameter d 2 Resistivity is given by p WCF Qcm T where l I l I CF correction factorquot depends on 1 ratio of ds where s is the probe spacing l I d N tl gt When gt20 CFN454 5 Measurement ofl eslstlvltyuslng a tourepmnt prope FFAWFH nmmrnnn lll tvmn 115 MEMS Fabrication WRIGHT mt Rotm Bulk rnlerornaenlnlng unaee rnlerornaenlnlng e cuns trumed Entlrelyfrumthln nlrns thAe llthugraphlc galvanufurmung aorormung e Cunslsts ortnree baslt prucEssln Eps liltlnluplntlr thhugraphy Elemruplatlng Muldan aseo upon xeray raolatlon l can produce rnl rostrumure vvlth lateral dlmEnSanS ln Rl39tlll tne rnlerorneter ran e e structural helghts or several hundred rnlerorneters rrorn a vanety or rnatenals ml 4 l e sml 4 E m lei Ill snl lln nu quot 4 Inmrumllnu 1 at lt w Fahllcallnnplncss mslmpleslllcnne luhhelmemhlane lededepnslllnn m panelnlnql n KOH etenno Cslllcnne luhhelspln cnallHEl smw ntnue lemnval nn ham slde Vallnls process sequences tnl dual damascene plncss FFAWFH nmmrnnn lll tvmn 1m Vluuln sum FFAHFH ummvnnn m nmn LIGA Fabrication Process mum 1 hm mm m 1 Put met mod Want a good ohrmc Contact on s 5 on W swhcwde 2 Put meta overmgw doped regwon FFAWFH ummvnnn m nmn Profllometer Measuremen or much sum evaporated lm Mme EmuEm SummevZUUE W SU L Stavman MmmE echuMechamca Systems MEMS u Rm Chem cal Mechan cal Po sh ng CMPl Pnlengsluny Wnlolcarrier me smnysupply WW W Pumhmg pad Running plnh u lrh mm x N ngure M 24 A schematu uf a CMP puhsher uquot Three main parts oflhe CMP process gt Surface to be polished mm W 139 4 quot 39 u w I e e Mrqu m r w The slurry provides both chemical and M mechanical effec 5 my DH m quotk Wm ngre M 23 Pmeess sequence usedtufabrmate a Cu hnesme V meme usmg dua damascene a Rem smenen apphed o W H ma de nmun and 1 Cu depesmunsfumuwed by chemmah 5 meehameaw puhshmg CM F39 L Hmmv mm m Hm n my Semiconductor Materials Crystal Structure Crystal Growth Czochralski Brigman Miller indices Epitaxy Film Formation Deposition Metalization FFAHFH ummvnnn lll nmn Fabrication Summary Lithography Etching Implantation Resistivity Other useful techniques


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