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Electronics for Cmp Engr

by: Savion Brekke

Electronics for Cmp Engr CMPE 3403

Savion Brekke
University of Texas-Pan American (UTPA)
GPA 3.54

Edward Banatoski

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Edward Banatoski
Class Notes
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This 10 page Class Notes was uploaded by Savion Brekke on Thursday October 29, 2015. The Class Notes belongs to CMPE 3403 at University of Texas-Pan American (UTPA) taught by Edward Banatoski in Fall. Since its upload, it has received 39 views. For similar materials see /class/231302/cmpe-3403-university-of-texas-pan-american--utpa- in Computer Engineering at University of Texas-Pan American (UTPA).

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Date Created: 10/29/15
Week 5 Notes FET ahdFET large slghal model Page 1 of 5 CMPE3403 Eleetromes for Computer Ehgmeers Fall 2008 4 2 page 146 N channel FET Dram M1 Gale Ogl lDralnmA Id MbreakN o Vans Source Crreurt and SPICE symbol Idram versus Volram Gate voltage as parameter l r l w l m d l ForVds lt Vgs eVm non saturatedregroh text ealls rtthe mode reglon 1 2 1a K n ma 7n ForVds gt Vgs eVm saturatedregroh textmehaohs plnchroffreglon K 1m 7 Vr em the dram eurreht 15 de ned as posltlve mto the dram afuhetaoh of Vols the seeohd equataoh above 15 modlfledto K 1m 2 nemwm Also some texts vvnte the equaaohs m the form Km e Ma 7 V3 106 K VFW 2 XE p 53015quot E where L ls L T L the gate length anthhe gate wldLh and Tox the oxlde thlelmess Then sllleoh Dloxlde The Kls relatedto the devlce parameters as 1g XC Week 5 Notes F ET andFET large slgnal model Page 2 of 5 CMPE3403 Eleetronres for Computer Englneers Fall 2008 The text de nes small k as the proeess transeonduetanee k his v9 da Vd Vgs 51 KVgsrvmvd5r12Vd5vd5orKWgermYWQSrvm V5 V5 4 2 6 page l551n saturauon the small signal mndeltransennduetaneers de ned as 81 8 g EKVrvn 1ltrneh operaung polnt as 314 A14 1424 En i We A a Vs Vsl The lrcult model wth transconductance ls 9 F3 lt7 Vd Vgs nggs V5 V5 Vds or flmte Lambda a reslstance r0 ls added to the model 9 F3 lt7 Vd Vgs nggs r0 V5 7 V5 lambdals not 0 The parameters are related as ro l m Vlln where Idls the DC qureseent dram eurrent an N n as Vds gt Vgs th OtherWlse one ofthe equatlons ls assumed solved and eheeked for u duslng the loadlme drawn on a demee measured graph eharaetensue The Id lnterceptfor Vds 0 ls VDDRD orVDDRDR3 lthere ls a souree resrstor and the Vds r VDD A The Dc soluuon ls used to nd ampll ers Q polnts whleh ls often Vds 13 Vdd V39RD Week 5 Notes FET and FET large slgnal model Page 3 of 5 CMPE3403 Eleetronles for Computer Engmeers Fall 2008 16 o 4 Page 1009 Small signal high frequency mnelel Wrth eapaertors added the hlgh frequency small slgnal model ealled the p model ng Vg o T tt lt7 Vd nggs r0 Cds Cgs V5 lt7 V5 qual to one A eunent souree s eonneetedto the nput andthe output eunentrs the unentwrth the output shorted The small slgnal FET AC equateons are V 1 1 7 V 1 1 nj M Cu ng n E 1 E nj M GEMS E E f 12m CF 27 CF Cl 4 2 9 Page 157 FET 4 terminalmndel with substrate connection and thehndy e eet e e 7 E w CF c l nes ule th FETls n awell at ground potenteal The four termrnal FET SPICE model wth supplles eonneet to the termrnals s as follows The fact that the Vb bulk eontaet s not at the souree potentral only affects the threshold voltage whlch beeomes afuneteon ofthe onrnt Vquot V y V 2d 7 24 where 0 3lt2 Iflt10 and and Ultylt3 otten 2W0 ov andy 0 75 are used n well Week 5 Notes FET andFET large slgnal model Page 4 of 5 CMPE3403 Eleetromes for Computer Englneers Fall 2008 4 3 page 159 P Channel MOSFET urce Vgs 7 M J Gate o Vds Id Dram P ehannel erreurt symbol The equatrons are the same for the p ehannel MOSFET as the n ehannel but the voltages vgs and vds are negatrve ln normal operauon and th ls also anegatrve value Vgs must be more negatrve the th for the EETto be on The ealeulated eurrent wlll be posruve for ttn p r pp erreurt l r l w lm all EorVds gt Vgs er p non saturated text ealls tnode reglon Agam VgsVdsth alllt0neg l u 40 EorVds lt Vgs er p saturated Vds more negatrve than the negauve Vgs e th vvhere agarn Vgs ls negatrve and th ls negatrve but a negatrve negatrve ls posruve K 7 7 VJ IDs 39T h m H eapaertor values Cgs ng and Gals otten notrneluded SPICE Modelrng The default SPICE model for the NMOS FET ls MbreakN3 the three termln w h nu l M FF39T LEVEL 1 You need not speclfy any parameters but just use the model To ehange parameters from the default arameters cllck on the FET and then seleet Edrt model Instanee A model edrtor shouldpop up To ehange the thresholdto 3 Vfor example type VTO 3 V and then cllck s ve note that the letterrn VTOls a eaprtal letter 0 The defaultparameters are VTO 0V KP 0 00002 w 0 0001 em and 0 00 bottom CMPE3403 Fall 2008 Week4 chapter 3 Drode Crreurts Page 1 of 7 Chapters Dimies arrow Idlode g VD1ode d 310 3 Page 101 Ideal dinde circuit nnndelVo1 0V forldmde gt0 Drode 15 short erreurt assume snort 1f Idmde lt 0 dwde 15 open on resolve for open Idwde 01f e on short resolve wrtn short 3 2 Termmal charactensucs Forlow forward orposmve voltage eurrentrs low As dwde 7 V reaprd1y rnereasrng agam andrs negatave 3 3 Modelmg tne dwde forward enaraetenstre note KTq 0 02586 V atT 23 deg c 300 deg K Ideal dwde equataon Non 1dea1 dwde equatron V 11nExp e1 11n q Exp 71 KT 1 n15 anotanrnteger 1oltn lt41 Usually on a1og sea1e forVdrode between 0 3V and 0 7V In on a1og sea1ebase10 versus Vdrode on a1 near sea1e wru be a strargntnne Entendrng tne strargnt lme unta1rt dede0 quotm wt 7 mm Vdmde on the strargnt lme pomon for 0 3 v lt dwde lt 0 7V fmdn as M m7 K17 M 1M q 1n CMPE3403 Fall 2008 Page 2 of7 Week 4 Chapter 3 Diode Circuits For the following graph Idiode is about 5X10 Using this value at Vdiode 06V results V in n m 06 0001 l380 ELquot 002586Ln 39 11 q 10 5x10 Idiode vs Vdiode l 01 0 01 0001 300001 E lt 9 E lEr07 0 02 04 06 08 l 12 Vdiode V Once the values are determined the model may be used iteratively to solve for diode voltage and current for the diode in a circuit 3104 Page 103 Offset voltage model Vdiode 07 V The simplest approximation and the best diode model is to assume that for any applied voltage greater than 07 V the diode conducts and has voltage 07 V the diode can be replaced by a 07 V DC voltage source If the applied voltage is less than 07 V or negative the diode is off that is the diode current is zero and the diode voltage is the open circuit voltage at the diode terminals with the diode removed from the circuit Offset voltage model Vdiode 7 V when conducting replace diode by 07V DC source solve for Idiode If Idiode is negative replace with open and solve for Vdiode which should be negative Offset voltage model with nite resistance also called the piecewise linear model The diode is replaced with a 07 V DC source and a resistance whose value is determined by fitting a straight line to the characteristic above 07 V Again the circuit is then solved CMPE3403 Fa112008 Page 3 of7 Week4 chapter 3 Dlode clreults erreurt dlode terrnrnals glve dede 3 7 page 91 Small signal dinde nnndel F r m H l quotV r uwd m UCblaspomtwlth lw l KIT glven by R 1quot where Idlode ls the DC dlode eurrent For the srnall slgnal AC m c n where rn ls usually xathe square root funeaon and Vbl for the dlode a 1 ml Va K T ls oleterrnrneol by the dlode doplng ya I NND Ln where Nn ls the p slde quotl aeeeptor doplng ande ls the n slde olonor doplng and cm ls the 0 V deplehon eapaertanee The dlffuslon eapaertanee ls rrnportant for hlgh dlode forward eunent for a short dlode w ltlt Lwhere Lls the earn dlode w gtLThe dlffuslon eapaertane C 1li 1 1 W2 1 2 M 39 KIT quot KETK 2D 2D r dlffuslon length It ls not appllcable to along Y e e ls gven b Na WNn where WNA J 397 397 Wm the wldLh ofthe n reglon 3 4 Zener dlode ltag A 5 1 VZenervvlll break down and eonduethlgh eurrent for V3 7 5 1 volts In the dlod307 Tth n l mhl T if Zener o The erreurt rnoolel m the reverse dlrecnon ls the preeewrse llnear rnoolel wth V1 n 111 where Vzn ls the Zener dlode offset voltage m the reverse duectlon and R2 the Zener dlode resrstanee CMPE3403 Fall 2008 Page 4 of7 Week4 Chapter 3 Diode Circuits 35 Dim le Recu i m Circuits 313 Halfwzve chd er N1N2 Diode y WZOVrmS VS g R 314 Full Wave chti er widi center tap tranxfnrmer N1N2 Diode y R 120 Vrms V5 8 y Diode V V VM V 2 m CMPE3403 Fall 2008 Page 5 of7 Week4 chapter 3 Dlode clreults Voltage Doubllng clreult Not common 1 D2 VpchsmMg V5 D1 CZ v 2Vpk Dlode In m terms of physlcal parameters Long Dlode 1r 2 2 In l LgNA gm t l KIT 0 02586 L15 dlffuslon length of eleetrorrs or holes L an or 1 397 L up where In or 1 rs excess earrlerllfeame The moblllty and camerllfenmes are funeaorrs ofthe doplng eoneerrtraaorrs NA ande and anumber ofexpresslons and tables have been putfonh to descnbe thelrvalues Short Dlode In for the ease Wm lt Ln where Wm ls wlolth ofthe dlode p reglor and Wm lt ln where Wm ls the wlolth othe n reglor D 1 L7 r t WNANA WNDND 1n qA 3 8 Page 92793 Schnnky Dinde Voltage olrop for forward eonolueaor of MetalrSlllcon Schomky dlode ls 0 3V lower the sllleor pnjunctlon dlode 0 7V Schonky Dlode Symbol leode 0 3v CMPE3403 Fa112008 Page 6 of7 Week4 Chapter 3 onde ercmts 3 lZPage 108 to 112 Zenerdwdes sueh as 51Vo1v71v ete The are used as regulators to produce a spem yo1tage t Zener d10de Symbo1 o quot w ttquot 1 raSIVZener ohms atI 20 mA The powenaahg determmes the mammum eumeht that the Zeheh eah eohduet whxch 15 glven by t Watt 1h 0392A 39 2mA A typxcal regulatmg mrcuxt 15 shown below Assummg ah 1dea1 Zeheh charactensuc thh Zehe 0 R 1 um a resxstor 15 ea1eu1ated forthe condmon all the eumeht passes through 1t For thxs condmon RI VZenerImax 51V39 2 mA 130 ms Wxth R a w t o t e e a 3 E th a 12V source theh Rs 15 glven by Rs V5 7 VZenerImax 12 we 511039 2mA176 ohms RS mm 176 ohms JV PL v mm 130 ohms obtamed For the mrcmt wnh the R2 as shown RS m1n7150hm5 WZVdC 7 VS PL mm 570 ohms The powenatmg andthe Rz determme Imax from the equauon Ptth VWIM R1M1m and subsmuung ya1ues and solvmg the quadratic equauon nges Imax 8 95mA Thxs nges RLZVZenerImax 51V8 95 mA 570 Vs rVZener Imax 12 0175 1V8 95mA771 ohms and smee Rz by Rs Rz 56 ohms Rs 771V 56 715 ohms Also the open exhetheheh yo1tage W111 how be Vz


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