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# ANALOG IC DESIGN ECEN 4827

GPA 3.9

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This 18 page Class Notes was uploaded by Mrs. Lacy Schneider on Thursday October 29, 2015. The Class Notes belongs to ECEN 4827 at University of Colorado at Boulder taught by Dragan Maksimovic in Fall. Since its upload, it has received 32 views. For similar materials see /class/231777/ecen-4827-university-of-colorado-at-boulder in ELECTRICAL AND COMPUTER ENGINEERING at University of Colorado at Boulder.

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Date Created: 10/29/15

ECEN48275827 lecture notes Effects of op amp imperfections on application circuits part 2 Input offset voltage Vos input bias current I B and input offset current US Circuit example Analog integrator Figure 21 Analog integrator Figure 21 shows an analog integrator circuit Assuming an ideal opamp the closedloop smallsignal transfer function this circuit is l ACLidea1S 39 1 The magnitude response of the ideal integrator is l 2010gACL idw 10quot 20 log QCR 72010gaCR dB 2 the Bode plot of which is a straight line with a slope of 720 dBdecade Note that the integrator gain tends to in nity as the signal frequency approaches zero DC As an exercise derive an expression for the closedloop transfer function ACLU of the circuit in Fig 21 assuming the opamp has a nite openloop gainAo The circuit analysis leading to l is based on the assumption that the opamp operates with very large openloop gain ie at a DC operating point away from the output saturation limits In a practical analog integrator however the DC operating point in the circuit of Fig 21 would most likely be at one of the saturation limits To explain this we need to introduce and examine another set of opamp imperfections the input offset voltage V05 the input bias current I B and input offset current 103 Input offset voltage Vos In the circuit of Fig22 with v v 0 the output voltage is ideally zero v0 0 Due to unavoidable mismatches in the characteristics of the devices in the input differential stage of the opamp to be studied in more detail later when we discuss internal transistorlevel opamp realizations the output voltage is not zero Instead a small DC voltage would have to be applied between the opamp input terminals to set the output voltage to zero The input offset voltage V05 is de ned as the voltage that results in zero output v0 0 when applied between the and input terminals The input offset voltage which is ideally zero is considered a random quantity that can take positive or negative values in a certain worstcase range around zero Figure 22 shows a model of an opamp with the input offset voltage V05 zemo ivet Figure 22 Model of an opamp with the input offset voltage V05 The model simply consists of an ideal zerooffset opamp model and a dc voltage source V05 in series with one of the input terminals Since the sign of V03 is not known in advance the reference polarity of the offset voltage source in series with one of the inputs is arbitrary As an example let us consider the effects of the input offset voltage on the operation of the analog integrator of Fig 21 Using the model of Fig 22 the circuit model of the integrator is shown in Fig 23 zemo ivet Figure 23 Model ofthe circuit in Fig 21 using an opamp with input offset voltage V05 Suppose that v1 0 and that the circuit is powered up at time t 0 Let the initial value of the capacitor voltage vc be zero vc0 0 Assuming the opamp has very large open loop voltage gain v V05 and the current VosR charges the capacitor up or down depending on the sign of V05 until the output voltage reaches one of the saturation limits Vamax if V03 gt 0 or VOWn if Voslt 0 Therefore the DC operating point of the analog integrator is at one of the saturation limits Additional circuitry may be necessary to ensure operation of the integrator with the smallsignal closedloop transfer function 1 which assumes that the output voltage is away from the saturation limits In general the input offset voltage is the opamp imperfection that sets a lower limit on dc or lowfrequency signal amplitudes For CMOS opamps offset voltages are typically in the range up to ilO mV Opamps with bipolar junction transistors typically have order of magnitude lower offset voltages Temperature variation or temperature drift of the input offset voltage is specified as AVosAT in uVOC The temperature drift is usually considered a random quantity Input bias current I B The input bias current IE is the dc bias current owing into or out of the opamp input terminals The input bias current is required for proper operation of the opamp input transistor stage The sign and the nominal value of I B are known and are usually given in opamp data sheets For opamps with bipolar junction transistors the input bias current is typically in the order of HA For CMOS opamps the input bias current which is much smaller in the order of pA can usually be neglected Figure 24 shows an opamp model with nonzero input bias currents Figure 24 Model of an opamp with the input bias currents I B As an example applying the model of Fig 24 in the analog integrator of Fig 21 we get the circuit model in Fig 25 vv Figure 25 Model ofthe circuit in Fig 21 using an opamp with input bias currents 13 Suppose that v1 0 and that the circuit is powered up at time t 0 Let the initial value of the capacitor voltage vc be zero vc0 0 Assuming the opamp has very large open loop voltage gain v 0 and the current I B charges the capacitor up or down depending on the sign of 13 until the output voltage reaches one of the saturation limits Vamax if 13 gt 0 or VOWn if 13 lt 0 Therefore because of the input bias currents the DC operating point of the analog integrator is again at one of the saturation limits even if the input offset voltage were equal to zero Since the sign and the nominal value of 1B are known it is possible to cancel out the effect of I B by proper circuit design For example in the circuit of Fig 25 this can be accomplished by placing a resistor R from the input to ground as shown in Fig 26 4A I VAV AA vv T Figure 26 Cancellation of the input bias current effects in the analog integrator Assuming that v1 0 and that the opamp has zero input offset voltage and a very large openloop gain we have v v R 13 and v0 0 In general the effect of the input bias current can be cancelled by constructing the circuit so that the dc resistances seen at the and terminals of the opamp are the same Input offset current as So far we have assumed that the input bias currents for the and terminals are the same 13 137 13 In practice because of mismatches in the opamp input transistor stage this is not the case and we de ne the input offset current 105 and the input bias current as 10311i 113 3 1 1 4 The input offset current 105 is typically at least an order of magnitude smaller than I B The offset current just like the offset voltage is considered a random quantity speci ed in a worstcase i range around zero Figure 27 shows a complete opamp model including V05 I B and 103 B zemo xet zeminputbias Figure 27 Model of an opamp with the input offset voltage V05 the bias currents I B and the input offset current 103 Comments 0 The input offset voltage V05 the input bias current I B and the input offset current 105 are the opamp imperfections that set a lower limit on the amplitudes of DC or lowfrequency signals that can be processed successfully in opamp application circuits The opamp model of Figure 27 can be used to quantify the effects of the imperfections in an application 0 Since the polarity and the nominal value of 13 are known the effects of the input bias current can be canceled by proper circuit design the dc resistances seen at the and terminals of the opamp should be the same 0 The input offset voltage and the input bias current are treated as random quantities in a range of values around zero ECEN 48725827 Lecture Notes Lecture 5 Objectlves forleeture 5 l Analysls ofpreersron eurrentreferenee Appro sfo evaluaungtoleranees Temperature Coeffrerents evaluauon teennrque Fundamentals of Common Mode Rejectlon Ratro cram Fundamentals of1gtower Supply Reject on Ratro PSRR utwa Analysis of Tolerances and Temperature Coefficient for a Precision Current Reference Circuit Crreurt Flguve1 Pveclsmn Cuvvem Revevence The goal ls to have In lmA Lftlne opramp ls roleal and tlne BJT has very large eurrentgarn VREF vltgt VG Vm and therefore I R Takmg rnto aeeounttlne opramp offset voltage tlne frnrte BJT eunentgarn A andtne opramp rnputbras eurrent 15 we have from prevlous leeture V VA W T 5 5 15 1 imam In M R lt2 Negleetrng 15 we get Note tlnat rf15 were srgnrfreant tlne effeet oflacould be eaneeleol by addlng aresrstor of tlne same resrstanee value R m senes wrtn tlne posmve opramp rnput Given the tolerances and temperature coef cients for VREF V03 and R our objective is to nd the tolerance and the temperature coef cient of IREF To solve this problem we linearize I REF as a function of VREF V03 and R around the V nom1nal value REF m REF R AIREF m aIREF aIREF AVREF aIREF V05 aIREF AR IREF IREF aIREF IREF 6V0 IREF IREF V V Evaluating the above partial derivatives using 2REF yields 1 R VREF AIREF m 1 2 R 1 AVREF 1 K75 i2 VREF AR IREF 1 VREF R VREF R VREF R VREF R R R R Simpli cation and rearrangement of the above equation yields hzii AViLamp IREF VREF VREF R Numerical example 0 M i50 8 o 7 01 VREF o 0 7 025 VREF 0 amp i1 R Approaches to Evaluating Tolerances There are two general approaches for evaluating individual tolerances 0 Worst Case Approach 0 Standard Deviation Approach The Worst Case approach in general is a very conservative approach where the maximum absolute values of the individual parameter tolerances are simply added Tolerance iZIIndividualTolerancesl r 185in this numerical example 6 If the result of interest depends on a large number of individual parameters in a circuit the worstcase approach leads to a very conservative result In such cases a statistical method can be applied Assuming that the individual parameter values can be considered as independent random variables with normal distributions the standard deviation of the result can be found as A 0wa 1 2 0392 12 I REF in this numerical example 7 REF Notes on the precision current reference 0 The precision current reference circuit is designed starting from a precision voltage reference VREF and using an opamp and a transistor in a negative feedback configuration to set the reference current I REF The input offset voltage V05 of the opamp can have a significant effect on the tolerance of I REF In the precision current reference design the largest contributor to the tolerance of IREF 1s the resrstor tolerance In the numerrcal example we assumed the resistor tolerance of il which can easily be accomplished using a discrete resistor For resistors that can be realized on an integrated circuit the absolute tolerances are usually much worse e g i20 which can be a significant problem in IC design Temperature Coef cient General Comment 0 Unlike tolerances which are due to random variations of component parameters temperature coefficients usually have known signs making it possible to cancel temperature coefficients This cancellation approach is used to make precision bandgap voltage references which will be addressed later in class Fractional Temperature Coefficient of the reference current I REF can be found as Al TC 1 REF 8 F REF IREFAT and is expressed in per degree C or parts per million ppm per degree C Note that TC F includes the term AIIREF which can be computed as in 3 5 taking into account REF the temperature coefficients of the circuit parameters The result is 1 1 AV TCFIREFETCF TCFVREF VREF AT TCFR 9 where AV 0 o A 1s the temperature drift of the offset voltage ilOuV C 1n the numerical example 0 T CF08 1 C 10000 ppm0C AT o TCFVREF AVREF 100ppmOC VREFAT AR TC R 1000 mOC 0 F RAT pp Using 9 and the numerical values for the precision current reference circuit in Fig l we get 1 100 lOzV l ilOOOppm TCFIREF H 10000 100 m 10 0C 0C 0C 126V 0C Note that the temperature coefficient of the current reference is affected mainly by the temperature coefficient of the resistor R 1000 m TCF IREF m TCF R Tpp 11 Commonmode Rejection Ratio CMRR The common mode input is the voltage applied simultaneously to both the positive and the negative inputs It is accounted for as follows For smallsignal inputs 0 Common Mode input vcm V V 2 0 Differential Mode input vid v7v7 V0 onid Acmvcm A0VTVTAcm The common mode rejection ratio is defined as CMRR L140 12 cm The CMRR is usually expressed in dB A 13 ACM The value of the CMRR can generally be found in data sheets for the particular opamp It is of interest to relate the concept of CMRR in terms of the input offset voltage Consider the circuit shown below CMRRdB 20ml w r Amvm M Fig 2 openness teammate mt Wm is zero but Wth at al opramp thathas a mte em Ideally the CM39RRxszero and e o t Rthxs s not the se 1n the euemt of Fxg 2 the outputvoltage can be sett Tu w vwa rm uwww mu 3 01mm wwwnhcm mu m swam mt addzd te se lrlz mum te me w vs 4 1n the euemt ofog 3 we have Vs Am Ava U 4 4 cm A v 1 Am 1 We 15 Am VM AVEM BVEM Notes easier to nd than by de mtmn 12 Based on 15 we can also conclude thatthe effects of mte mm are similar to the effects of the mput offsetvoltage exeeptthstvas shouldbe considered a fu hon of the commonrmode mputvoltag e examp e A qmek 1 Suppose that cm 8UdBCMRR10 andthatthemputcommonemode 10V From n result ofthe fxmte CWRXS If 1U Power Supply Rejection Ration PSRR 15 opamp Negleetmg mte cram V A V VG A39 AVDD A AVss Here A and A are the smallsignal gains from the positive supply rail VDD to the output and from the negative supply rail 7VSS to the output respectively Similar to CMRR PSRR can be de ned in terms of the gains or in terms of the dependence of the input offset voltage on the supply voltages 6V PSRR j 6V 17 DD 71 PSRR Wi 18 A 6V3 In opamp data sheets the two PSRR values are usually expressed in dB ECEN48275827 lecture notes Effects of op amp imperfections on application circuits part 1 Objectives in this segment of the course are to N E De ne opamp static and dynamic characteristics and examine the effects of op amp imperfections in several circuit application examples Motivate followup discussions about transistorlevel opamp circuit design techniques aimed at improving opamp characteristics Review some of the prerequisite circuit and device modeling and analysis techniques required in subsequent course topics Op amp imperfections DC and low frequency small signal characteristics Openloop lowfrequency voltage gain A0 vov v Output resistance r0 Input resistance rm Supply voltages VDD VSS or Vcc VEE supply currents I DD 133 or ICC I EE Output saturation limits VOWn VOW output voltage swing VOWn lt V0 lt Vamax Maximum output source or sink current Input offset voltage V03 temperature drift of the input offset voltage AVosAT mVOC Input bias current I B 13 1102 temperature drift AIRAT Input offset current 105 13 13 temperature drift AlasAT Commonmode rejection ratio CMRR Powersupply rejection ratio PSRR Input commonmode voltage range VCMmm lt VCM lt VCMmax Dynamic small signal and large signal characteristics Openloop transfer functionA0Ls Gainbandwidth product GBW or unitygain bandwidth Input and output impedances Zins Zous Slewrate SR Frequencydependent commonmode rejection ratio CMRRQ Frequencydependent powersupply rejection ratio PSRRQ Input noise We will introduce the opamp characteristics and imperfections through application examples Application circuit examples 1 Basic inverting gain circuit example e ects of finite A0 finite rm and non zero r0 V0 Figure 21 Basic invertinggain application circuit Assuming an ideal opamp the closedloop gain of the circuit in Fig 21 is well known ACLidea1 Vo Vi RzR1 Analysis of ideal negative feedback opamp circuits such as the example of Fig 21 is usually based on the fact that the ideal opamp with very large openloop gain forces the and input voltages to be equal For example in the circuit of Fig 21 v v 0 and the input of the opamp is called the virtual ground Suppose that the opamp in Figure 21 has a nite openloop gain A0 It is of interest to nd the effect oon on the closedloop gain ACL A model of the opamp with finite A0 and all other characteristics ideal is shown in Fig 22 Figure 22 Model of an opamp with finite A0 Applying this model in the circuit of Fig 21 we obtain the circuit model in Fig 23 t quot Figure 23 Model ofthe circuit in Fig 21 using an opamp with nite A0 Solving the circuit model in Fig 23 yields the closedloop gain R1 A v0 RA 0R1R2 ACL T R Vi K ROMA 1 0R1R2 It is instructive to note that the closedloop gain is in the form T ACL AOL ideal m a where T AoRlR1Rz is the loop gain in the negativefeedback circuit of Fig 23 Note that the loop gain represents the total gain for a signal starting from a point in the feedback loop to the same point around the loop Analysis and computation of the loop gain T will be addressed in more detail later Comments Opamps are usually constructed with a relatively large openloop gain A0 eg A0 gt 104 80dB The openloop gain of an opamp can vary signi cantly from one component to another or over temperature bias or other operating conditions As a result op amp application circuits are rarely based on a precise value of A0 The closedloop gain of a negativefeedback application circuit is close to the ideal value independent oon as long as the loop gain T is much larger than 1 In other words as long as A0 is large enough so that T is much larger than 1 the exact value of A0 is not important The loop gain T is smaller in an application that requires a larger magnitude of the closedloop gain 139e a larger RzRl Therefore an application circuit with a larger closedloop gain is more sensitive to variations in the opamp openloop gain A0 Suppose that the opamp in Figure 21 has a nite openloop gain A0 a nite input resistance rm and a nonzero output resistance ram A model of the opamp with these imperfections is shown in Fig 24 Figure 24 Model of an opamp with nite A0 Applying this model in the circuit of Fig 21 we obtain the circuit model in Fig 25 t quot Figure 25 Model of the circuit in Fig 21 using an opamp with nite A0 nite rm and nonzero row A feedbackcircuit analysis technique to be studied later can be used to obtain the closedloop gain by inspection r r A A I out In CL CL39de 11T r0 122 121 Hrm rm 121 1T where the loop gain T is given by R1 rm 0 R1 R2 rout and ACLdea1 RzR1 You may want to verify the result for ACL using standard circuit analysis techniques T Comments 0 If the loopgain T is very large the closedloop gain is close to the ideal value independent of A0 rm or ram An opamp with a very large openloop gain A0 so that T is very large can be used to construct precise negativefeedback application circuits even though it may have signi cant imperfections in rm or ram Large gain is the most important characteristic of an opamp 0 Finite rm and nonzero r0 tend to reduce the loop gain in application circuits requiring a larger A0 to achieve large loop gain values 0 The parameters A0 ram rm are smallsignal parameters 7 they apply to small signal variations of voltages and currents around a DC operating point 2 Static transfer characteristic output voltage swing The ranges of output and input voltages such that an opamp operates with a large small signal openloop gain A0 are constrained by the supply voltages VDD and V33 On the output side the saturation voltages VOWn and Vomax de ne the available output voltage swing A typical static transfer characteristic of an opamp is shown in Fig 26 V0 VDD Vania mtput voltage swing VGVVHVK lt V0 lt VUVVKHX islope Aa V VG VOVVHVK Vss Figure 26 Static transfer characteristic of an opamp In a typical opamp due to the limitations of the transistors in the output stage the output voltage swing is smaller than the supply voltage range Vomax lt VDD and VOWn gt VSS Using more advanced circuit design techniques it is possible to achieve an output voltage swing approximately equal to the supply voltage range Vomax m VDD and VOWn m VSS Such opamps are said to have a rail to rail output voltage swing which is particularly advantageous in lowvoltage applications where achievable signalto noise ratios can be limited by the available supply voltages 3 A positive feedback circuit example Consider the circuit of Fig 27 which is the same as the basic inverting ampli er of Fig 21 except that the opamp inputs have been swapped R2 Figure 27 A positivefeedback circuit Assuming v1 0 Figure 28 shows a graphical analysis of possible DC operating points in this circuit the opamp transfer characteristic overlaps the DC transfer characteristic of the feedback circuit around the opamp V0 VR1RzR1 V Figure 28 Graphical analysis of the possible DC operating points in the positive feedback circuit of Fig 27 There are three intersections of the two curves ie there are three possible DC operating points If the circuit operates at the operating point a Le assuming that v 0 results in V V0 0 the ideal closedloop gain of the circuit in Fig 27 would be RzR1 the same as in Fig 21 However consider an arbitrarily small perturbation AV in V around the operating point a In a practical circuit this perturbation from internal noise or offset imperfections or from external disturbances would be unavoidable The graphical analysis in Fig 28 shows that the operation of the circuit diverges from point a to one of the saturation limits at point b or at point c depending on the sign of the disturbance In conclusion the DC operating point of the positive feedback circuit in Fig 26 is at one of the two saturation limits not at the point a where the closedloop smallsignal gain ideally equals RzR1 Finally we note that the small signal closed loop gain at point b or c is zero a smallsignal input voltage v AV results in no output voltage variations v0 AVG 0 Comments 0 The ideal opamp circuit analysis based on v v holds only for negative feedback application circuits and under the assumption that the opamp operates with very large openloop voltage gain A0 away from the saturation limits Negativefeedback is used to construct ampli ers and other linear application circuits Stability of negativefeedback circuits is an important topic which will be addressed later In positivefeedback circuits the nonlinearity of the opamp transfer characteristic such as the saturation limits must be included in the analysis to nd possible DC operating points Positivefeedback is used to construct circuits such as voltage comparators or oscillators

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