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Renewable & Power Electronics Laboratory

by: Mrs. Lacy Schneider

Renewable & Power Electronics Laboratory ECEN 4517

Mrs. Lacy Schneider

GPA 3.9

Robert Erickson

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Robert Erickson
Class Notes
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This 50 page Class Notes was uploaded by Mrs. Lacy Schneider on Thursday October 29, 2015. The Class Notes belongs to ECEN 4517 at University of Colorado at Boulder taught by Robert Erickson in Fall. Since its upload, it has received 26 views. For similar materials see /class/231785/ecen-4517-university-of-colorado-at-boulder in ELECTRICAL AND COMPUTER ENGINEERING at University of Colorado at Boulder.



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Date Created: 10/29/15
Lecture 7 ECEN 45175517 Experiment 4 part 2 flyback feedback loop 12 VDC HVDL azu 200 VDC mum DC AC wirymu inverter ACI d 0a Battery L leukd Hbn39dge Vang 120 Vrms 11 ma quot39 60 Hz SierUP dd0 00quot Verter DC AC inverter H bridge With Isolation flyback Feedback controller to regulate H VDC ECEN 4517 1 Due dates Right now Prelab assignment for Exp 4 Part 1 one from every student Due within five minutes of beginning of lecture This week in lab Feb 2628 Definitely finish Exp 3 and begin Exp 4 Next week in lecture Mar 4 Prelab assignment for Exp 4 Part 2 one from every student Next week in lab Mar 46 Exp 3 final report due ECEN4517 2 Goals in upcoming weeks Exp 4 A threeweek experiment VHVDC Exp 4 Part 1 Design and fabrication of flyback transformer Vbau E Snubber circuit quot Demonstrate flyback converter power stage operating open loop Vref Exp 4 Part 2 Design feedback loop Measure loop gain compare with simulation and theory Demonstrate closedloop control of converter output voltage ECEN4517 3 Introduction the need for feedback vgltr Output voltage of a switching converter depends on duty cycle d input voltage vg and load current iload Switching converter Switching converter Load rm Jl two V0 P Transistor gate driver 60 6 Pulse width V t VgU dTS TS lload We want to maintain a xed it regardless of load or vgt dt ECEN4517 gt Control input v0 fvg gm d Disturbances A Negative feedback a switching regulator system Power Switching converter Load input JLL lload Sensor gain Transistor Error gate driver Signal 3 Pulsewidth Vc modulator GCS Compensator Reference input Vref ECEN4517 5 Transfer functions of some basic CCM converters Table 82 Salient features of the smallsignal C CM transfer functions of some basic dcdc converters Convener Ggo Gdo 00 0 Q 00 z buck D 7117 R g 00 boost 5139 7L DIR LL21a buckboost g39 7 DIR DD where the transfer functions are written in the standard forms 1 i ml Gas at 2 Gas Ggo S 1 S 2 1 S 1Q000HO Qmo DO Fzback push L and Cto same side of transformer then use buckboost equations DC gains 690 and Gdo have additional factors of n turns ratio ECEN4517 6 Bode plot controltooutput transfer function buckboost or yback converter example 80dBV G d ll GvdH v A Gvd 60 dBV quotG 2 d0 455M iQ4gt12dB 40 dBV f0 20 dBV 39 1042inJ 00 300 HZ 0 dBV 0 20 dBdecade 20 dBV 90 40 dBV 180 533 Hz 270 0 270 10 HZ 100 HZ 1 kHz 10 kHz 100 kHz 1 MHZ ECEN4517 7 The loop gain Ts LOOP gain NS product 5 Switching converter Load of gains around the I I I mm feedback loop rim More loop gain llTl Vg 1E v v leads to better regulation Sensor of output voltage gain Transistor Error gate driver Signal 5 Compensator Reference input Ts Gvds Hs Gcs VII Gvds power stage controltooutput transfer function PWM gain 1VM V pkpk amplitude of PWM sawtooth ECEN4517 8 Phase Margin A test on Ts to determine stability of the feedback loop The crossover frequencyfc is defined as the frequency where llTj2rrfcll1gt OdB The phase margin pm is determined from the phase of Ts atfc as follows pm 2 180 4Tj2rtfc If there is exactly one crossover frequency and if Ts contains no RHP poles then the quantities Ts1Ts and 11Ts contain no RHP poles whenever the phase margin pm is positive ECEN4517 9 Example a loop gain leading to a stable Closedloop system 60 dB T H T L T 40 dB f p1 f Crossover 20 dB z frequency 4 T fa 0 dB Z 0 20 dB 90 A 17 Pm o 40 dB 180 2700 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz f LTj2nfc 112 pm 2 180 112 2 68 ECEN4517 10 Example a loop gain leading to an unstable Closedloop system 60 dB T H T L T 40 dB f 1 p Crossover 20 dB quot frequency 4 T 122 ft 0 0 dB 0 20 dB 90 40 dB 1800 pm lt 0 270 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz LTj2nfc 230 pm 2 180 230 50 ECEN4517 11 Transient response vs damping factor 2 W 1 05 0 0 5 10 15 not radians ECEN4517 12 Q vs Pm 20 dB 15 dB 10 dB 5 dB OdB Q1gt0dB cPm 5 dB 10 dB 15 dB 20 dB ECEN4517 13 Compensator circuit Converter vom 12V to pin 2 of UC3525 AA VV 10kg 42V 39 V re Integral controller Next prelab Select compensator element values ECEN 4517 Design feedback loop ECEN 5517 possibly with more complex compensator ECEN4517 14 Compensator circuit 40 dB II T H A T 20 dB 0 dB Tll on 40 dB 900 A T 7180 7270 10 Hz 106 Hz 1 lez 101lltHz I 100 kHz 1 MHz Obtain crossover frequency having good phase margin ECEN4517 15 Effect of transformer leakage inductance Lg Tramformermodez Leakage inductance Lz is caused by imperfect coupling of primary and secondary windings Leakage inductance is effectively in series with transistor 01 QLI When MOSFET switches off it VT interrupts the current in Le Lz induces a voltage spike across 01 via 1332535 leakage inductance W Lz If the peak magnitude of the d Vg t W voltage spike exceeds the 1R voltage rating of the MOSFET On f then the MOSFE T Will fail DT ECEN4517 16 Protection of Q1 using a voltageclamp snubber Snubber provides a place g for current in leakage F lyback transformer C inductance to flow after 5 V S gt S C R i V 01 has turned off V 39 g C 1 Peak tranSIstor voltage IS Q1 clamped to V9 vS E VTU VS gt Vn Energy stored in leakage inductance plus more is transferred to capacitor Usually CS is large CS then dISSIpated In HS Decreasing HS decreases the peak transistor voltage but increases the snubber power loss See supplementary flyback notes for an example of estimating CS and HS ECEN4517 17 Overvoltage on output diode Diode turnoff reverse reco very Transformer model L22 transition Transformer leakage inductance causes voltage w o ringing and overshoot on secondary diode Leakage inductance plus diode output capacitance form resonant crrcurt eakage L inductance 30 Area iLt Qr secondary induced v0tage VLO diode Silicon capacitance V30 via 1 diode T ECEN4517 18 Diode snubber Damp the ringing With HC snubber network L Transformer model Le2 D 1 rm LI 39 v I a I VI I lg n l 1n v32 I I LM Diode snubber C R 4 v lt Vg QLI VT Snubber capacitance similar in value to diode capacitance Snubber resistance similar in value to resonant circuit characteristic impedance More capacitance andor smaller resistance gt lower peak voltage larger snubber loss ECEN4517 19 Lecture 5 ECEN 45175517 Buck converter I l 75 6 6 I V JL L 1 limit PV IN C1 C2 Vbatt I I High side 300 th gate driver POW Supply W Pulsewidth Micro modulator controller sensors Buck converter Peak power Battery tracking and current and Peak power tracker battery voltage charge Batter charging control ECEN 451 7 Goals in upcoming weeks This week Exp 3 week 2 Finish Exp3 part 1 with buck converter operating outside with PV panel Start Exp3 part 2 digital control with the MSP430 microcontroller Next week Exp 3 week 3 Demonstrate peak power tracker algorithms outside with converter connected between the PV panel and battery Following week Exp 4 week 1 Finish Exp 3 if not complete Start inverter experiment ECEN 4517 2 What s due this week amp next Right now Prelab assignment for Exp 3 week 2 one from every student Battery current and voltage sensing circuit details Next week in lecture Prelab assignment for Exp 3 week 3 one from every student proposed not experimentally validated void main void code for peak power tracking Late assignments will not be accepted ECEN 4517 3 Experiment 3 Burk mnverjer Exp 3 Part 1 m 1 Demonstrate buck i 39U L Li L Wmquot converter power stage C x C 3 operating open loop Inside with input power supply and resistive load 2 T quotrum I High Xile Bootstrap OutSIdE between panel 11110 l il39 l 0t39 r 39uply and battery PIlxewidfh Micro Scum modulator mumer DC system simulation peaWim n39ur39king and L39lu39rgnf mil buttery mirage 3 1 Exp 3 Part 2 Start this week 5323 Demonstrate openloop control of converter from microprocessor Demonstrate working sensor circuitry interfaced to microprocessor Demonstrate peak power tracker algorithms outside with converter connected between the PV panel and battery ECEN 4517 4 TI MSP43O Microcontroller MSP430X16X ECEN 451 7 5 AnalogtoDigital Converters There are eight multiplexed AD channels labeled A0 through A7 in the pinout diagram Some of these pins are shared with other functions AD channels A6 and A7 will not be used because their pins are used for DA outputs instead AD channels A0 and A1 will not be used because the development board hardwires their pins to the LED and button instead AD channels A2 through A5 are available as usable AD inputs AD channel A2 is connected to the connector pin labeled P62 In the project files the sampled voltage appears in the variable Adcdata0 AD channels A3 A4 and A5 are connected to connector pins P63 P64 and P65 respectively In the project files the sampled voltages of these pins appear in the variables AdcData1 AdcData2 and AdcData3 These inputs convert voltages in the range 0 to 25 V Do not apply voltages exceeding 33 V or negative voltages to these pins ECEN 4517 6 Additional Peripherals Digitaltoanalog converter There are two DA converter channels DACO and DAC1 Channel DACO is connected to pin P66 of the connector In the project files the voltage at this pin is controlled by writing to the DACO data register DAC12ODA T Channel DAC1 is connected to pin P67 of the connector In the project files the voltage at this pin is controlled by writing to the DAC1 data register DAC121DA T Timerl PWM TimerA is used to generate pulsewidth modulated waveforms In the project files TimerA output TA1 is used to output a PWM waveform which appears on pin P16 The duty cycle of this waveform is controlled by writing to the global variable DO In the project files TimerA output TA2 is used to output a PWM waveform which appears on pin P17 The duty cycle of this waveform is controlled by writing to the global variable D1 LED and button There is a small LED on the development board which is connected to pin P60 The LED can be controlled by writing to bit 0 of peripheral 6 The pushbutton on the development board is connected to pin P61 The state of the pushbutton can be read in a similar manner ECEN 4517 7 Olimex Dev Board Schematic UR133U Lmn 3amp3 U2 3931 pu R51 2 f in PHRJHEK 551 g 21a1z ESI 035 4 13 quot R55 17BuF16UDD 2 gquot 1K ESEm man 47urszu R5232 Tim TiDUT YZIN TZDUY MDJT mm nzwr mm umum COPYRIGHT D 235 OLIHEX LTD 3 srazezcn hupuuunlimaxzamdsv uzpuR 33 M u RSTNHI PLBYHELK lean P6 0A0 9 LED PZMIRELK P2 Y ELK PZ2ERDUT lamcm lamcm lamnus P26 DELK Dunne Flamm p37unxm P1B1B Project Software Files mainc contains the system startup routine and the main system loop This is where all of your code goes You can access all 4 active ADC channels AdcDatax DACO DAC1 D0 D1 the LED on P6OUT bit 0 and the pushbutton periphc contains configuration subroutines for all used peripheral devices as well as some routines for starting and stopping peripherals periphh provides function prototypes for the externally callable functions in periphc configh contains system and board constants and some typedefs msp430x16xh is Tl39s provided include file and contains define39d register names and constants for the MSP430 All of the names match those in the family datasheet ECEN 4517 9 Con guring the IO Ports V port P5 PGO to P65 inputoutput with SchmitItrigger PesEL Direction Control From Module 0 Input Module X oUT ll1Oulpul 47 PIS g l j l aus Keeper Setup in systemlnit mainc Configure inputoutput eg Port6 P60 LED output Module XIN 4 P62 65 ADCZADCS inputs P6667 DACO and DAC1 outputs PSSEL BT2 BT3 BT4 BIT5 BT6 BIT7 P6DR BITO BIT6 BIT7 ECEN 4517 Tutorials Tutorial 1 LED Getting started with the programming environment IAR Hardware setup MakeRun code debugging steps and breakpoints blink an LED Tutorial 2 PWM controller Modify the project software files to realize a digital PWM Utilize ADC DAC and TimerPWM peripherals ECEN 4517 ll Exp 3 Part 2 Digital PWM quotLINCREMENT Mugsan xde n m vnid maW K vnid ms systeanmtO 39 1 Cantra aigammu am Mr temrLAdzo AdzDataLE tempiadzn PWMINCREMENT 139de lt E 1 a 2m am gt 2 I MSPAKU Du ECEN 4517 Exp 3 Part 2 PV Peak Power Tracking Current amp Voltage sensing Buck converter R S Battery voltage sense Battery current A3 sense TC427 Driver IR2111 Halfbridge gate driver MSP430 Eval Board A4 Be careful With twisted pair lines grounding ltering MSP430 protection etc 13 ECEN 451 7 Maximum Power Point Tracking Perturb and Observe PampO Initialize ronlrol Initialize inrremenl A wellknown approach Works well it properlytuned When not well tuned maximum power point tracker MPPT is slow and can get confused by rapid changes in operating point A common choice control is switch duty cycle ago71m mrremeu r mrremem romrol ronlrol inrremenl Wait for system to settle Lecture 2 ECEN 4517 5517 Experiment 1 Photovoltaic System Characterize the 8085 PV panels and find numerical values of model parameters for use now and later in semester Test the inverter provided Charge the battery from the panel using the Direct Energy Transfer method Hope for sun Experiment 1 to be performed this week weather permitting lf weather is poor then do Exp 2 pulsewidth modulator this week instead and do Exp 1 next week Final reports for both Exp 1 and Exp 2 due at beginning of lab on Feb 35 ECEN 4517 1 Lab reports o One report per group Include names of every group member on first page of report Report all data from every step of procedure and calculations Adequater document each step Discuss every step of procedure and calculations Interpret the data It is your job to convince the grader that you understand what is going on with every step Regurgitating the data with no discussion or interpretation will not yield very many points Concise is good ECEN 4517 2 Photovoltaic cell model Dquot P V cell characteristic Find these parameters I0 Photogenerated current proportional to solar irradiation estimate constant having units of AWm2 IDSS Exponential diode characteristic related to V0C RP Shunt resistance typically large RS Series resistance typically small ECEN4517 11 1 1 18 cells in series Hgt gt 42 ltH2 42 Power Electronics Laboratory Shell Solar SQ85 panel 18 cells in series Hgt Igt 36 seriesconnected PV cells 2 backplane diodes 85 W at 1000 Wm2 Apparent path of sun through sky Baseline Rd is 40 N Times are not corrected for location of Boulder in Mountain Time Zone Net panel irradiation depends on coscp with a o 0 SOLAR ALTTUDE q angle between panel direction and direction to sun 105 75 so 45 so 15 0 3o 45 450 75 so 105 120 SO take your data SOLARAZIMUTH ECEN 4517 5 Laboratory facilities mobile PV cart Inverter 60 Hz 300 W 120 Vrms V 85 ka 6 outlet PV ac power strip 172 v at 495 A panel D Alarm Shell SQ85P Battery low voltage A Voltmeter I leJ o Battery voltage Battery Battery 12 V I deep discharge L a I 56 A hr g 39 2 a 15 I 39 Battery 1 E 12V charger Off cart D 12V on stationary workbench Isolated dc dc 8 converters DeepDischarge LeadAcid Batteries I Concorde AGM Battery Theory and mOdellng Of Expected Life Cycles 10000 batteries 7 rrrr Don t overcharge this causes 50001 outgassing and can quickly 20007 7 7 r V r 7 7 r r r ruin the battery 83 Don t discharge below 50 g SOC this reduces battery life 500 Depth of Discharge Battery state of charge SOC vs terminal voltage 100 SOC 1280 volts or greater 75 SOC 1255 volts 50 SOC 1220 volts 25 SOC 1175 volts 56 Amperehour 0 SOC 1050 volts t 9 Upcoming weeks Design and build inverter system Exp 3 Stepup dcclc converter and closedloop control 12 VDC WC 120 200 VDC DC DC DC AC converter inverter AC load Battery L Isolated 120 Vrms flyback T 60 HZ I Feedback Vref controller Exp 2 analog Exp 4 Inverter and controlPWM digital controller CIrCUItry ECEN 4517 3 HOW a pulseWidth modulator works VM vsaw Sawtooth v t E vsawa c wave generator comparator 0 61 6 A analog input P WM I waveform V00 0 dTS TS ZTS 39 Power Electronics Laboratory Equation of pulseWidth modulator For a linear sawtooth waveform do for o s 1160 5 VM So dt is a linear function of vct Power Electronics Laboratory Vsaw vc Z Nquot 0 6m A Simplified Block Diagram of Oscillator 51 VReference Vrzf 74 kg 1 Current Sawtooth Ramp signal VT IEE 3 9 991 E9 9 9 Vmax 51VA 33 V I l4 kg74kg RT 2 k9 ll 14 kg min 51 V Power Electronics Laboratory Zlel14kQ74kQ 39 0V VT T l hence i T T dt dt CT VM 7 mec7 VVVHVL I CT llt gtllt gtl Charge interval tC I charges CT D1scharge Interval tD RD discharges CT 4 l Switching period TS Blanking pulse causes driver outputs to be low so that de s to Increasing RD reduces maximum allowed duty cycle Dmax Error Amplifier UC1525A Error Ampllfler 1 9 2 to PWM comparator model v 1 1 Transconductance amplifier 2 V 2 iner Elecfmmcs Lab Error Amplifier with Load V1 grimV1 Zs I V2 V9 ngSV2 V1 The differential voltage gain is ngs With large Zs the differential voltage gain is large The data sheet specifies a lowfrequency differential voltage gain of at least 1000 60 dB Power Electronics Lab Connect to produce adjustable D pin 16 Vref V 439quot toPWM comparator internal Zs external pot The error amplifier is connected as a unitygain stage vcomp V The duty cycle D can be adjusted by the external pot Power Electronics Lab Outputs of the UC3515A 13 VC iP39 OP ip op output Q output1 output Q Output B 11 14 output of P WM 7 T t compara or N 1 Frequency of the outputs is one halfthe oscillator frequency Duty cycle cannot be greater than 50 Output of PWM comparator Flipflop output Q Flipflop output 6 Output A Such outputs are needed in some types of switching converters such as pushpull Output B Outputs A and B can be ORed to restore the PWM pulses at the oscillator frequency Power Electronics Lab Driving a Power MOSFET Switch Drain Gati I E Vgs Source Power MOSFE T Power Electronics Lab Drain gd 30 pF Gate C d Source MOSFE T capacitances MOSFET is off when Vgs lt Vthz 25 v MOSFET fully on when vgs is sufficiently large 1015 V Warning MOSFET gate oxide breaks down and the device fails when vgs gt 20 V Fast turn on or turn off 10 s of ns requires a large spike 1 2 A of gate current to charge or discharge the gate capacitance MOSFET gate driver is a logic buffer that has high output current capability Driving a Power MOSFET Switch decou in C p g rest of the converter Circuit Drain PWM pulses 0m UC3525A Source Gate driver MOSFET gate driver is used as a logic buffer with high output current 15 A capability The amplitude of the gate voltage equals the supply voltage VCC Decoupling capacitors are necessary at all supply pins of UC 3525A and TSC427 Power Electronics Lab


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