Microelectro Circuit Lab
Microelectro Circuit Lab ECE 3042
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This 0 page Class Notes was uploaded by Cassidy Effertz on Monday November 2, 2015. The Class Notes belongs to ECE 3042 at Georgia Institute of Technology - Main Campus taught by Thomas Brewer in Fall. Since its upload, it has received 17 views. For similar materials see /class/233892/ece-3042-georgia-institute-of-technology-main-campus in ELECTRICAL AND COMPUTER ENGINEERING at Georgia Institute of Technology - Main Campus.
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Date Created: 11/02/15
ECE3042 Lab Report and Homework Guidelines Homework 0 The first page ofthe homework is a cover sheet in the specified format 0 Homework is due in lab at the beginning ofthe period 0 Label all figuresgraphs with a descriptive title ie quotGain versus frequency for common emitter amplifierquot Don t use the problem number as a title 0 If a graph has multiple traces each trace must be labeled with a descriptive title ie collector voltage not V1 You may title and label by hand after printing 0 Make sure that all SPICE plots display the timedate stamp 0 Include the circuit schematic or SPICE deck for each circuit analyzed with SPICE 0 Place your picture on every Multisim Cadence and Mathcad assignment 0 Show all calculations and clearly label all numerical results 0 Draw a box around all results Lab Report 0 Place your picture as the first figure 0 Reports are due at the beginning ofthe lab period a week after the experiment is performed 0 The lab reports are not formal but they are organized They should clearly present your experimental results and any requested calculations 0 The first page of your lab report must be the verification sheet 0 As you complete each procedure in the lab have your results verified by a lab instructor You must show the instructor all screen captures and measurements and you must demonstrate the circuit You will not receive a check off with only screen captures 0 To receive full credit on the report your verification sheet must be signed by your lab instructor Dr Brewer or Dr Robinson Instructors for other lab sections or open lab instructors may not sign it To obtain a signature you must complete the required number of procedures during your scheduled lab period or work on the experiment for your entire scheduled lab period It is your responsibility to obtain this signature before leaving the lab 0 An example ofthe required report format is attached There are six blocks per page Each block may contain calculations plots or measurements Each block has a descriptive title Any calculations associated with a screen capture may be placed in the block with the capture or in an adjacent block Each screen capture must have a timedate stamp and barcode Use margins of 05quot on all sides ECE 3042 Checkoff Requirements for Experiment 1 Make sure you have made all required measurements before requesting a check off For all check offs you must demonstrate the circuit or measurement to a lab instructor All screen captures must have a timedate stamp 1 Breadboard Preparation V Power supply connected to breadboard binding posts V 100 ohm resistors in series with binding posts to positive and negative rails on breadboard V Wire from ground post to ground rail on board V Decoupling capacitors in place and correctly oriented 4 Bias V Collector base and emitter voltages and collector current recorded 5 6 Gain and Frequency Response V Oscilloscope screen capture showing input and output signals and Vpp measurements for each signal V Calculation of the gain V Plot of gain versus frequency made with HPVEE LabView or by hand with 3dB frequencies and midband gain labeled and their values recorded 7 Clipping V Screen capture showing soft clipping on output and measured positive and negative peak amplitudes can use max and min functions on scope V Screen capture displaying hard clipping on output and measured positive and negative clipping levels can use max and min functions on scope V Screen capture of XY plot when amplifier is clipped V Calculation of slope of XY plot use scope cursors 8 Spectral Analysis V Screen capture showing fundamental and distortion components V Screen capture after adjusting pot to maximize amplitude of fundamental but eliminate distortion components V Measured circuit gain after pot adjustment V Measured pot value disconnect pot from circuit before measuring Georgia Institute of Technology School of Electrical and Computer Engineering ECE 3042 Microelectronic Circuits Laboratory Verification Sheet NAME SECTION GT NUMBER GTID Experiment 1 Single Stage Amplifier Procedure Time Completed Date Completed Verification Must Points Points demonstrate Possible Received circuit 1 Breadboard Prep 20 4 Bias 20 56 Small Signal Gain and Freq 20 Response 7 Clipping 20 8 Spectral Analysis 20 To be permitted to complete the experiment during the open lab hours you must complete at least four procedures during your scheduled lab period or spend your entire scheduled lab session attempting to do so A signature below by your lab instructor Dr Brewer or Dr Robinson permits you to attend the open lab hours to complete the experiment and receive full credit on the report Without this signature you may use the open lab to perform the experiment at a 50 penalty SIGNATURE DATE Exp 1 Common Emitter Amplifier 161 Bias Measurements Tom Brewer 1 Collector Voltage 728 V Base Voltage 207 V Emitter Voltage 142 V Collector Current 1572810k0773 mA Section 162 Small Signal Gain Gain651141462 Section 163 Frequency Response 9 Stop 1 GTECEIZ a mum unmar sauce mm mmmw 39 V M W m m man my a n m n 39 A 4 1 IN JEJA 79 7 Q magnum DWW quot39 quot39 quotquot 39 quot 393 ChIRMS 141mv C12RMS 65mV JAM quot l500mV 01Cth 200v lMl400psl AlEXlIOJ39 140 l 24Aug 2008 7 72000011 193611 MnHum mgwmmmmam mun mmxnrm r lbw ma gggmggmgmgm I my W 1 mnmwwummmm m Section 163 Frequency Response Section 164 LargeSignal Clipping Behavior 39 1 Te Slop l GTECEIZ a m Ch RMS 133mV From Bode Plot CIIZ Max 500V Midband Gain dB0920og1020203325 Midband 1 V I Gain linear46 Bk fr 4 x X x v 93816113 Lower 3db 66Hz H h a 394 Upper 3db360k h1l 200mv 81111 100 lMl400psl Aim10139 140 1 24 Aug 2008 9 39 ii 720000115 1 1 3247
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