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Intro to Computer Engr

by: Cassidy Effertz

Intro to Computer Engr ECE 2030

Cassidy Effertz

GPA 3.64


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Class Notes
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This 0 page Class Notes was uploaded by Cassidy Effertz on Monday November 2, 2015. The Class Notes belongs to ECE 2030 at Georgia Institute of Technology - Main Campus taught by Staff in Fall. Since its upload, it has received 14 views. For similar materials see /class/233900/ece-2030-georgia-institute-of-technology-main-campus in ELECTRICAL AND COMPUTER ENGINEERING at Georgia Institute of Technology - Main Campus.



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Date Created: 11/02/15
K INTRO TO COMP ENG CHAPTERX CHAPTER IX1 REGISTER BLOCKS f CHAPTER IX REGISTER BLOCKS COUNTERS SHIFT AND ROTATE REGISTERS READ PAGES 249275 FROM MANO AND KIME K K INTRO TO COMP ENG REGSTER BLOCKS CHAPTER I REGISTER BLOCKS REGISTER BLOCKS INTRODUCTION J K Like combinational building blocks we can also develop some Simple building blocks using registers These include Shift registers Rotate registers Counters Implementations of these components can use state machines but it is often easier to think of them without the complication of a state machine x RM Dansereau V10 KINTRO TO COMP ENG oREGISTER BLOCKS NTRODUCTON REGISTER BLOCKS INTRODUCTION Logical shift registers take the bits stored and move them up a significant bit or down a significant bit MSB LSB LOGICAL SHIFT RIGHT o gt gt gt LSR Cout Sign bit ARITHMETIC SHIFT RIGHTreplicationI Ti gt gt gt ASR Cout LOGICAL SHIFT LEFT lt i lt lt o LSL Cout ARITHMETIC SHIFT LEFT lt i lt lt o ASL cOUIt Notice that logical and arithmetic shift lefts are the same K RM Dansereau V10 KINTRO TO COMP ENG oREGlSTER BLOCKS CHAPTER IX4 SHFT REGISTERS NTRODUCTON REGISTER BLOCKS LSR SAMPLE A simple implementation of a logical right shift register might look like the following MSB LSB 0 D D D D O O O I Q Q Q Q Shift l l l I CLK 39 l 39 l 39 l 2n 1 2n 2 zn 3 z0 K RM Dansereau V10 KINTRO TO COMP ENG oREGlSTER BLOCKS CHAPTER IX5 SHFT REGISTERS NTRODUCTON REGISTER BLOCKS ASR SAMPLE LSR SAMPLE An arithmetic right shift register might look like the following MSB LSB D 0 D D D o o o 39 AQ o A0 A0 A0 Shift l l l l CLK 39 39 l 39 i ll 2n 1 2n 2 zn 3 k RM Dansereau V10 KINTRO TO COMP ENG SHIFT REGISTERS SHFT REGISTERS NTRODUCTON CHAPTER lX6 LSR SAMPLE REGISTER BLOCKS 439BIT BIDIRECTIONAL ASR SAMPLE lt o The following is a 4bit bidirectional shift register with parallel load X3 X2 X1 X0 Xl Xr l l l 39 3210 5210 321 3210 4x1 4x1 4x1 4x1 MUX MUX MUX MUX CO v 01 D ED ED D Qu Q Q Q o CLK i i i i 23quot 22V 21V zoll k RM Dansereau V10 KINTRO TO COMP ENG oSHlFT REGISTERS CHAPTER IX7 LSR SAMPLE ASR SAMPLE REGISTER BLOCKS 4BT BIDIRECTIONAL K Cascading of shift registers can also be done if the discarded bit is used to shift into another shift register module For instance the 4bit bidirectional shift register previously presented can be easily cascaded using the X right shift data input and X left shift data input X3 X2 X1 X0 X C 0 4bit bidirectional I c1 shift register Xr 23 z2 Z1 Z0 4 RM Dansereau V10 KINTRO TO COMP ENG oSHlFT REGISTERS CHAPTER lx39s 3TTS DAIIEIE3TIONAL REGISTER BLOCKS CASCADING 2 CASCADNG J o For example an 8bit bidirectional shift register With parallel load can be formed as follows X7 X6 X5 X4 Xr X3 X2 X1 X0 XI 00 01 C X3 X2 X1 X0 C X3 X2 X1 X0 X 0 4bit bidirectional quot39 0 4bit bidirectional c1 shift register X r 01 shift register X r 23 z2 Z1 Z0 23 z2 Z1 2o I V V V V ll 27 Z6 Z5 24 23 22 21 20 x RM Dansereau V10 KINTRO TO COMP ENG oSHIFT REGISTERS CHAPTER lx39g 3TTS DAIIEIE3TIONAL REGISTER BLOCKS INTRODUCTION CASCADNG A rotate register is the same as a logical shift register except that the discarded bit is fed back into the empty space from the shift MSB LSB ROTATE RIGHT Lpi gt i pl ROTATE RIGHT WITH CARRY Lgti gt i gtgt ROTATE LEFT M 4 H ROTATE LEFT WITH CARRY L i 4 i454 K RM Dansereau V10 k KINTRO TO COMP ENG CHAPTER IX10 REGISTER BLOCKS ROTATE REGISTERS USING SHIFT REGISTERS SH FT REGISTERS ROTATE REGISTERS INTRODUCTION Rotate registers can actually be implemented using shift registers that have serial data inputs such as the 4bit bidirectional shift register discussed For example a 4bit rotate register can be formed as follows X3 X2 X1 X0 X3 X2 X1 X0 C c X 0 0 4bit bidirectional c1 c1 shift register Xr 23 22 Z1 20 1 II II II II 23 22 Z1 20 RM Dansereau V10 KINTRO TO COMP ENG SHFT REGISTERS CHAPTER IX11 ROTATE REGISTERS NTRODUCTON REGISTER BLOCKS USNG SHIFT REGISTERS K o A counter is a register that on each clock pulse counts up or down usually in binary Types of counters ripple counters synchronous counters binary counters BCD counters Graycode counters Ring counters a 1 moves in a ring from one flipflop to the next updown counters ability to increment or decrement counters with a parallel load load in starting value with parallel input K RM Danscrcau V10 KINTRO TO COMP ENG CHAPTER IX12 REGISTER BLOCKS COUNTERS MODULOP COUNTERS A modulop counter is defined by the following equation St 1 82 x modp k RM Dansereau V10 SH FT REGISTERS ROTATE REGISTERS COUNTERS INTRODUCTION The state diagram for the modulop counter is as follows J KINTRO TO COMP ENG ROTATE REGISTERS CHAPTER IX3913 COIWIEEEECTION REGISTER BLOCKS RIPPLE AND SYNCHRONOUS MODULOP COUNTERS K An n bit binary counter consists of n flipflops and can count in binary from 0 through 2 7 1 This can be formed with a modulop counter where p 2 7 Two main categories exist for counters Ripple counters One flipflop transition serves to trigger other flipflops The clock pulse is usually only sent to the first flipflop This requires a memory cell that can complement its value The JK flipflip would be one approach we have not studied this Synchronous counters Change of state is determined from the present state Clock pulse sent to all flipflops K RM Danscrcau V10 KINTRO TO COMP ENG oCOUNTERS CHAPTER IX14 NTRODUCTION MODULOP COUNTERS REGISTER BLOCKS RPPLE amp SYNCHRONOUS A toggle cell will be useful for implementing counters CE Count Enable Transparent Transparent OUT Latch Latch CLEAR47 l 4 1 12 Present CE CLEAR Next OUT Latch Value Latch Value Toggle cell X X 0 0 CE 0 0 1 0 0 OUT 1 0 1 1 1 CLEAR 0 1 1 1 0 1 4 2 1 1 1 0 1 l I K RM Danscrcau V10 KINTRO TO COMP ENG oCOUNTERS CHAPTER lx15 MODULOP COUNTERS RPPLE amp SYNCHRONOUS REGISTER BLOCKS RIPPLE COUNTER TOGGLE CELL o The toggle cell can be used as follows to form a ripple counter CE Count Toggle cell LToggle cell LToggle cell Toggle cell Enable CE CE CE CE OUT OUT OUT OUT CLEAR CLEAR CLEAR CLEAR 1 2 1 2 1 2 1 2 11 I I I 4 2 CLEAR V II v v Z0 Z1 z2 23 Notice that the previous toggle cell is connected to the clock input of the next cell This causes the bits to ripple through the counter K RM Danscrcau V10 KINTRO TO COMP ENG oCOUNTERS CHAPTER IX16 RPPLE amp SYNCHRONOUS TOGGLE CELL REGISTER BLOCKS SYNCHRONOUS COUNTER RIPPLE COUNTER Below is an example 4bit synchronous counter using toggle cells ell L33 Toggle cell Toggle cell Toggle cell Toggle cell CE CE CE CE CE Count OUT 0 OUT 0 OUT 0 OUT Enable CLEAR CLEAR CLEAR CLEAR 1 2 1 2 1 2 1 2 I 1 2 1 2 1 2 1 2 CLEAR V v v 20 21 22 23 Notice that clock is sent to all toggle cells A simplified form is in Figure 511 pp 269 of Mano amp Kime x RM Danscrcau V10 KINTRO TO COMP ENG oCOUNTERS CHAPTER IX17 ltEIEECIEJIRILTER REGISTER BLOCKS MORE MODULOP SYNCHRONOUS COUNT F Notice that the counters developed so far can count from O to 2quot 1 for n toggle cells Therefore for modulep counting the p is currently limited to 2quot How about if we wish p to be a nonpower of 2 Need to build what can be referred to as a divide by counter Given the following counter block a general modulop counter can be constructed by clearing the counter after the desired maximum value CE 4bit counter p1 CLEAR D2 23 z2 Z1 Z0 X RM Dansereau v10 KINTRO TO COMP ENG COUNTERS CHAPTER IX18 RPPLE COUNTER BCD COUNTER MODULOIO 39SYNCHRONOUS COUNT REGISTER BLOCKS MORE ON MODULOP To illustrate general modulop counters consider the following implementation of a single digit decimal counter using BCD CE CE 4bit binary 4 1 4 1 CLEAR counter 12 12 23 z2 Z1 20 CLEAR H TC A V Terminal CountOutput 23 22 21 2O Notice that the counter is cleared after a value of 9 1001 Ks 4 RM Dansereau V10 KINTRO TO COMP ENG oCOUNTERS CHAPTER Ix19 SYNCHRONOUS COUNT MORE ON MODULOP REGISTER BLOCKS TERMINAL COUNT TC BCD COUNTER K o The previous BCD counter was built by deriving a terminal count TC output signal A terminal count output signal for any counter can be useful so we will be included in general block diagram for a binary counter CE 4 4bit binary 1 CLEAR counter 2 TC 23 z2 Z1 Z0 I I Notice TC output In this 4bit binary counter example TC1 only when the output is 1111 K RM Danscrcau V10


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