One technique for limiting fault current is to place
Chapter , Problem 7.27(choose chapter or problem)
One technique for limiting fault current is to place reactance in series with the generators. Such reactance can be modeled in Simulator by increasing the value of the generators positive sequence internal impedance. For the 7.24 case, how much per-unit reactance must be added to G3 to limit its maximum fault current to 2.5 per unit for all 3 phase bus faults? Where is the location of the most severe bus fault?
Unfortunately, we don't have that question answered yet. But you can get it answered in just 5 hours by Logging in or Becoming a subscriber.
Becoming a subscriber
Or look for another answer