We wish to design the amplifier circuit of Fig. 6.36 under

Chapter 6, Problem 6.92

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We wish to design the amplifier circuit of Fig. 6.36 under the constraint that VCC is fixed. Let the input signal vbe = sin t, where is the maximum value for acceptable linearity. For the design that results in the largest signal at the collector, without the BJT leaving the active region, show thatand find an expression for the voltage gain obtained. For VCC = 3 V and = 5 mV, find the dc voltage at the collector, the amplitude of the output voltage signal, and the voltage gain.

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