For a particular logic-circuit family, the basic
Chapter 13, Problem 13.7(choose chapter or problem)
For a particular logic-circuit family, the basic technology used provides an inherent limit to the smallsignal low-frequency voltage gain of 50 V/V. If, with a 3.3-V supply, the values of VOL and VOH are ideal, but = 0.4VDD, what are the best possible values of VIL and VIH that can be expected? What are the best possible noise margins you could expect? If the actual noise margins are only of these values, what VIL and VIH result? What is the large-signal voltage gain [defined as ]. (Hint: Use straight-line approximations for the VTC.)
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