It is required to design a CMOS logic circuit that realizes a three-input, even-parity checker. Specifically, the output Y is to be low when an even number (0 or 2) of the inputs A, B, and C are high.(a) Give the Boolean function (b) Sketch a PDN directly from the expression for Note that it requires 12 transistors in addition to those in the inverters. (c) From inspection of the PDN circuit, reduce the number of transistors to 10. (d) Find the PUN as a dual of the PDN in (c), and hence the complete realization.

ENGE 201 Notes Hexadecimal numbers Base 16 number system; used as a shorthand of binary Values range from 0-F o 1, 2, 3, ,4 5, 6, 7, 8, 9, A, B, C, D, E, F o positional multipliers are powers of 16: 16^1, 16^2, etc. Hex Decimal Binary Hex cont. Decimal Binary 0 0 0000 8 8 1000 1 1 0001 9 9 1001 2 2 0010 A 10 1010 3 3 0011 B 11 1011 4 4 0100 C 12 1100 5 5 0101 D 13 1101 6 6 0110 E 1