Consider the chip cooling scheme of 3.146, but with an

Chapter , Problem 7.97

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Consider the chip cooling scheme of Problem 3.146, but with an insulated top wall placed at the pin tips to force airflow across the pin array. Air enters the array at \(20^{\circ} \mathrm{C}\) and with a velocity V that may be varied but cannot exceed 10 m/s due to pressure drop considerations. The pin fin geometry, which includes the number of pins in the \(N \times N\) square array, as well as the pin diameter \(D_{p}\) and length \(L_{p}\), may also be varied, subject to the constraint that the product \(N D_{p}\) not exceed 9 mm. Neglecting heat transfer through the board, assess the effect of changes in air velocity, and hence \(h_{o}\), as well as pin fin geometry, on the air outlet temperature and the chip heat rate, if the remaining conditions of Problems 3.146 and 3.27, including a maximum allowable chip temperature of \(75^{\circ} \mathrm{C}\), remain in effect. Recommend design and operating conditions for which chip cooling is enhanced. Hint: The air outlet temperature is governed by a relation of the form \(\left[\left(T_{s}-T_{o}\right) /\right.\left.\left(T_{s}-T_{i}\right)\right]=\exp \left[-\left(\bar{h} A_{t} \eta_{o}\right) / \dot{m} c_{p}\right]\), where \(\dot{m}\) is the mass flow rate of air passing through the array, At is the total heat transfer surface area (chip and pins), and \(\eta_{o}\) is the overall surface efficiency defined by Equation 3.107