(a) Derive a NOR-gate version of the gated S-R latch

Chapter 11, Problem 11.31

(choose chapter or problem)

(a) Derive a NOR-gate version of the gated S-R latch analogous to Figure 11-11 by replacing each NAND gate with a NOR gate. Re-label the inputs so that Table 11-2 is the next-state table for the circuit; carefully indicate whether the inputs are active low or active high.

(b) Derive the next-state equation for \(Q^+\) from the circuit of part (a).

(c) Determine any hazards contained in the next state equation of part (b). (Hint: It may be easiest to write the equation as a product of sums rather than as a sum of products.)

(d) What would be the disadvantage of allowing S = 1 and R = 1 in this circuit? Consider the effect on the P output, any race conditions that might result, and the effect of any hazards in the \(Q^+\) equation.

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