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(a) Design a 4-bit synchronous binary counter using T
Chapter 12, Problem 12.4(choose chapter or problem)
(a) Design a 4-bit synchronous binary counter using T flip-flops. (Hint: Add one flip-flop, with necessary gates, to the left side of Figure 12-14. Verify that the gates for the other three flip-flops do not change.)
(b) Repeat (a) using D flip-flops. See Figure 12-16.
Questions & Answers
QUESTION:
(a) Design a 4-bit synchronous binary counter using T flip-flops. (Hint: Add one flip-flop, with necessary gates, to the left side of Figure 12-14. Verify that the gates for the other three flip-flops do not change.)
(b) Repeat (a) using D flip-flops. See Figure 12-16.
ANSWER:Step 1 of 6
a)
Write the table for 4-bit synchronous binary counter:
Present state |
Next state |
Flip-flop inputs |
|||||||||
D |
C |
B |
A |
||||||||
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
0 |
1 |
0 |
0 |
0 |
1 |
0 |
1 |
0 |
0 |
0 |
1 |
0 |
1 |
0 |
1 |
0 |
1 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
1 |
1 |
0 |
0 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
0 |
1 |
0 |
1 |
0 |
1 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |