A CS amplifier using an NMOS transistor with gm = 2 mA/V is found to have an overall
Chapter 7, Problem 7.72(choose chapter or problem)
A CS amplifier using an NMOS transistor with \(g_{m}=2 \mathrm{~mA} / \mathrm{V}\) is found to have an overall voltage gain of \(-10 \mathrm{~V} / \mathrm{V}\). What value should a resistance \(R_{s}\) inserted in the source lead have to reduce the overall voltage gain to \(-5 \mathrm{~V} / \mathrm{V}\)?
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