An NMOS transistor is fabricated in the 0.18-m process whose parameters are given in

Chapter 8, Problem 8.37

(choose chapter or problem)

An NMOS transistor is fabricated in the 0.18-m process whose parameters are given in Table J.1 in Appendix J. The device has a channel length twice the minimum and is operated at VOV = 0.25 V and ID = 10 A. (a) What values of gm, ro, and A0 are obtained? (b) If ID is increased to 100 A, what do VOV , gm, ro, and A0 become? (c) If the device is redesigned with a new value of W so that it operates at VOV = 0.25 V for ID = 100 A, what do gm, ro, and A0 become? (d) If the redesigned device in (c) is operated at 10 A, find VOV , gm, ro, and A0. (e) Which designs and operating conditions produce the lowest and highest values of A0? What are these values? In each of these two cases, if W/L is held at the same value but L is made 10 times larger, what gains result?

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