A particular inverter circuit initially designed in a 0.5-m process is fabricated in a

Chapter 14, Problem 14.21

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A particular inverter circuit initially designed in a 0.5-m process is fabricated in a 0.13-m process. Assuming that the capacitance C will scale down in proportion to the minimum feature size (more on this in the next chapter) and that the power supply will be reduced from 5 V to 1.2 V, by what factor do you expect the dynamic power dissipation to decrease? Assume that the switching frequency f remains unchanged.

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