It is required to use the circuit in Fig. 13.33 to bias an npn differential pair. The
Chapter 13, Problem 13.78(choose chapter or problem)
It is required to use the circuit in Fig. 13.33 to bias an npn differential pair. The bias current-source transistor of the pair, Q5, is identical to Q2 and its base is connected to the BIAS1 line. In its emitter lead is connected a resistance R5 equal to R2. The differential pair has two equal collector resistances RC connected to VCC, and the output voltage vo is taken between the two collectors. (a) Find an expression for the differential gain Ad in terms of (RC/R5) and (IS5/IS1). Comment on the expected temperature dependence of Ad . Neglect the effect of finite N . (b) Design the circuit for I = 20 A and Ad = 10 V/V. Let the emitter areas of Q1 and Q5 be in the ratio 1:4. Specify the required values of R5 and RC.
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