The diagram shows an 8-bit-wide data bus that transfers
Chapter 10, Problem 10.16(choose chapter or problem)
The diagram shows an 8-bit-wide data bus that transfers data between a microprocessor and memory. Data on this bus is determined by the control signals mRead and mWrite. When mRead = ‘1’, the data on the memory’s internal bus ‘membus’ is output to the data bus. When mWrite = ‘1’, the data on the processor’s internal bus ‘probus’ is output to the data bus. When both control signals are ‘0’, the data bus must be in a high-impedance state.
(a) Write VHDL statements to represent the data bus.
(b) Normally mRead = mWrite = ‘1’ does not occur. But if it occurs, what value will the data bus take?
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