(a) Derive the state graph and table for a Mealy

Chapter 14, Problem 14.9

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QUESTION:

(a) Derive the state graph and table for a Mealy sequential circuit which converts a serial stream of bits from NRZ code to NRZI code. Assume that the clock period is the same as the bit time as in Figure 14-20.

(b) Repeat (a) for a Moore sequential circuit.

(c) Draw a timing diagram for your answer to (a), using the NRZ waveform in Figure 14-20 as the input waveform to your circuit. If the input changes occur slightly after the clock edge, indicate places in the output waveform where glitches (false outputs) can occur.

(d) Draw the timing diagram for your answer to (b), using the same input waveform as in (c).

Questions & Answers

QUESTION:

(a) Derive the state graph and table for a Mealy sequential circuit which converts a serial stream of bits from NRZ code to NRZI code. Assume that the clock period is the same as the bit time as in Figure 14-20.

(b) Repeat (a) for a Moore sequential circuit.

(c) Draw a timing diagram for your answer to (a), using the NRZ waveform in Figure 14-20 as the input waveform to your circuit. If the input changes occur slightly after the clock edge, indicate places in the output waveform where glitches (false outputs) can occur.

(d) Draw the timing diagram for your answer to (b), using the same input waveform as in (c).

ANSWER:

Step 1 of 2

The input is initially , when the input sequence  is applied, the output  remains zero.

When, the input sequence ,  the output become .

When, the input sequence  is applied, the output should change the value.

The output will change for , ,  and  of next state, so there is a need to track the last output state.

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