Design a Mealy sequential circuit (Figure 16-27) to
Chapter 16, Problem 16.12(choose chapter or problem)
Design a Mealy sequential circuit (Figure 16-27) to convert a 4-bit binary number in the range 0000 through 1010 to its 10’s complement. (The 10’s complement of a number N is defined as 10 − N.) The input and output should be serial with the least significant bit first. The input X represents the 4-bit binary number, and the output Z represents the corresponding 10’s complement. After four time steps, the circuit should reset to the starting state regardless of the input sequence. Find a state table with a minimum number of states. Design the circuit using NAND gates, NOR gates, and three D flip-flops. Any solution which is minimal for your state assignment and uses nine or fewer gates and inverters is acceptable. (Assign 000 to the reset state.)
Test Procedure: First, check out your state table by starting in each state and making sure that the present output and the next state are correct for each input. Then, starting in the reset state, determine the output sequence for each of the 11 possible input sequences and make a table.
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