This exercise concerns the design of a binary divider to

Chapter 18, Problem 18.2

(choose chapter or problem)

This exercise concerns the design of a binary divider to divide a 6-bit number by a 3-bit number to find a 3-bit quotient. The right 3 bits of the dividend register should be used to store the quotient. Draw a block diagram for the divider. Omit the signals required to initially load the dividend register and assume the dividend is already loaded.

If the contents of the dividend register is initially 0100010 and the divisor is 110, show the contents of the dividend register after each of the first three rising clock edges. Also, indicate whether a shift or a subtraction should occur next.

Now, show the remaining steps in the computation and check your answer by converting to decimal.

If the dividend register initially contained 0011001 and the divisor is 010, can division take place? Explain.

Draw a state graph for the divider which will produce the necessary sequence of Su and Sh signals. Assume that the comparator output is C = 1 if the upper four bits of the dividend register is greater than the divisor. Include a stop state in your graph which is different than the reset state. Assume that the start signal (St) will remain 1 until the division is completed. The circuit should go to the stop state when division is complete or when an overflow is detected. The circuit should then reset when St = 0.