A particular logic gate has tPLH and tPHL of 30 ns and 50 ns, respectively, and

Chapter 14, Problem 14.67

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A particular logic gate has tPLH and tPHL of 30 ns and 50 ns, respectively, and dissipates 1 mW with output low and 0.6 mW with output high. Calculate the corresponding delaypower product (under the assumption of a 50% duty-cycle signal and neglecting dynamic power dissipation).

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