The circuit shown in Figure SP 8-3 is at steady state before the switch closes at time t
Chapter 8, Problem SP8-3(choose chapter or problem)
The circuit shown in Figure SP 8-3 is at steady state before the switch closes at time t = 0. The input to the circuit is the voltage of the voltage source, 12 V. The output of this circuit is the voltage across the capacitor, v(t). Use PSpice to plot the output v(t) as a function of t. Use the plot to obtain an analytic representation of v(t) for t > 0.
Hint: We expect v(t) = A + \(Be^{-t/\tau}\) for t > 0, where A, B, and \(\tau\) are constants to be determined.
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