Figure P10.45 shows a feedback triple utilizing MOSFETs.

A negative-feedback amplifier has a closed-loop gain Af = 100 and an open-loop gain A = 104. What is the feedback factor ? If a manufacturing error results in a reduction of A to 103, what closed-loop gain results? What is the percentage change in Af corresponding to this factor of 10 reduction in A?

Consider the op-amp circuit shown in Fig. P10.2, where the op amp has infinite input resistance and zero output resistance but finite open-loop gain A. (a) Convince yourself that (b) If k , find that results in V/V for the following three cases: (i) V/V; (ii) V/V; (iii) V/V. R1 R1 R2 + ()= R1 10 = R2 Af 10 = A 1000 = A 100 (c) For each of the three cases in (b), find the percentage change in that results when A decreases by 20%. Comment on the results.

The noninverting buffer op-amp configuration shown in Fig. P10.3 provides a direct implementation of the feedback loop of Fig. 10.1. Assuming that the op amp has infinite input resistance and zero output resistance, what is ? If A = 1000, what is the closed-loop voltage gain? What is the amount of feedback (in dB)? For Vs = 1 V, find Vo and Vi. If A decreases by 10%, what is the corresponding percentage decrease in Af?

In a particular circuit represented by the block diagram of Fig. 10.1, a signal of 1 V from the source results in a difference signal of 10 mV being provided to the amplifying element A, and 10 V applied to the load. For this arrangement, identify the values of A and that apply

Find the loop gain and the amount of feedback of a voltage amplifier for which Af and differ by (a) 1%, (b) 5%, (c) 10%, (d) 50%.

In a particular amplifier design, the network consists of a linear potentiometer for which is 0.00 at one end, 1.00 at the other end, and 0.50 in the middle. As the potentiometer is adjusted, find the three values of closed-loop gain that result when the amplifier open-loop gain is (a) 1 V/V, (b) 10 V/V, (c) 100 V/V, (d) 10,000 V/V.

A newly constructed feedback amplifier undergoes a performance test with the following results: With the feedback connection removed, a source signal of 5 mV is required to provide a 10-V output to the load; with the feedback connected, a 10-V output requires a 200-mV source signal. For this amplifier, identify values of A, , A , the closed-loop gain, and the amount of feedback (in dB).

For the negative-feedback loop of Fig. 10.1, find the loop gain A for which the sensitivity of closed-loop gain to open-loop gain [i.e., is 40 dB. For what value of A does the sensitivity become 1/2?

A designer is considering two possible designs of a feedback amplifier. The ultimate goal is V/V. One design employs an amplifier for which V/V and the other uses V/V. Find and the desensitivity factor in both cases. If the amplifier units have a gain uncertainty of %, what is the gain uncertainty for the closed-loop amplifiers utilizing this amplifier type? If the same result is to be achieved with the amplifier, what is the maximum allowable uncertainty in its gain?

A designer is required to achieve a closed-loop gain of % V/V using a basic amplifier whose gain variation is %. What nominal value of A and (assumed constant) are required?

A circuit designer requires a gain of % V/V using an amplifier whose gain varies by a factor of 10 over temperature and time. What is the lowest gain required? The nominal gain? The value of

A power amplifier employs an output stage whose gain varies from 2 to 12 for various reasons. What is the gain of an ideal (non varying) amplifier connected to drive it so that an overall gain with feedback of % V/V can be achieved? What is the value of to be used? What are the requirements if must be held within %? For each of these situations, what preamplifier gain and feedback factor are required if is to be 10 V/V (with the two possible tolerances)?

It is required to design an amplifier with a gain of 100 that is accurate to within 1%. You have available amplifier stages with a gain of 1000 that is accurate to within 30%. Provide a design that uses a number of these gain stages in cascade, with each stage employing negative feedback of an appropriate amount. Obviously, your design should use the lowest possible number of stages while meeting specification.

Consider an amplifier having a midband gain AM and a low-frequency response characterized by a pole at s = L and a zero at s = 0. Let the amplifier be connected in a negative-feedback loop with a feedback factor . Find an expres Afsion for the midband gain and the lower 3-dB frequency of the closed-loop amplifier. By what factor have both changed?

It is required to design an amplifier to have a nominal closed-loop gain of 10 V/V using a battery-operated amplifier whose gain reduces to half its normal full-battery value over the life of the battery. If only 2% drop in closed-loop gain is desired, what nominal open-loop amplifier gain must be used in the design? (Note that since the change in A is large, it is inaccurate to use differentials.) What value of should be chosen? If component-value variation in the network may produce as much as a 1% variation in , to what value must A be raised to ensure the required minimum gain?

A capacitively coupled amplifier has a midband gain of 1000 V/V, a single high-frequency pole at 10 kHz, and a single low-frequency pole at 100 Hz. Negative feedback is employed so that the midband gain is reduced to 10. What are the upper and lower 3-dB frequencies of the closed-loop gain?

Low-cost audio power amplifiers often avoid direct coupling of the loudspeaker to the output stage because any resulting dc bias current in the speaker can use up (and thereby waste) its limited mechanical dynamic range. Unfortunately, the coupling capacitor needed can be large! But feedback helps. For example, for an 8- loudspeaker and Hz, what size capacitor is needed? Now, if feedback is arranged around the amplifier and the speaker so that a closed-loop gain V/V is obtained from an amplifier whose open-loop gain is 1000 V/V, what value of results? If the ultimate product-design specification requires a 50-Hz cutoff, what capacitor can be used?

It is required to design a dc amplifier with a lowfrequency gain of 1000 and a 3-dB frequency of 0.5 MHz. You have available gain stages with a gain of 1000 but with a dominant high-frequency pole at 10 kHz. Provide a design that employs a number of such stages in cascade, each with negative feedback of an appropriate amount. Use identical stages. [Hint: When negative feedback of an amount (1 + A ) is employed around a gain stage, its x-dB frequency is increased by the factor (1 + A

Design a supply-ripple-reduced power amplifier for which the output stage can be modeled by the block diagram of Fig. 10.4, where A1 = 0.9 V/V, and the power-supply ripple VN = +1 V. A closed-loop gain of 10 V/V is desired. What is the gain of the low-ripple preamplifier needed to reduce the output ripple to 100 mV? To 10 mV? To 1 mV? For each case, specify the value required for the feedback factor .

Design a feedback amplifier that has a closedloop gain of 100 V/V and is relatively insensitive to change in basic-amplifier gain. In particular, it should provide a reduction in Af to 99 V/V for a reduction in A to one-tenth its nominal value. What is the required loop gain? What nominal value of A is required? What value of should be used? What would the closed-loop gain become if A were increased tenfold? If A were made infinite?

A feedback amplifier is to be designed using a feedback loop connected around a two-stage amplifier. The first stage is a direct-coupled, small-signal amplifier with a high upper 3-dB frequency. The second stage is a poweroutput stage with a midband gain of 10 V/V and upper and lower 3-dB frequencies of 8 kHz and 80 Hz, respectively. The feedback amplifier should have a midband gain of 100 V/V and an upper 3-dB frequency of 40 kHz. What is the required gain of the small-signal amplifier? What value of should be used? What does the lower 3-dB frequency of the overall amplifier become?

The complementary BJT follower shown in Fig. P10.22(a) has the approximate transfer characteristic shown in Fig. P10.22(b). Observe that for 0.7 V vI +0.7 V, the output is zero. This dead band leads to crossover distortion (see Section 11.3). Consider this follower to be driven by the output of a differential amplifier of gain 100 whose positive-input terminal is connected to the input signal source vS and whose negative-input terminal is connected to the emitters of the follower. Sketch the transfer characteristic vO versus vS of the resulting feedback amplifier. What are the limits of the dead band, and what are the gains outside the dead band?

A particular amplifier has a nonlinear transfer characteristic that can be approximated as follows: (a) For small input signals, (b) For intermediate input signals, 10 mV (c) For large input signals, the output saturates If the amplifier is connected in a negative-feedback loop, find the feedback factor that reduces the factor-of-10 change in gain (occurring at ) to only a 10% change. What is the transfer characteristic vO versus vS of the amplifier with feedback?

For the feedback voltage amplifier of Fig. 10.7(a) let the op amp have an infinite input resistance, a zero output resistance, and a finite open-loop gain V/V. If k , find the value of that results in a closedloop gain of 100 V/V. What does the gain become if is removed?

Consider the feedback voltage amplifier of Fig. 10.7(c). Neglect and assume that . (a) Find expressions for A and and hence the amount of feedback. (b) Noting that the feedback can be eliminated by removing and and connecting the gate of Q to a constant dc voltage (signal ground) give the input resistance and the output resistance of the open-loop amplifier. (c) Using standard circuit analysis (i.e, without invoking the feedback approach), find the input resistance and the output resistance of the circuit in Fig. 10.7(b). How does relate to , and to ?

The feedback current amplifier in Fig. P10.26 utilizes an op amp with an input differential resistance , an open-loop gain , and an output resistance The output current that is delivered to the load resistance is sensed by the feedback network composed of the two resistances and , and a fraction is fed back to the amplifier input node. Find expressions for assuming that the feedback causes the voltage at the input node to be near ground. If the loop gain is large, what does the closed-loop current gain become? State precisely the condition under which this is obtained. For V/V, , , k , , and k , find A, , and .

Figure P10.27 shows a feedback transconductance amplifier utilizing an op amp with open-loop gain , very large input resistance, and a very small output resistance, and an NMOS transistor Q. The amplifier delivers its output current to . The feedback network, composed of resistor R, senses the equal current in the source terminal of Q and delivers a proportional voltage to the negative input terminal of the op amp. (a) Show that the feedback is negative. (b) Open the feedback loop by breaking the connection of R to the negative input of the op amp and grounding the negative input terminal. Find an expression for (c) Find an expression for . (d) Find an expression for . (e) What is the condition to obtain ?

Figure P10.28 shows a feedback transconductance amplifier implemented using an op amp with open-loop gain , a very large input resistance, and an output resistance The output current that is delivered to the load resistance is sensed by the feedback network composed of the three resistances , , and , and a proportional voltage is fed back to the negative-input terminal of the op amp. Find expressions for and If the loop gain is large, find an approximate expression for and state precisely the condition for which this applies

For the feedback transresistance amplifier in Fig. 10.11(d), use small-signal analysis to find the open-loop gain , the feedback factor , and the closed-loop gain . Neglect of each of and and assume that and , and that the feedback causes the signal voltage at the input node to be nearly zero. Evaluate for the following component values: , k , and k

For the feedback transresistance amplifier in Fig. P10.30, let and , and assume that the feedback causes the signal voltage at the input node to be nearly zero. Derive expressions for , , and . Find the value of for the case of k , k , and the transistor current gain

A seriesshunt feedback amplifier employs a basic amplifier with input and output resistances each of 2 k and gain A = 1000 V/V. The feedback factor = 0.1 V/V. Find the gain Af, the input resistance Rif, and the output resistance Rof of the closed-loop amplifier.

For a particular amplifier connected in a feedback loop in which the output voltage is sampled, measurement of the output resistance before and after the loop is connected shows a change by a factor of 100. Is the resistance with feedback higher or lower? What is the value of the loop gain A ? If Rof is 100 , what is Ro without feedback?

The formulas for and in Eqs. (10.19) and (10.22), respectively, also apply for the case in which A is a function of frequency. In this case, the resulting impedances and will be functions of frequency. Consider the case of a seriesshunt amplifier that has an input resistance , an output resistance , and open-loop gain , and a feedback factor that is independent of frequency. Find and and give an equivalent circuit for each, together with the values of all the elements in the equivalent circuits.

A seriesshunt feedback amplifier utilizes the feedback circuit shown in Fig. P10.34. (a) Find expressions for the h parameters of the feedback circuit (see Fig. 10.14b). (b) If R1 = 1 k and = 0.01, what are the values of all four h parameters? Give the units of each parameter. (c) For the case Rs = 1 k and RL = 1 k, sketch and label an equivalent circuit following the model in Fig. 10.14(c).

A feedback amplifier utilizing voltage sampling and employing a basic voltage amplifier with a gain of 1000 V/V and an input resistance of 1000 has a closed-loop input resistance of 10 k. What is the closed-loop gain? If the basic amplifier is used to implement a unity-gain voltage buffer, what input resistance do you expect?

In the seriesshunt feedback amplifier shown in Fig. P10.36, the transistors are biased with ideal currentsources mA and mA, the devices operate with V and have The input signal has a zero dc component. Resistances , k , k , and k . (a) If the loop gain is large, what do you expect the closedloop gain to be? Give both an expression and its approximate value. (b) Find the dc emitter current in each of and . Also find the dc voltage at the emitter of . (c) Sketch the A circuit without the dc sources. Derive expressions for A, , and , and find their values. (d) Give an expression for and find its value. (e) Find the closed-loop gain , the input resistance , and the output resistance By what percentage does the value of differ from the approximate value found in (a)?

Figure P10.37 shows a seriesshunt amplifier with a feedback factor = 1. The amplifier is designed so that vO = 0 for vS = 0, with small deviations in vO from 0 V dc being minimized by the negative-feedback action. The technology utilized has , and V/m. (a) Show that the feedback is negative. (b) With the feedback loop opened at the gate of Q2, and the gate terminals of Q1 and Q2 grounded, find the dc current and the overdrive voltage at which each of Q1 to Q5 is operating. Ignore the Early effect. Also find the dc voltage at the output. (c) Find gm and ro of each of the five transistors. (d) Find the expressions and values of A and Ro. Assume that the bias current sources are ideal. (e) Find the gain with feedback, Af, and the output resistance Rout. (f) How would you modify the circuit to realize a closed loop voltage gain of 5 V/V? What is the value of output resistance obtained?

Figure P10.38 shows a seriesshunt amplifier in which the three MOSFETs are sized to operate at V. Let V and V. The current sources utilize single transistors and thus have output resistances equal to (a) Show that the feedback is negative. (b) Assuming the loop gain to be large, what do you expect the closed-loop voltage gain to be approximately? (c) If has a zero dc component, find the dc voltages at nodes S1, G2, S3, and G3. Verify that each of the current sources has the minimum required dc voltage across it for proper operation. (d) Find the A circuit. Calculate the gain of each of the three stages and the overall voltage gain, A. [Hint: A CS amplifier with a resistance in the source lead has an effective transconductance and an output resistance ] (e) Find . (f) Find . By what percentage does this value differ from the approximate value obtained in (b)? (g) Find the output resistance

The active-loaded differential amplifier in Fig. P10.39 has a feedback network consisting of the voltage divider , with M . The devices are sized to operate at V. For all devices, V. The input signal source has a zero dc component. (a) Show that the feedback is negative. (b) What do you expect the dc voltage at the gate of to be? At the output? (Neglect the Early effect.) (c) Find the A circuit. Derive an expression for A and find its value. (d) Select values for and to obtain a closed-loop voltage gain V/V. (e) Find the value of (f) Utilizing the open-circuit, closed-loop gain (5 V/V) and the value of found in (e), find the value of gain obtained when a resistance k is connected to the output. (g) As an alternative approach to (f) above, redo the analysis of the A circuit including . Then utilize the values of and found in (d) to determine and . Compare the value of to that found in (f).

The CMOS op amp in Fig. P10.40(a) is fabricated in a 1-m technology for which V, A/V2, and V/m. All transistors in the circuit have L = 1 m. (a) It is required to perform a dc bias design of the circuit. For this purpose, let the two input terminals be at zero volts dc and neglect channel-length modulation (i.e, let ). Design to obtain A, A, and , and operate all transistors except for the source follower at V. Assume that and are perfectly matched, and similarly for and . For each transistor, find and . (b) What is the allowable range of input common-mode voltage? (c) Find for each of , , and (d) For each transistor, calculate (e) The 100-k potentiometer shown in Fig. 10.40(b) is connected between the output terminal (Out) and the inverting input terminal (In) to provide negative feedback whose amount is controlled by the setting of the wiper. A voltage signal is applied between the noninverting input (+In) and ground. A load resistance k is connected between the output terminal and ground. The potentiometer is adjusted to obtain a closed-loop gain V/V. Specify the required setting of the potentiometer by giving the values of and . Toward this end, find the A circuit (supply a circuit diagram), the value of A, the circuit (supply a circuit diagram), and the value of . (f) What is the output resistance of the feedback amplifier, excluding ?

Figure P10.41 shows a seriesshunt feedback amplifier without details of the bias circuit. (a) Sketch the A circuit and the circuit for determining .(b) Show that if A is large then the closed-loop voltage gain is given approximately by (c) If RE is selected equal to 50 , find RF that will result in a closed-loop gain of approximately 25 V/V. (d) If Q1 is biased at 1 mA, Q2 at 2 mA, and Q3 at 5 mA, and assuming that the transistors have hfe = 100, find approximate values for RC1 and RC2 to obtain gains from the stages of the A circuit as follows: a voltage gain of Q1 of about 10 and a voltage gain of Q2 of about 50. (e) For your design, what is the closed-loop voltage gain realized? (f) Calculate the input and output resistances of the closedloop amplifier designed.

Figure P10.42 shows a three-stage feedback amplifier: has an 82-k differential input resistance, a 20-V/V open-circuit differential voltage gain, and a 3.2-k output resistance. has a 5-k input resistance, a 20-mA/V short-circuit transconductance, and a 20-k output resistance. has a 20-k input resistance, unity open-circuit voltage gain, and a 1-k output resistance. The feedback amplifier feeds a 1-k load resistance and is fed by a signal source with a 9-k resistance. The feedback network has k and k . (a) Show that the feedback is negative. (b) Supply the small-signal equivalent circuit. (c) Sketch the A circuit and determine A. (d) Find and the amount of feedback. (e) Find the closed-loop gain . (f) Find the feedback amplifiers input resistance (g) Find the feedback amplifiers output resistance (h) If the high-frequency response of the open-loop gain A is dominated by a pole at 100 Hz, what is the upper 3-dB frequency of the closed-loop gain?(i) If for some reason drops to half its nominal value, what is the percentage change to ?

A seriesseries feedback amplifier employs a transconductance amplifier having a short-circuit transconductance Gm of 0.5 A/V, input resistance of 10 k, and output resistance of 100 k. The feedback network has = 100 , an input resistance (with port 1 open-circuited) of 100 , and an input resistance (with port 2 open-circuited) of 10 k. The amplifier operates with a signal source having a resistance of 10 k and with a load resistance of 10 k. Find Af , Rin, and Rout.

Reconsider the circuit in Fig. 10.23(a), analyzed in Example 10.6, this time with the output voltage taken at the emitter of . In this case the feedback can be considered to be of the seriesshunt type. Note that should now be considered part of the basic amplifier and not of the feedback network. (a) Determine . (b) Find an approximate value for assuming that the loop gain remains large (a safe assumption, since the loop in fact does not change). [Note: If you continue with the feedback analysis, youll find that in fact changes somewhat; this is a result of the different approximations made in the feedback analysis approach.]

Figure P10.45 shows a feedback triple utilizing MOSFETs. All three MOSFETs are biased and sized to operate at mA/V. You may neglect their s (except for the calculation of as indicated below). (a) Considering the feedback amplifier as a transconductance amplifier with output current , find the value of that results in a closed-loop transconductance of approximately 100 mA/V. (b) Sketch the A circuit and find the value of (c) Find and Compare to the value of you designed for. What is the percentage difference? What resistance can you change to make exactly 100 mA/V, and in which direction (increase or decrease)? (d) Assuming that k find the output resistance . Since the current sampled by the feedback network is exactly equal to the output current, you can use the feedback formula. (e) If the voltage is taken as the output, in which case the amplifier becomes seriesshunt feedback, what is the value of the closed-loop voltage gain ? Assume that has the original value you selected in (a). Note that in this case should be considered part of the amplifier and not the feedback network. The feedback analysis will reveal that changes somewhat, which may be puzzling given that the feedback loop did not change. The change is due to the different approximation used. (f) What is the closed-loop output resistance of the voltage amplifier in (e) above?

Consider the circuit in Fig. P10.46 as a transconductance amplifier with input and output . The transistor is specified in terms of its and (a) Sketch the small-signal equivalent circuit and convince yourself that the feedback circuit is composed of resistor . (b) Find the A circuit and the circuit. (c) Derive expressions for A, , , , , and

The transconductance amplifier in Fig. P10.47 utilizes a differential amplifier with gain and a very high input resistance. The differential amplifier drives a transistor Q characterized by its and A resistor senses the output current (a) For , find an approximate expression for the closed-loop transconductance Hence, select a value for that results in mA/V. (b) Find the A circuit and derive an expression for A. Evaluate A for the case V/V, mA/V, k , and the value of you selected in (a). (c) Give an expression for and evaluate its value and that of . (d) Find the closed-loop gain and compare to the value you anticipated in (a) above. (e) Find expressions and values for and

It is required to show that the output resistance of the BJT circuit in Fig. P10.48 is given by To derive this expression, set , replace the BJT with its small-signal, hybrid model, apply a test voltage to the collector, and find the current drawn from and hence as Note that the bias arrangement is not shown. For the case of find the maximum possible value for Note that this theoretical maximum is obtained when is so large that the signal current in the emitter is nearly zero. In this case, with applied and , what is the current in the base, in the generator, and in , all in terms of ? Show these currents on a sketch of the equivalent circuit with set to

As we found out in Example 10.6, whenever the feedback network senses the emitter current of the BJT, the feedback output resistance formula cannot predict the output resistance looking into the collector. To understand this issue more clearly, consider the feedback transconductance amplifier shown in Fig. P10.49(a). To determine the output resistance, we set and apply a test voltage to the collector, as shown in Fig. P10.49(b). Now, let be increased to the point where the feedback signal across equals the input to the positive terminal of the differential amplifier, now zero. Thus the signal current through will be zero. By replacing the BJT with its hybrid- model, show that where is the transistor . Thus for large amounts of feedback, is limited to a maximum of independent of the amount of feedback. This should be expected, since no current flows through the feedback network This phenomenon does not occur in the MOSFET version of this circuit.

For the feedback transconductance amplifier of Fig. 10.10(c) derive expressions for A, , , , , and . Evaluate and for the case of mA/V, k , k , , and k . For simplicity, neglect and take into account only when calculating output resistances.

For the feedback transconductance amplifier in Fig. P10.51, derive an approximate expression for the closed-loop transconductance for the case of . Hence select a value for to obtain mA/V. If Q is biased to obtain mA/V, specify the value of the gain of the differential amplifier to obtain an amount of feedback of 60 dB. If Q has k find the output resistance

All the MOS transistors in the feedback transconductance amplifier (seriesseries) of Fig. P10.52 are sized to operate at V. For all transistors, V and V. (a) If has a zero dc component, find the dc voltage at the output, at the drain of , and at the drain of . (b) Find an approximate expression and value for for the case . (c) Use feedback analysis to obtain a more precise value for . (d) Find the value of . (e) If the voltage at the source of is taken as the output, find the voltage gain using the value of obtained in (c). Also find the output resistance of this seriesshunt voltage amplifier.

For the transresistance amplifier analyzed in Example 10.7, use the formulas derived there to evaluate , , and when is one-tenth the value used in the example. That is, evaluate for V/V, , , , and . Compare to the corresponding values obtained in Example

Use the formulas derived in Example 10.7 to solve the problem in Exercise 10.15.

The CE BJT amplifier in Fig. P10.55 employs shuntshunt feedback: Feedback resistor senses the output voltage and provides a feedback current to the base node.(a) If has a zero dc component, find the dc collector current of the BJT. Assume the transistor (b) Find the small-signal equivalent circuit of the amplifier with the signal source represented by its Norton equivalent (as we usually do when the feedback connection at the input is shunt). (c) Find the A circuit and determine the value of A, and . (d) Find and hence and . (e) Find , , and and hence and (f) What voltage gain is realized? How does this value compare to the ideal value obtained if the loop gain is very large and thus the signal voltage at the base becomes almost zero (like what happens in an inverting op-amp circuit). Note that this single-transistor poor-mans op amp is not that bad!

The circuit in Fig. P10.56 utilizes a voltage amplifier with gain in a shuntshunt feedback topology with the feedback network composed of resistor . In order to be able to use the feedback equations, you should first convert the signal source to its Norton representation. You will then see that all the formulas derived in Example 10.7 apply here as well. (a) If the loop gain is very large, what approximate closedloop voltage gain is realized? If , give the value of that will result in V/V. (b) If the amplifier has a dc gain of V/V, an input resistance , and an output resistance , find the actual realized. Also find and (indicated on the circuit diagram). You may use formulas derived in Example 10.7. (c) If the amplifier has an upper 3-dB frequency of 1 kHz and a uniform -dB/decade gain rolloff, what is the 3-dB frequency of the gain ?

The feedback transresistance amplifier in Fig. P10.57 utilizes two identical MOSFETs biased by ideal current sources I = 0.5 mA. The MOSFETs are sized to operate at V and have V and V. The feedback resistance . (a) If has a zero dc component, find the dc voltage at the input, at the drain of , and at the output. (b) Find and of and . (c) Provide the A circuit and derive an expression for A in terms of , , , , and (d) What is ? Give an expression for the loop gain and the amount of feedback (e) Derive an expression for . (f) Derive expressions for , , , and (g) Evaluate , , , , , , , and for the component values given.

Analyze the circuit in Fig. E10.15 from first principles (i.e., do not use the feedback approach) and hence show that Comparing this expression to the one given in Exercise 10.15, part (b), you will note that the only difference is that has been replaced by . Note that represents the forward transmission in the feedback network, which the feedback-analysis method neglects. What is the condition then for the feedback-analysis method to be reasonably accurate for this circuit?

For the shuntshunt feedback amplifier of Fig. 10.11(c), derive expressions for , , , , , , , and in terms of , , , , and . Neglect and . Present your expressions in a format that makes them easy to interpret (e.g., like those derived in Example 10.7 or those asked for in Exercise 10.15).

For the feedback transresistance amplifier in Fig. 10.11(d) let V, . The transistors have V and . (a) If has a zero dc component, show that and are operating at dc collector currents of approximately 0.35 mA and 0.58 mA, respectively. What is the dc voltage at the output? (b) Find the A circuit and the value of A, , and (c) Find the value of , the loop gain, and the amount of feedback. (d) Find , the input resistance , and the output resistance

(a) Show that for the circuit in Fig. P10.61(a), if the loop gain is large, the voltage gain is given approximately by (b) Using three cascaded stages of the type shown in Fig. P10.61(b) to implement the amplifier , design a feedback amplifier with a voltage gain of approximately 100V/V. The amplifier is to operate between a source resistance Rs = 10 k and a load resistance RL = 1 k. Calculate the actual value of realized, the input resistance (excluding Rs), and the output resistance (excluding RL). Assume that the BJTs have hfe of 100. [Note: In practice, the three amplifier stages are not made identical, for stability reasons.]

Negative feedback is to be used to modify the characteristics of a particular amplifier for various purposes. Identify the feedback topology to be used if: (a) Input resistance is to be lowered and output resistance raised. (b) Both input and output resistances are to be raised. (c) Both input and output resistances are to be lowered.

For the feedback current amplifier in Fig. 10.8(b): (a) Provide the A circuit and derive expressions for and A. Neglect of both transistors. (b) Provide the circuit and an expression for (c) Find an expression for (d) For gm1 = gm2 = 5 mA/V, RD = 20 k, RM = 10 k, and RF = 90 k, find the values of A, , , , , and . (e) If and , find the output resistance as seen by (d) For gm1 = gm2 = 5 mA/V, RD = 20 k, RM = 10 k, and RF = 90 k, find the values of A, , , , , and . (e) If and , find the output resistance as seen by

Design the feedback current amplifier of Fig. 10.31(a) to meet the following specifications: (i) A/A (ii) amount of feedback dB (iii) Specify the values of , and . Assume that the amplifier has infinite input resistance and that . First obtain an approximate value of utilizing the approximate formulas derived in Example 10.8. Then with the knowledge that for the MOSFET, mA/V and , modify the value of to meet the design specifications. What is obtained?

The feedback current amplifier in Fig. P10.65 utilizes two identical NMOS transistors sized so that at mA they operate at V. Both devices have V and V.(a) If has zero dc component, show that both and are operating at mA. What is the dc voltage at the input? (b) Find and for each of and (c) Find the A circuit and the value of , A, and (d) Find the value of (e) Find and . (f) Find and

The feedback current amplifier in Fig. P10.66(a) can be thought of as a super CG transistor. Note that rather than connecting the gate of to signal ground, an amplifier is placed between source and gate. (a) If is very large, what is the signal voltage at the input terminal? What is the input resistance? What is the current gain ? (b) For finite but assuming that the input resistance of the amplifier is very large, find the A circuit and derive expressions for A, , and (c) What is the value of ? (d) Find and . If is large, what is the value of ? (e) Find and assuming the loop gain is large. (f) The super CG transistor can be utilized in the cascode configuration shown in Fig. P10.66(b), where VG is a dc bias voltage. Replacing by its small-signal model, use the analogy of the resulting circuit to that in Fig. P10.66(a) to find and

Figure P10.67 shows an interesting and very useful application of feedback to improve the performance of the current mirror formed by and Rather than connecting the drain of to the gate, as is the case in simple current mirrors, an amplifier of gain + is connected between the drain and the gate. Note that the feedback loop does not include transistor The feedback loop ensures that the value of the gate-to-source voltage of is such that equals This regulated is also applied to Thus, if W/L of is n times W/L of , This current tracking, however, is not regulated by the feedback loop. (a) Show that the feedback is negative. (b) If is very large and the input resistance of the amplifier is infinite, what dc voltage appears at the drain of ? If is to operate at an overdrive voltage of 0.2 V, what is the minimum value that must have? (c) Replacing by its small-signal model, find an expression for the small-signal input resistance assuming finite gain but infinite input resistance for the amplifier . Note that here it is much easier to do the analysis directly than to use the feedback-analysis approach. (d) What is the output resistance

The circuit in Fig. P10.68 is an implementation of a particular circuit building block known as secondgeneration current convoyer (CCII). It has three terminals besides ground: x, y, and z. The heart of the circuit is the feedback amplifier consisting of the differential amplifier and the complementary source follower ( , ). (Note that this feedback circuit is one we have encountered a number of times in this chapter, albeit with only one source follower transistor.) In the following, assume that the differential amplifier has a very large gain and infinite differential input resistance. Also, let the two current mirrors have unity current-transfer ratios. (a) If a resistance R is connected between y and ground, a voltage signal is connected between x and ground, and z is short-circuited to ground. Find the current through the short circuit. Show how this current is developed and its path for positive and for negative. (b) If x is connected to ground, a current source is connected to input terminal y, and z is connected to ground, what voltage appears at y and what is the input resistance seen by ? What is the current that flows through the output short circuit? Also, explain the current flow through the circuit for positive and for negative. (c) What is the output resistance at z?

For the amplifier circuit in Fig. P10.69, assuming that Vs has a zero dc component, find the dc voltages at all nodes and the dc emitter currents of Q1 and Q2. Let the BJTs have = 100. Use feedback analysis to find and Rin. Let VBE = 0.7V

The feedback amplifier of Fig. P10.70 consists of a common-gate amplifier formed by Q1 and RD, and a feedback circuit formed by the capacitive divider (C1, C2) and the common-source transistor Qf. Note that the bias circuit for Qf is not shown. It is required to derive expressions for Rin, and Rout. Assume that C1 and C2 are sufficiently small that their loading effect on the basic amplifier can be neglected. Also neglect ro. Find the values of Af, Rin, and Rout for the case in which gm1 = 5 mA/V, RD = 10 k, C1 = 0.9 pF, C2 = 0.1 pF, and gmf = 1 mA/V.

Figure P10.71 shows a feedback amplifier utilizing the shuntseries topology. All transistors have and V. Neglect except in (f). (a) Perform a dc analysis to find the dc emitter currents in and and hence determine their small-signal parameters.(b) Replacing the BJTs with their hybrid- models, give the equivalent circuit of the feedback amplifier. (c) Give the A circuit and determine A, , and Note that is the resistance determined by breaking the emitter loop of and measuring the resistance between the terminals thus created. (d) Find the circuit and determine the value of . (e) Find , , , , and . Note that represents the resistance that in effect appears in the emitter of as a result of the feedback. (f) Determine and To determine use V and recall that the maximum possible output resistance looking into the collector of a BJT is approximately where is the BJTs (see Problem 10.49).

Derive an expression for the loop gain of the feedback amplifier in Fig. 10.22 (a) (Example 10.5). Set , break the loop at the gate of , apply a test voltage to the gate of , and determine the voltage that appears at the output of amplifier . Put your expression in the form in Eq. (10.36) and indicate the difference.

It is required to determine the loop gain of the amplifier circuit shown in Fig. P10.41. The most convenient place to break the loop is at the base of Q2. Thus, connect a resistance equal to r 2 between the collector of Q1 and ground, apply a test voltage Vt to the base of Q2, and determine the returned voltage at the collector of Q1 (with Vs set to zero, of course). Show that

Show that the loop gain of the amplifier circuit in Fig. P10.52 is where gm1,2 is the gm of each of Q1 and Q2.

Derive an expression for the loop gain of the feedback circuit shown in Fig. P10.26. Assume that the op amp is modeled by an input resistance Rid, an open-circuit voltage gain , and an output resistance ro.

Find the loop gain of the feedback amplifier shown in Fig. P10.37 by breaking the loop at the gate of Q2 (and, of course, setting vS = 0). Use the values given in the statement of Problem 10.37. Determine the value of Rout.

Derive an expression for the loop gain of the feedback amplifier shown in Fig. 10.27(a) (Example 10.7). Evaluate for the component values given in Example 10.7 and compare to the value determined there.

Derive an expression for the loop gain of the feedback amplifier in Fig. 10.31(a) (Example 10.8). Evaluate for the component values given in Example 10.8 and compare to the result found there.

For the feedback amplifier in Fig. P10.70, set Is = 0 and derive an expression for the loop gain by breaking the loop at the gate terminal of transistor Qf. Refer to Problem 10.70 for more details.

An op amp designed to have a low-frequency gain of 105 and a high-frequency response dominated by a single pole at 100 rad/s, acquires, through a manufacturing error, a pair of additional poles at 10,000 rad/s. At what frequency does the total phase shift reach 180? At this frequency, for what value of , assumed to be frequency independent, does the loop gain reach a value of unity? What is the corresponding value of closed-loop gain at low frequencies?

For the situation described in Problem 10.80, sketch Nyquist plots for = 1.0 and 103. (Plot for = 0 rad/s, 100 rad/s, 103 rad/s, 104 rad/s, and rad/s.)

An op amp having a low-frequency gain of 103 and a single-pole rolloff at 104 rad/s is connected in a negativefeedback loop via a feedback network having a transmission k and a two-pole rolloff at 104 rad/s. Find the value of k above which the closed-loop amplifier becomes unstable.

Consider a feedback amplifier for which the openloop gain A(s) is given by If the feedback factor is independent of frequency, find the frequency at which the phase shift is 180, and find the critical value of at which oscillation will commence.

A dc amplifier having a single-pole response with pole frequency 10 Hz and unity-gain frequency of 1 MHz is operated in a loop whose frequency-independent feedback factor is 0.01. Find the low-frequency gain, the 3-dB frequency, and the unity-gain frequency of the closed-loop amplifier. By what factor does the pole shift?

An amplifier having a low-frequency gain of 103 and poles at 104 Hz and 105 Hz is operated in a closed negative-feedback loop with a frequency-independent . (a) For what value of do the closed-loop poles become coincident? At what frequency? (b) What is the low-frequency gain corresponding to the situation in (a)? What is the value of the closed-loop gain at the frequency of the coincident poles? (c) What is the value of Q corresponding to the situation in (a)? (d) If is increased by a factor of 10, what are the new pole locations? What is the corresponding pole Q?

A dc amplifier has an open-loop gain of 1000 and two poles, a dominant one at 1 kHz and a high-frequency one whose location can be controlled. It is required to connect this amplifier in a negative-feedback loop that provides a dc closed-loop gain of 10 and a maximally flat response. Find the required value of and the frequency at which the second pole should be placed.

Reconsider Example 10.9 with the circuit in Fig. 10.40 modified to incorporate a so-called tapered network, in which the components immediately adjacent to the amplifier input are raised in impedance to C/10 and 10R. Find expressions for the resulting pole frequency 0 and Q factor. For what value of K do the poles coincide? For what value of K does the response become maximally flat? For what value of K does the circuit oscillate?

Three identical inverting amplifier stages each characterized by a low-frequency gain K and a single-pole response with kHz are connected in a feedback loop with . What is the minimum value of K at which the circuit oscillates? What would the frequency of oscillation be?

Reconsider Exercise 10.24 for the case of the op amp wired as a unity-gain buffer. At what frequency is What is the corresponding phase margin?

Reconsider Exercise 10.24 for the case of a manufacturing error introducing a second pole at 104 Hz. What is now the frequency for which What is the corresponding phase margin? For what values of is the phase margin 45 or more?

For what phase margin does the gain peaking have a value of 5%? Of 10%? Of 0.1 dB? Of 1 dB? [Hint: Use the result in Eq. 10.105.]

An amplifier has a dc gain of 105 and poles at 105 Hz, 3.16 105 Hz, and 106 Hz. Find the value of , and the corresponding closed-loop gain, for which a phase margin of 45 is obtained.

A two-pole amplifier for which A0 = 103 and having poles at 1 MHz and 10 MHz is to be connected as a differentiator. On the basis of the rate-of-closure rule, what is the smallest differentiator time constant for which operation is stable? What are the corresponding gain and phase margins?

For the amplifier described by Fig. 10.43 and with frequency-independent feedback, what is the minimum closed-loop voltage gain that can be obtained for phase margins of 90 and 45?

A multipole amplifier having a first pole at 3 MHz and a dc open-loop gain of 60 dB is to be compensated for closed-loop gains as low as unity by the introduction of a new dominant pole. At what frequency must the new pole be placed?

For the amplifier described in Problem 10.95, rather than introducing a new dominant pole we can use additional capacitance at the circuit node at which the pole is formed to reduce the frequency of the first pole. If the frequency of the second pole is 15 MHz and if it remains unchanged while additional capacitance is introduced as mentioned, find the frequency to which the first pole must be lowered so that the resulting amplifier is stable for closed-loop gains as low as unity. By what factor is the capacitance at the controlling node increased?

Contemplate the effects of pole splitting by considering Eqs. (10.112), (10.116), and (10.117) under the conditions that R1  R2 = R, C2  C1/10 = C, Cf  C, and gm = 100/ R, by calculating

An op amp with open-loop voltage gain of 104 and poles at 106 Hz, 107 Hz, and 108 Hz is to be compensated by the addition of a fourth dominant pole to operate stably with unity feedback ( = 1). What is the frequency of the required dominant pole? The compensation network is to consist of an RC low-pass network placed in the negativefeedback path of the op amp. The dc bias conditions are such that a 1-M resistor can be tolerated in series with each of the negative and positive input terminals. What capacitor is required between the negative input and ground to implement the required fourth pole?

An op amp with an open-loop voltage gain of 80 dB and poles at 105 Hz, 106 Hz, and 2 106 Hz is to be compensated to be stable for unity . Assume that the op amp incorporates an amplifier equivalent to that in Fig. 10.46, with C1 = 150 pF, C2 = 5 pF, and gm = 40 mA/V, and that fP1 is caused by the input circuit and fP2 by the output circuit of this amplifier. Find the required value of the compensating Miller capacitance and the new frequency of the output pole.

The op amp in the circuit of Fig. P10.100 has an open-loop gain of 105 and a single-pole rolloff with 3dB = 10 rad/s. (a) Sketch a Bode plot for the loop gain. (b) Find the frequency at which and find the corresponding phase margin. (c) Find the closed-loop transfer function, including its zero and poles. Sketch a pole-zero plot. Sketch the magnitude of the transfer function versus frequency, and label the important parameters on your sketch.