Solution Found!
A latch can be constructed from an OR gate, an AND gate,
Chapter 11, Problem 11.2(choose chapter or problem)
A latch can be constructed from an OR gate, an AND gate, and an inverter connected as follows:
(a) What restriction must be placed on R and H so that P will always equal \(Q^\prime\) (under steady-state conditions)?
(b) Construct a next-state table and derive the characteristic (next-state) equation for the latch.
(c) Complete the following timing diagram for the latch.
Questions & Answers
QUESTION:
A latch can be constructed from an OR gate, an AND gate, and an inverter connected as follows:
(a) What restriction must be placed on R and H so that P will always equal \(Q^\prime\) (under steady-state conditions)?
(b) Construct a next-state table and derive the characteristic (next-state) equation for the latch.
(c) Complete the following timing diagram for the latch.
Step 1 of 4
Consider the logic circuit.
(a) The output of the OR gate will be
O1 = R + P’
The output of the OR gate is Q.
Q = R + P’…………(1)
According to the diagram, P = Q’.
So,
Q = R + (Q’)’
Q = R + Q
This condition is possible when R= 0.
So, It’s true if R = 0.
The output of the AND gate will be H·Q.