Consider the amplifier of Fig. 9.2(a). Let RD = 10 k, ro =

The amplifier in Fig. P9.1 is biased to operate at gm = 1 mA/V. Neglecting ro, find the midband gain. Find the value of CS that places fL at 20 Hz.

Consider the amplifier of Fig. 9.2(a). Let RD = 10 k, ro = 100 k, and RL = 10 k. Find the value of CC2, specified to one significant digit, to ensure that the associated break frequency is at, or below, 10 Hz. If a higher-power design results in doubling ID, with both RD and ro reduced by a factor of 2, what does the corner frequency (due to CC2) become? For increasingly higher-power designs, what is the highest corner frequency that can be associated with CC2?

The NMOS transistor in the discrete CS amplifier circuit of Fig. P9.3 is biased to have gm = 5 mA/V. Find AM, fP1, fP2, fP3, and fL.

Consider the low-frequency response of the CS amplifier of Fig. 9.2(a). Let Rsig = 0.5 M, RG = 2 M, gm = 3mA/V, RD = 20 k, and RL = 10 k. Find AM. Also, design thecoupling and bypass capacitors to locate the three lowfrequency poles at 50 Hz, 10 Hz, and 3 Hz. Use a minimum total capacitance, with capacitors specified only to a single significant digit. What value of fL results?

A particular version of the CS amplifier in Fig. 9.2 uses a transistor biased to operate with mA/V. Resistances k , M , k , and k . As an initial design, the circuit designer selects F. Find the frequencies , , and and rank them in order of frequency, highest first. Calculate the ratios of the first to second, and second to third. The final design requires that the first pole dominate at 10 Hz with the second a factor of 4 lower, and the third another a factor of 4 lower. Find the values of all the capacitances and the total capacitance needed. If the separation factor were 10, what capacitor values and total capacitance would be needed? (Note: You can see that the total capacitance need not be much larger to spread the poles, as is desired in certain applications.)

Repeat Example 9.1 to find , , and that provide Hz and the other pole frequencies at 4 Hz and 1 Hz. Design to keep the total capacitance to a minimum.

Reconsider Exercise 9.1 with the aim of finding a better-performing design using the same total capacitance, that is, 3 F. Prepare a design in which the break frequencies are separated by a factor of 5 (i.e., f, f/5, and f/25). What are the three capacitor values, the three break frequencies, and that you achieve?

Repeat Exercise 9.2 for the situation in which 50 F and F. Find the three break frequencies and estimate

Repeat Example 9.2 for a related CE amplifier whose supply voltages and bias current are each reduced to half their original value but , , , and are left unchanged. Find , , and for Hz. Minimize the total capacitance used, under the following conditions. Arrange that the contributions of , , and are 80%, 10%, and 10%, respectively. Specify capacitors to two significant digits, choosing the next highest value, in general, for a conservative design, but realizing that for , this may represent a larger capacitance increment. Check the value of that results. [Note: An attractive approach can be to select on the small side, allowing it to contribute more than 80% to , while making and larger, since they must contribute less to .)

A particular current-biased CE amplifier operating at 100 from -V power supplies employs k , k ; it operates between a 20-k source and a 10k load. The transistor . Select first for a minimumvalue specified to one significant digit and providing up to 90% of . Then choose and , each specified to one significant digit, with the goal of minimizing the total capacitance used. What results? What total capacitance is needed?

Consider the common-emitter amplifier of Fig. P9.11 under the following conditions: Rsig = 5 k, R1 = 33 k, R2 = 22 k, RE = 3.9 k, RC = 4.7 k, RL = 5.6 k, VCC = 5 V. The dc emitter current can be shown to be IE  0.3 mA, at which =120. Find the input resistance Rin and the midband gain AM. If CC1 = CC2 = 1 F and CE = 20 F, find the three break frequencies fP1, fP2, and fP3 and an estimate for fL. Note that RE has to be taken into account in evaluating fP2.

For the amplifier described in Problem 9.11, design the coupling and bypass capacitors for a lower 3-dB frequency of 100 Hz. Design so that the contribution of each of CC1 and CC2 to determining fL is only 5%.

Consider the circuit of Fig. P9.11. For Rsig = 10 k, r = 1 k, 0 = 100, and RE = 1 k, what is the ratio that makes their contributions to the determination of fL equal?

For the common-emitter amplifier of Fig. P9.14, neglect ro and assume the current source to be ideal. (a) Derive an expression for the midband gain. For the common-emitter amplifier of Fig. P9.14, neglect ro and assume the current source to be ideal. (a) Derive an expression for the midband gain.

The BJT common-emitter amplifier of Fig. P9.15 includes an emitter degeneration resistance Re. (a) Assuming  1, neglecting ro, and assuming the current source to be ideal, derive an expression for the smallsignal voltage gain that applies in the midband and the low-frequency band. Hence find the midband gain AM and the lower 3-dB frequency fL. (b) Show that including Re reduces the magnitude of AM by a certain factor. What is this factor? (c) Show that including Re reduces fL by the same factor as in (b) and thus one can use Re to trade-off gain for bandwidth. (d) For I = 0.25 mA, RC = 10 k, and CE = 10 F, find |AM| and fL with Re = 0. Now find the value of Re that lowers fL by a factor of 5. What will the gain become? Sketch on the same diagram a Bode plot for the gain magnitude for both cases.

Refer to the MOSFET high-frequency model in Fig. 9.6(a). Evaluate the model parameters for an NMOS transistor operating at ID = 100 A, VSB = 1 V, and VDS = 1.5 V. The MOSFET has W = 20 m, L = 1 m, tox = 8 nm, n = 450 cm2/Vs, = 0.5 V1/2, 2 f = 0.65 V, = 0.05 V1, V0 = 0.7 V, Csb0 = Cdb0 = 15 fF, and Lov = 0.05 m. (Recall that gmb =

Find fT for a MOSFET operating at ID = 100 A and VOV = 0.2 V. The MOSFET has Cgs = 20 fF and Cgd = 5 fF.

Starting from the expression of fT for a MOSFET, and making the approximation that Cgs  Cgd and that the overlap component of Cgs is negligibly small, show that Thus note that to obtain a high fT from a given device, it must be operated at a high current. Also note that faster operation is obtained from smaller devices.

Starting from the expression for the MOSFET unity-gain frequency, and making the approximation that Cgs  Cgd and that the overlap component of Cgs is negligibly small, show that for an n-channel device Observe that for a given channel length, fT can be increased by operating the MOSFET at a higher overdrive voltage. Evaluate fT for devices with L = 1.0 m operated at overdrive voltages of 0.25 V and 0.5 V. Use

It is required to calculate the intrinsic gain and the unity-gain frequency of an n-channel transistor fabricated in a 0.18-m CMOS process for which L, cm2/V.s, and V/m. The device is operated at V. Find and for devices with , 2 , 3 , 4 , and 5 . Present your results in a table.

A particular BJT operating at IC = 1 mA has C = 1pF, C = 10 pF, and = 100. What are fT and f for this situation?

For the transistor described in Problem 9.21, C includes a relatively constant depletion-layer capacitance of 2 pF. If the device is operated at IC = 0.2 mA, what does its fT become?

An npn transistor is operated at IC = 0.5 mA and VCB = 2 V. It has 0 = 100, VA = 50 V, F = 30 ps, Cje0 = 20 fF, C 0 = 30fF, V0c = 0.75 V, mCBJ = 0.5, and rx = 100 . Sketch the complete hybrid model, and specify the values of all its components. Also, find fT.

Measurement of hfe of an npn transistor at 50 MHz shows that |hfe| = 10 at IC = 0.2 mA and 12 at IC = 1.0 mA. Furthermore, C was measured and found to be 0.1 pF. Find fT at each of the two collector currents used. What must

A particular small-geometry BJT has fT of 8 GHz and C = 0.1 pF when operated at IC = 1.0 mA. What is C in this situation? Also, find gm. For = 160, find r and f

For a BJT whose unity-gain bandwidth is 2 GHz and 0 = 200, at what frequency does the magnitude of hfe become 20? What is f ?

For a sufficiently high frequency, measurement of the complex input impedance of a BJT having (ac) grounded emitter and collector yields a real part approximating rx. For what frequency, defined in terms of , is such an estimate of rx good to within 10% under the condition that

Complete the table entries below for transistors (a) through (g), under the conditions indicated. Neglect rx.

In a particular common-source amplifier for which the midband voltage gain between gate and drain (i.e., ) is V/V, the NMOS transistor has pF and pF. What input capacitance would you expect? For what range of signal-source resistances can you expect the 3-dB frequency to exceed 10 MHz? Neglect the effect of

A design is required for a CS amplifier for which the MOSFET is operated at mA/V and has pF and pF. The amplifier is fed with a signal source having k , and is very large. What is the largest value of for which the upper 3-dB frequency is at least 10 MHz? What is the corresponding value of midband gain and gainbandwidth product? If the specification on the upper 3-dB frequency can be relaxed by a factor of 3, that is, to (10/3) MHz, what can and GB become?

Reconsider Example 9.3 for the situation in which the transistor is replaced by one whose width W is half that of the original transistor while the bias current remains unchanged. Find modified values for all the device parameters along with , , and the gainbandwidth product, GB. Contrast this with the original design by calculating the ratios of new value to old for W, , , , , , , , and GB.

In a CS amplifier, such as that in Fig. 9.2(a), the resistance of the source Rsig = 100 k, amplifier input resistance (which is due to the biasing network) Rin = 100 k, Cgs = 1 pF, Cgd = 0.2 pF, gm = 3 mA/V, ro = 50 k, RD = 8 k, and RL = 10k. Determine the expected 3-dB cutoff frequency fH and the midband gain. In evaluating ways to double fH, a designer considers the alternatives of changing either RL or Rin. To raise fH as described, what separate change in each would be required? What midband voltage gain results in each case?

A discrete MOSFET common-source amplifier has RG = 1 M, gm = 5 mA/V, ro = 100 k, RD = 10 k, Cgs = 2 pF, and Cgd = 0.4 pF. The amplifier is fed from a voltage source with an internal resistance of 500 k and is connected to a 10-k load. Find: (a) the overall midband gain AM (b) the upper 3-dB frequency fH

The analysis of the high-frequency response of the common-sourceamplifier, presented in the text, is based on the assumption that the resistance of the signal source, Rsig, is large and, thus, that its interaction with the input capacitance Cin produces the dominant pole that determines the upper 3-dB frequency fH. In some situations, however, the CS amplifier is fed with a very low Rsig. To investigate the high-frequency response of the amplifier in such acase, Fig. P9.34 shows the equivalent circuit when the CSamplifier is fed with an ideal voltage source Vsig having Rsig = 0. Note that CL denotes the total capacitance at the output node. By writing a node equation at the output, show that the transfer function Vo/Vsig is given by At frequencies  , the s term in the numerator can be neglected. In such case, what is the upper 3-dB frequency resulting? Compute the values of AM and fH for the case: Cgd = 0.4 pF, CL = 2 pF, gm = 5 mA/V, and RL = 5 k.

The NMOS transistor in the discrete CS amplifier circuit of Fig. P9.3 is biased to have gm = 1 mA/V and ro = 100 k. Find AM. If Cgs = 1 pF and Cgd = 0.2 pF, find fH.

A designer wishes to investigate the effect of changing the bias current I on the midband gain and high-frequency response of the CE amplifier considered in Example 9.4. Let I be doubled to 2 mA, and assume that 0 and fT remain unchanged at 100 and 800 MHz, respectively. To keep the node voltages nearly unchanged, the designer reduces RB and RC by a factor of 2, to 50 k and 4 k, respectively. Assume rx = 50 , and recall that VA = 100 V and that C remains constant at 1 pF. As before, the amplifier is fed with a source having Rsig = 5 k and feeds a load RL = 5 k. Find the new values of AM, fH, and the gainbandwidth product, Comment on the results. Note that the price paid for whatever improvement in performance is achieved is an increase in power. By what factor does the power dissipation increase?

The purpose of this problem is to investigate the highfrequency response of the CE amplifier when it isfed with a relatively large source resistance Rsig. Refer tothe amplifier in Fig. 9.4 (a) and to its high-frequency, equivalent-circuit model and the analysis shown in Fig. 9.14. Let and Under these conditions, show that: (a) the midband gain (b) the upper 3-dB frequency (c) the gainbandwidth product Evaluate this approximate value of the gainbandwidth product for the case Rsig = 25 k and C = 1 pF. Now, if the transistor is biased at IC = 1 mA and has = 100, find the midband gain and fH for the two cases and . On the same coordinates, sketch Bode plots for the gain magnitude versus frequency for the two cases. What fH is obtained when the gain is unity? What value of corresponds?

For a version of the CE amplifier circuit in Fig. P9.11, Rsig = 10 k, R1 = 68 k, R2 = 27 k, RE = 2.2 k, RC = 4.7 k, and RL = 10 k. The collector current is 0.8 mA, = 200, fT = 1 GHz, and C = 0.8 pF. Neglecting the effect of rx and ro, find the midband voltage gain and the upper 3-dB frequency fH.

A particular BJT operating at 2 mA is specified to have GHz, pF, , and . The device is used in a CE amplifier operating from a very-lowresistance voltage source. (a) If the midband gain obtained is V/V, what is the value of ? (b) If the midband gain is reduced to V/V (by changing ), what is obtained?

Repeat Example 9.4 for the situation in which the power supplies are reduced to V and the bias current is reduced to 0.5 mA. Assume that all other component values and transistor parameter values remain unchanged. Find , , and the gainbandwidth product and compare to the values obtained in Example 9.4.

The amplifier shown in Fig. P9.41 has Rsig = RL = 1k, RC = 1 k, RB = 47 k, = 100, C = 0.8 pF, and fT = 600 MHz. Assume the coupling capacitors to be very large. (a) Find the dc collector current of the transistor. (b) Find gm and r . (c) Neglecting ro, find the midband voltage gain from base to collector (neglect the effect of RB). (d) Use the gain obtained in (c) to find the component of Rin that arises as a result of RB. Hence find Rin. (e) Find the overall gain at midband. (f) Find Cin. (g) Find fH.

Figure P9.42 shows a diode-connected transistor with the bias circuit omitted. Utilizing the BJT high-frequency, hybrid model with rx = 0 and ro = , derive an expression for Zi(s) as a function of re and C . Find the frequency at which the impedance has a phase angle of 45 for the case in which the BJT has fT = 400 MHz and the bias current is relatively high. What is the frequency when the bias current is reduced so that C

A direct-coupled amplifier has a low-frequency gain of 40 dB, poles at 1 MHz and 10 MHz, a zero on the negative real axis at 100 MHz, and another zero at infinite frequency. Express the amplifier gain function in the form of Eqs. (9.61) and (9.62), and sketch a Bode plot for the gain magnitude. What do you estimate the 3-dB frequency to be?

An amplifier with a dc gain of 60 dB has a singlepole high-frequency response with a 3-dB frequency of 10 kHz. (a) Give an expression for the gain function A(s). (b) Sketch Bode diagrams for the gain magnitude and phase. (c) What is the gainbandwidth product? (d) What is the unity-gain frequency? (e) If a change in the amplifier circuit causes its transfer function to acquire another pole at 100 kHz, sketch the resulting gain magnitude and specify the unity-gain frequency. Note that this is an example of an amplifier with a unity-gain bandwidth that is different from its gainbandwidth product.

Consider an amplifier whose is given by with . Find the ratio for which the value of the 3-dB frequency calculated using the dominant-pole approximation differs from that calculated using the root-sum-of-squares formula (Eq. 9.68) by: (a) 10% (b) 1%

The high-frequency response of a direct-coupled amplifier having a dc gain of 1000 V/V incorporates zeros at and 105 rad/s (one at each frequency) and poles at 104 rad/s and 106 rad/s (one at each frequency). Write an expression for the amplifier transfer function. Find using (a) the dominant-pole approximation (b) the root-sum-of-squares approximation (Eq. 9.68). If a way is found to lower the frequency of the finite zero to 104 rad/s, what does the transfer function become? What is the 3dB frequency of the resulting amplifier?

A direct-coupled amplifier has a dominant pole at 1000 rad/s and three coincident poles at a much higher frequency. These nondominant poles cause the phase lag of the amplifier at high frequencies to exceed the 90 angle due to the dominant pole. It is required to limit the excess phase at = 107 rad/s to30 (i.e., to limit the total phase angle to 120). Find the corresponding frequency of the nondominant poles.

Refer to Example 9.6. Give an expression for in terms of , (note that ), and gm. If all component values except for the generator resistance Rsig are left unchanged, to what value must Rsig be reduced in order to raise fH to 200 kHz?

(a) For the amplifier circuit in Example 9.6, find the expression for using symbols (as opposed to numbers). (b) For the same circuit, use the approximate method of the previous section to determine an expression for and hence the effective time constant that can be used to find as . Compare this expression of with that of H in (a). What is the difference? Compute the value of the difference and express it as a percentage of

If a capacitor pF is connected across the output terminals of the amplifier in Example 9.6, find the resulting increase in and hence the new value of .

A FET amplifier resembling that in Example 9.6, when operated at lower currents in a higher-impedance application, has , , mA/V, , and pF. Find the midband voltage gain AM and the 3-dB frequency f

Figure P9.52 shows the high-frequency equivalent circuit of a CS amplifier with a resistance Rs connected in the source lead. The purpose of this problem is to show that thevalue of Rs can be used to control the gain and bandwidth of the amplifier, specifically to allow the designer to trade gain for increased bandwidth. (a) Derive an expression for the low-frequency voltage gain (set and to zero). (b) To be able to determine using the open-circuit timeconstants method, derive expressions for and . (c) Let , , and pF. Use the expressions found in (a) and (b) to determine the low-frequency gain and the 3-dB frequency fH for three cases: , 100 , and 250 . In each case also evaluate the gainbandwidth product. Comment.

A common-source MOS amplifier, whose equivalent circuit resembles that in Fig. 9.16(a), is to be evaluated for its high-frequency response. For this particular design, , , , , Cgd = 0.1 pF, and gm = 0.5 mA/V. Estimate the midband gain and the 3-dB frequency.

For a particular amplifier modeled by the circuit of Fig. 9.16(a), gm = 5 mA/V, , RG = 0.65 M, , , and . There is also a load capacitance of 30 pF. Find the corresponding midband voltage gain, the open-circuit time constants, and an estimate of the 3-dB frequency.

Consider the high-frequency response of an amplifier consisting of two identical stages in cascade, each with an input resistance of 10 k and an output resistance of 2 k. The twostage amplifier is driven from a 5-k source and drives a 1-k load. Associated with each stage is a parasitic input capacitance (to ground) of 10 pF and a parasitic output capacitance (to ground) of 2 pF. Parasitic capacitances of 5 pF and 7 pF also are associated with the signal-source and load connections, respectively. For this arrangement, find the three poles and estimate the 3-dB frequency fH.

Consider an ideal voltage amplifier with a gain of 0.9 V/ V and a resistance R =100 k connected in the feedback paththat is, between the output and input terminals. Use Millers theorem to find the input resistance of this circuit.

An ideal voltage amplifier with a voltage gain of 1000 V/V has a 0.2-pF capacitance connected between its output and input terminals. What is the input capacitance of the amplifier? If the amplifier is fed from a voltage source having a resistance , find the transfer function as a function of the complex-frequency variable s and hence the 3-dB frequency fH and the unity-gain frequency

The amplifiers listed below are characterized by the descriptor (A, C), where A is the voltage gain from input to output and C is an internal capacitor connected between input and output. For each, find the equivalent capacitances at the input and at the output as provided by the use of Millers theorem: (a) 1000 V/V, 1 pF (b) 10 V/V, 10 pF (c) 1 V/V, 10 pF (d) +1 V/V, 10 pF (e) +10 V/V, 10 pF Note that the input capacitance found in case (e) can be used to cancel the effect of other capacitance connected from input to ground. In (e), what capacitance can be canceled?

Figure P9.59 shows an ideal voltage amplifier with a gain of +2 V/V (usually implemented with an op amp connected in the noninverting configuration) and a resistance R connected between output and input. (a) Using Millers theorem, show that the input resistance (b) Use Nortons theorem to replace , , and with a signal current source and an equivalent parallel resistance. Show that by selecting , the equivalent parallel resistance becomes infinite and the current IL into the load impedance ZL becomes . The circuit then functions as an ideal voltage-controlled current source with an output current IL. (c) If ZL is a capacitor C, find the transfer function and show it is that of an ideal noninverting integrator.

A CS amplifier that can be represented by the equivalent circuit of Fig. 9.19 has and Find the midband gain AM, the input capacitance Cin using the Miller approximation, and hence an estimate of the 3-dB frequency fH. Also, obtain a better estimate of fH using Millers theorem.

A CS amplifier that can be represented by the equivalent circuit of Fig. 9.19 has and Find the midband AM gain, and estimate the 3-dB frequency fH using the method of open-circuit time constants. Also, give the percentage contribution to by each of three capacitances. (Note that this is the same amplifier considered in Problem 9.60; if you have solved Problem 9.60, compare your results.)

A CS amplifier represented by the equivalent circuit of Fig. 9.19 has 4mA/V, and Find the exact values of fZ, fP1, and fP2 using Eq. (9.88), and hence estimate fH. Compare the values of fP1 and fP2 to the approximate values obtained using Eqs. (9.94) and (9.95). (Note that this is the same amplifier considered in Problems 9.60 and 9.61; if you have solved either or both of these problems, compare your results.)

A CS amplifier represented by the equivalent circuit of Fig. 9.19 has 4 mA/V, and It is required to find AM, fH, and the gainbandwidth product for each of the following values of : 5 k, 10 k, and 20 k. Use the approximate expression for fP1 in Eq. (9.94). However, in each case, also evaluate fP2 and fZ to ensure that a dominant pole exists, and in each case, state whether the unity-gain frequency is equal to the gainbandwidth product. Present your results in tabular form, and comment on the gain bandwidth trade-off.

A common-emitter amplifier that can be represented by the equivalent circuit of Fig. 9.24(a) has 0.3 pF, Figure P9.59 Vsig Rsig = 1 k Vo Vsig Rin = R .  V sig Vo Rsig R 2 Rin IL ZL Vsig Rsig Rin Rsig = R Vsig R Vo Vsig Cgs = 2 pF, Cgd = 0.1 pF, CL = 2 pF, gm = 4 mA/V, Rsig = RL = 20 k. Cgs = 2 pF, Cgd = 0.1 pF, CL = 2 pF, gm = 4 mA/V, Rsig = RL = 20 k. H Cgs = 2 pF, Cgd = 0.1 pF, , CL = 2 pF, gm = Rsig = RL = 20 k. Cgs = 2 pF, Cgd 0.1 pF, = CL = 2 pF, gm = R sig 20 k. = RL C = 10 pF, C = CL = 3 pF, gm = 40 mA/V, = 100, Problems 793 CHAPTER 9 PROBLEMS and Find the midband gain AM, and an estimate of the 3-dB frequency fH using the Miller approximation. Also, obtain a better estimate of fH using Millers theorem.

A common-emitter amplifier that can be represented by the equivalent circuit of Fig. 9.24(a) has pF, pF, pF, mA/V, , , k , and k . Find the midband gain , and estimate the 3-dB frequency using the method of open-circuit time constants. Also give the percentage contribution to of each of the three capacitances. (Note that this is the same amplifier considered in Problem 9.64; if you have solved this problem, compare your results.)

A common-emitter amplifier that can be represented by the equivalent circuit of Fig. 9.24(a) has 0.3 pF, and Find the midband gain AM, the frequency of the zero fZ, and the values of the pole frequencies fP1 and fP2. Hence, estimate the 3-dB frequency fH. (Note that this is the same amplifier considered in Problems 6.64 and 9.65; if you have solved these problems, compare your results.)

For the current mirror in Fig. P9.67, derive an expression for the current transfer function taking into account the BJT internal capacitances and neglecting and . Assume the BJTs to be identical. Observe that a signal ground appears at the collector of Q2. If the mirror is biased at 1 mA and the BJTs at this operating point are characterized by and find the frequencies of the pole and zero of the transfer function.

A CS amplifier modeled with the equivalent circuit of Fig 9.25(a) is specified to have , , gm = 4mA/V, and . Find AM, f3dB, and ft.

It is required to analyze the high-frequency response of the CMOS amplifier shown in Fig. P9.69. The dc bias current is 100 A. For Q1, nCox = 90 A/V2, VA = 12.8 V, W/L = 100 m/1.6 m, Cgs = 0.2 pF, Cgd = 0.015 pF, and Cdb = 20 fF. For Q2, Cgd = 0.015 pF, Cdb = 36 fF, and Assume that the resistance of the input signal generator is negligibly small. Also, for simplicity, assume that the signal voltage at the gate of Q2 is zero. Find the low-frequency gain, the frequency of the pole, and the frequency of the zero.

This problem investigates the use of MOSFETs in the design of wideband amplifiers (Steininger, 1990). Such amplifiers can be realized by cascading low-gain stages. (a) Show that for the case Cgd  Cgs and the gain of the common-source amplifier is low so that the Miller effect is negligible, the MOSFET can be modeled by the approximate equivalent circuit shown in Fig. P9.70(a), where T is the unity-gain frequency of the MOSFET. (b) Figure P9.70(b) shows an amplifier stage suitable for the realization of low gain and wide bandwidth. Transistors Q1 and Q2 have the same channel length L but different widths W1 and W2. They are biased at the same VGS and have the same fT. Use the MOSFET equivalent circuit of Fig. P9.70(a) to model this amplifier stage assuming that its output is connected to the input of an identical stage. Show that the voltage gain is given by (c) For L = 0.5 m, W2 = 25 m, fT = 12 GHz, and nCox = 200 A/V2, design the circuit to obtain a gain of 3 V/V per stage. Bias the MOSFETs at VOV = 0.3 V. Specify the required values of W1 and I. What is the 3-dB frequency achieved?

Consider an active-loaded common-emitter amplifier. Let the amplifier be fed with an ideal voltage source Vi, and neglect the effect of rx. Assume that the bias current source has a very high resistance and that there is a capacitance CL present between the output node and ground. This capacitance represents the sum of the input capacitance of the subsequent stage and the inevitable parasitic capacitance between collector and ground. Show that the voltage gain is given by If the transistor is biased at IC = 200 A and VA = 100 V, C = 0.2 pF, and CL = 1 pF, find the dc gain, the 3-dB frequency, the frequency of the zero, and the frequency at which the gain reduces to unity. Sketch a Bode plot for the gain magnitude.

A common-source amplifier fed with a low-resistance signal source and operating with has a unitygain frequency of 2 GHz. What additional capacitance must be connected to the drain node to reduce ft to 1 GHz?

Consider a CS amplifier loaded in a current source with an output resistance equal to of the amplifying transistor. The amplifier is fed from a signal source with . The transistor is biased to operate at mA/V and k ; pF. Use the Miller approximation to determine an estimate of . Repeat for the following two cases: (i) the bias current I in the entire system is reduced by a factor of 4, and (ii) the bias current I in the entire system is increased by a factor of 4. Remember that both and will change as changes.

Use the method of open-circuit time constants to find for a CS amplifier for which mA/V, pF, k , k , and k for the following cases: (a) , (b) pF, and (c) pF. Compare with the value of obtained using the Miller approximation.

A CG amplifier is specified to have 0.1 pF, , and Neglecting the effects of find the low-frequency gain the frequencies of the poles fP1 and fP2, and hence an estimate of the 3-dB frequency fH.

Sketch the high-frequency equivalent circuit of a CB amplifier fed from a signal generator characterized by and Rsig and feeding a load resistance RL in parallel with a capacitance CL. (a) Show that for the circuit can be separated into two parts: an input part that produces a pole at and an output part that forms a pole at Note that these are the bipolar counterparts of the MOS expressions in Eqs. (9.109) and (9.110). (b) Evaluate and and hence obtain an estimate for fH for the case , and Also, find fT of the transistor.

Consider a CG amplifier loaded in a resistance and fed with a signal source having a resistance . Also let . Use the method of opencircuit time constants to show that for , the upper 3dB frequency is related to the MOSFET by the approximate expression

For the CG amplifier in Example 9.12, how much additional capacitance should be connected between the output node and ground to reduce to 300 MHz?

Find the dc gain and the 3-dB frequency of a MOS cascode amplifier operated at mA/V and k . The MOSFETs have fF, fF, and fF. The amplifier is fed from a signal source with k and is connected to a load resistance of 2 M . There is also a load capacitance of 40 fF.

(a) Consider a CS amplifier having CL (including Cdb) = 1 pF, and Find the low-frequency gain AM, and estimate fH using open-circuit time constants. Hence determine the gainbandwidth product. (b) If a CG stage is cascaded with the CS transistor in (a) to create a cascode amplifier, determine the new values of AM, fH, and gainbandwidth product. Assume RL remains unchanged.

It is required to design a cascode amplifier to provide a dc gain of 74 dB when driven with a low-resistance generator and utilizing NMOS transistors for which = 50, and Assuming that determine the overdrive voltage and the drain current at which the MOSFETs should be operated. Find the unity-gain frequency and the 3-dB frequency. If the cascode transistor is removed and RL remains unchanged, what will the dc gain become?

Consider a bipolar cascode amplifier biased at a current of 1 mA. The transistors used have and rx = The amplifier is fed with a signal source having The load resistance Find the low-frequency gain AM, and estimate the value of the 3-dB frequency fH.

In this problem we consider the frequency response of the bipolar cascode amplifier in the case that ro can be neglected. (a) Refer to the circuit in Fig. 9.31, and note that the total resistance between the collector of Q1 and ground will be equal to re2, which is usually very small. It follows that the pole introduced at this node will typically be at a very high frequency and thus will have negligible effect on fH. It also follows that at the frequencies of interest the gain from the base to the collector of Q1 will be Use this to find the capacitance at the input of Q1 and hence show that the pole introduced at the input node will have a frequency Then show that the pole introduced at the output node will have a frequency (b) Evaluate fP1 and fP2, and use the sum-of-the-squares formula to estimate fH for the amplifier with I = 1 mA, and in the following two cases:

A BJT cascode amplifier uses transistors for which , V, GHz, and pF. It operates at a bias current of 0.1 mA between a source with and a load . Let and find the overall voltage gain at dc, , and

A source follower has and Find AM, Ro, fZ, and fH. Also, find the percentage contribution of each of the three capacitances to the time-constant H.

Using the expression for the source follower in Eq. (9.129) show that for situations in which is large and is small, Find for the case k , k , k , mA/V, fF, and fF.

Refer to Fig. 9.32(b). In situations in which is large, the high-frequency response of the source follower is determined by the low-pass circuit formed by and the input capacitance. An estimate of can be obtained by using the Miller approximation to replace with an input capacitance where K is the gain from gate to source. Using the low-frequency value of find and hence and an estimate of . Is this estimate higher or lower than that obtained by the method of open-circuit time constants?

For an emitter follower biased at and having and using a transistor specified to have and evaluate the low-frequency gain AM and the 3-dB frequency fH.

For the emitter follower shown in Fig. P9.89, find the low-frequency gain and the 3-dB frequency fH for the following three cases: (a) (b) (c) Let and

A MOSFET differential amplifier such as that shown in Fig. 9.34(a) is biased with a current source I = 200 A. The transistors have W / L = 25, VA = 200 V, Cgs = 40 fF, Cgd = 5 fF, and Cdb = 5 fF. The drain resistors are 20 k each. Also, there is a 100-fF capacitive load between each drain and ground. (a) Find VOV and gm for each transistor. (b) Find the differential gain Ad. (c) If the input signal source has a small resistance Rsig and thus the frequency response is determined primarily by the output pole, estimate the 3-dB frequency fH. (d) If, in a different situation, the amplifier is fed symmetrically with a signal source of 40 k resistance (i.e., 20 k in series with each gate terminal), use the open-circuit timeconstants method to estimate fH.

The amplifier specified in Problem 9.90 has RSS = 80 k and CSS = 0.1 pF. Find the 3-dB frequency of the CMRR.

In a particular MOS differential amplifier design, the bias current A is provided by a single transistor operating at V with V and output capacitance of 100 fF. What is the frequency of the common-mode gain zero at which begins to rise above its low-frequency value? To meet a requirement for reduced power supply, consideration is given to reducing to 0.2 V while keeping I unchanged. Assuming the currentsource capacitance to be directly proportional to the device width, what is the impact on of this proposed change?

Repeat Exercise 9.27 for the situation in which the bias current is reduced to 80 A and is raised to 20 k For (d), let be raised from 20 k to 100 k (Note: This is a low-voltage, low-power design.)

A BJT differential amplifier operating with a 1-mA current source uses transistors for which = 100, fT = 600 MHz, C = 0.5 pF, and rx = 100 . Each of the collector resistances is 10 k, and ro is very large. The amplifier is fed in a symmetrical fashion with a source resistance of 10 k in series with each of the two input terminals. (a) Sketch the differential half-circuit and its high-frequency equivalent circuit. (b) Determine the low-frequency value of the overall differential gain. (c) Use the Miller approximation to determine the input capacitance and hence estimate the 3-dB frequency fH and the gainbandwidth product.

A differential amplifier is biased by a current source having an output resistance of 1 M and an output capacitance of 1 pF. The differential gain exhibits a dominant pole at 2MHz. What are the poles of the CMRR?

A current-mirror-loaded MOS differential amplifier is biased with a current source I = 0.2 mA. The two NMOS transistors of the differential pair are operating at VOV = 0.2 V, and the PMOS devices of the mirror are operating at |VOV| = 0.2 V. The Early voltage The total capacitance at the input node of the mirror is 0.1 pF and that at the output node of the amplifier is 0.2 pF. Find the dc value and the frequencies of the poles and zero of the differential voltage gain.

Consider the active-loaded CMOS differential amplifier of Fig. 9.37(a) for the case of all transistors operated at the same and having the same Also let the total capacitance at the output node be four times the total capacitance at the input node of the current mirror and show that the unity-gain frequency of is For V, V, I = 0.2 mA, fF, and fF, find the dc value of , and the value of and and sketch a Bode plot for

A CS amplifier is specified to have gm = 5 mA/V, ro = 40 k, Cgs = 2 pF, Cgd = 0.1 pF, CL = 1 pF, Rsig = 20 k, and RL = 40 k. (a) Find the low-frequency gain AM, and use open-circuit time constants to estimate the 3-dB frequency fH. Hence determine the gainbandwidth product. (b) If a 500- resistance is connected in the source lead, find the new values of fH, and the gainbandwidth product.

(a) Use the approximate expression in Eq. (9.161) to determine the gainbandwidth product of a CS amplifier with a source-degeneration resistance. Assume and (b) If a low-frequency gain of 20 V/V is required, what fH corresponds? (c) For and RL = 20k, find the required value of Rs.

For the CS amplifier with a source-degeneration resistance Rs, show for and that where

It is required to generate a table of fH, and ft versus for a CS amplifier with a source-degeneration resistance Rs. The table should have entries for . . . , 15. The amplifier is specified to have 5 mA/V, 20 k, and Use the formula for H given in the statement for Problem 9.100. If is required, find the value needed for Rs and the corresponding value of

In this problem we investigate the bandwidth extension obtained by placing a source follower between the signal source and the input of the CS amplifier. (a) First consider the CS amplifier of Fig. P9.102(a). Show that where is the total capacitance between the output node and ground. Calculate the value of AM, fH, and the gain bandwidth product for the case gm = 1 mA/V, ro = 20 k Rsig = 20 k fF, Cgd = 5 fF, and CL = 10 fF. (b) For the CD-CS amplifier in Fig. P9.102(b), show that Calculate the values of and the gainbandwidth product for the same parameter values used in (a). Compare with the results of (a).

The transistor in the circuit of Fig. P9.103 have 0 = 100, VA = 100 V, C = 0.2 pF, and Cje = 0.8 pF. At a bias current of 100 A, fT = 400 MHz. (Note that the bias details are not shown.) (a) Find Rin and the midband gain. (b) Find an estimate of the upper 3-dB frequency fH. Which capacitor dominates? Which one is the second most significant? (Hint. Use the formulas in Example 9.15.)

Consider the BiCMOS amplifier shown in Fig. P9.104. The BJT has = 200, C = 0.8 pF, and fT = 600 MHz. The NMOS transistor has Vt = 1 V, and Cgs = Cgd = 1 pF. (a) Consider the dc bias circuit. Neglect the base current of Q2 in determining the current in Q1. Find the dc bias currents in Q1 and Q2, and show that they are approximately 100 A and 1 mA, respectively.(b) Evaluate the small-signal parameters of Q1 and Q2 at their bias points. (c) Consider the circuit at midband frequencies. First, determine the small-signal voltage gain Vo/Vi. (Note that RG can be neglected in this process.) Then use Millers theorem on RG to determine the amplifier input resistance Rin. Finally, determine the overall voltage gain Vo/Vsig. (d) Consider the circuit at low frequencies. Determine the frequency of the poles due to C1 and C2, and hence estimate the lower 3-dB frequency, fL. (e) Consider the circuit at higher frequencies. Use Millers theorem to replace RG with a resistance at the input. (The one at the output will be too large to matter.) Use open-circuit time constants to estimate fH. (f) To considerably reduce the effect of RG on Rin and hence on amplifier performance, consider the effect of adding another 10-M resistor in series with the existing one and placing a large bypass capacitor between their joint node and ground. What will Rin, AM, and fH become?

Consider the circuit of Fig. P9.105 for the case: I = 200 A and VOV = 0.2 V, Rsig = 200 k, RD = 50 k, Cgs = Cgd = 1pF. Find the dc gain, the high-frequency poles, and an estimate of fH.

For the amplifier in Fig. 9.41(a), let I = 1 mA, = 120, fT = 700 MHz, and C = 0.5 pF, and neglect rx and ro. Assume that a load resistance of 10 k is connected to the output terminal. If the amplifier is fed with a signal Vsig having a source resistance find AM and fH.

Consider the CDCG amplifier of Fig. 9.41(c) for the case gm = 5 mA/V, Cgs = 2 pF, Cgd = 0.1 pF, CL (at the output node) = 1 pF, and Rsig = RL = 20 k. Neglecting ro, find AM, and fH

In each of the six circuits in Fig. P9.108 (p. 800), let = 100, C = 2 pF, and fT = 400 MHz, and neglect rx and ro. Calculate the midband gain AM and the 3-dB frequency fH.

Use open-circuit time constants to obtain an expression for of the amplifier in Fig. 9.44. Compare to the expression in Eq. (9.176).

For the CMOS amplifier in Fig. 9.43, whose equivalent circuit is shown in Fig. 9.44, let mA/V, R1 = 100 k, C1 = 0.1 pF, Gm2 = 2 mA/V, R2 = 50 k, and pF. (a) Find the dc gain. (b) Without connected, find the frequencies of the two poles in radians per seconds and sketch a Bode plot for the gain magnitude. (c) With connected, find . Then find the value of that will result in a unity-gain frequency at least two octaves below . For this value of , find and and sketch a Bode plot for the gain magnitude.

A CMOS op amp with the topology in Fig. 9.43 has mA/V, mA/V, the total capacitance between node and ground is 0.2 pF, and the total capacitance between the output node and ground is 3 pF. Find the value of that results in MHz and verify that is lower than and

Figure P9.112 shows an amplifier formed by cascading two CS stages. Note that the input bias voltage is not shown. Each of and is operated at an overdrive voltage of 0.2 V, and V. The transistor capacitances are as follows: fF, fF, and fF. (a) Find the dc voltage gain. (b) Find the input capacitance at the gate of using the Miller approximation. (c) Use the capacitance in (b) to determine the frequency of the pole formed at the amplifier input. Let k . (d) Use the Miller approximation to find the input capacitance of and hence determine the total capacitance at the drain of (e) Use the capacitance found in (d) to obtain the frequency of the pole formed at the interface between the two stages. (f) Determine the total capacitance at the output node and hence estimate the frequency of the pole formed at the output node. (g) Does the amplifier have a dominant pole? If so, at what frequency