The voltage across a capacitor is found to be given by vC(t) = 10e10t 5e4t V. (a) Sketch

A parallel RLC circuit contains a \(100\ \Omega\) resistor and has the parameter values \(\alpha = 1000\ s^{?1}\) and \(\omega_0 = 800\ rad/s\). Find (a) C; (b) L; (c) \(s_1\); (d) \(s_2\).

Determine the current \(i_R\) through the resistor of Fig. 9.7 for t > 0 if \(i_L (0^- ) = 6\ A\) and \(v_C (0^+ ) = 0\ V\). The configuration of the circuit prior to t = 0 is not known.

(a) Sketch the voltage \(v_R (t) = 2e^{-t} - 4e^{-3t}\ V\) in the range 0 < t < 5 s. (b) Estimate the settling time. (c) Calculate the maximum positive value and the time at which it occurs.

(a) Choose \(R_1\) in the circuit of Fig. 9.13 so that the response after t = 0 will be critically damped. (b) Now select \(R_2\) to obtain v(0) = 100 V. (c) Find v(t) at t = 1 ms.

The switch in the circuit of Fig. 9.19 has been in the left position for a long time; it is moved to the right at t = 0. Find (a) dv/dt at \(t = 0^+\); (b) v at t = 1 ms; (c) \(t_0\), the first value of t greater than zero at which v = 0.

With reference to the circuit shown in Fig. 9.24, find (a) \(\alpha\); (b) \(\omega_0\); (c) \(i(0^+ )\); (d) \(di/dt |_{t=0^+ }\); (e) i(12 ms).

Find an expression for \(i_L(t)\) in the circuit of Fig. 9.27, valid for t > 0, if \(v_C(0^- ) = 10\ V\) and \(i_L (0^- ) = 0\). Note that although it is not helpful to apply Thévenin techniques in this instance, the action of the dependent source links \(v_C\) and \(i_L\) such that a first-order linear differential equation results.

Let \(i_s = 10u(-t) - 20u(t)\ A\) in Fig.9.30. Find (a) \(i_L (0^- )\); (b) \(v_C(0^+ )\); (c) \(v_R(0^+ )\); (d) \(i_L (\infty)\); (e) \(i_L (0.1\ ms)\).

Let \(v_s = 10 + 20u(t)\ V\) in the circuit of Fig. 9.33. Find (a) \(i_L\) (0); (b) \(v_C(0)\); (c) \(i_{L,\ f}\); (d) \(i_L\) (0.1 s).

Give new values for \(R_f\) and the two initial voltages in the circuit of Fig. 9.36 if the output represents the voltage v(t) in the circuit of Fig. 9.37.

For a certain source-free parallel RLC circuit, \(R = 1\ k \Omega\), \(C = 3\ \mu F\), and L is such that the circuit response is overdamped. (a) Determine the value of L. (b) Write the equation for the voltage v across the resistor if it is known that \(v(0^-) = 9\ V\) and \(dv/dt |_{t=0^+} = 2\ V/s\).

Element values of 10 mF and 2 nH are employed in the construction of a simple source-free parallel RLC circuit. (a) Select R so that the circuit is just barely overdamped. (b) Write the equation for the resistor current if its initial value is \(i_R(0^+) = 13\ pA\) and \(di_E /dt |_{t=0^+} = 1\ nA/s\).

If a parallel RLC circuit is constructed from component values C = 16 mF and L = 1 mH, choose R such that the circuit is (a) just barely overdamped; (b) just barely underdamped; (c) critically damped. (d) Does your answer for part (a) change if the resistor tolerance is 1%? 10%? (e) Increase the exponential damping coefficient for part (c) by 20%. Is the circuit now underdamped, overdamped, or still critically damped? Explain.

Calculate \(\alpha\), \(\omega_0\), \(s_1\), and \(s_2\) for a source-free parallel RLC circuit if (a) \(R = 4\ \Omega\), L = 2.22 H, and C = 12.5 mF; (b) L = 1 nH, C = 1 pF, and R is 1% of the value required to make the circuit underdamped. (c) Calculate the damping ratio for the circuits of parts (a) and (b).

You go to construct the circuit in Exercise 1, only to find no \(1\ k \Omega\) resistors. In fact, all you are able to locate in addition to the capacitor and inductor is a 1 meter long piece of 24 AWG soft solid copper wire. Connecting it in parallel to the two components you did find, compute the value of \(\alpha\), \(\omega_0\), \(s_1\), and \(s_2\), and verify that the circuit is still overdamped.

Consider a source-free parallel RLC circuit having \(\alpha = 10^8\ s^{-1}\), \(\omega_0 = 10^3\ rad/s\), \(\omega_0 L = 5\ \Omega\). (a) Show that the stated units of \(\omega_0 L\) are correct. (b) Compute \(s_1\) and \(s_2\). (c) Write the general form of the natural response for the capacitor voltage. (d) By appropriate substitution, verify that your answer to part (c) is indeed a solution to Eq. [1] if the inductor and capacitor each initially store 1 mJ of energy, respectively.

A parallel RLC circuit is constructed with \(R = 500\ \Omega\), \(C = 10\ \mu F\), and L such that it is critically damped. (a) Determine L. Is this value large or small for a printed-circuit board mounted component? (b) Add a resistor in parallel to the existing components such that the damping ratio is equal to 10. (c) Does increasing the damping ratio further lead to an overdamped, critically damped, or underdamped circuit? Explain.

The circuit of Fig. 9.2 is modified substantially, with the resistor being replaced with a \(1\ k \Omega\) resistor, the inductor swapped out for a smaller 7 mH version, the capacitor replaced with a 1 nF alternative, and now the inductor is initially discharged while the capacitor is storing 7.2 mJ. (a) Compute \(\alpha\), \(\omega_0\), \(s_1\), and \(s_2\), and verify that the circuit is still overdamped. (b) Obtain an expression for the current flowing through the resistor which is valid for t > 0. (c) Calculate the magnitude of the resistor current at \(t = 10\ \mu s\).

The voltage across a capacitor is found to be given by \(v_C(t) = 10e^{-10t} - 5e^{-4t}\ V\). (a) Sketch each of the two components over the range of \(0\ \leq\ t\ \leq\ 1.5\ s\). (b) Graph the capacitor voltage over the same time range.

The current flowing through a certain inductor is found to be given by \(i_L (t) = 0.20e^{-2t} - 0.6e^{-3t}\ V\). (a) Sketch each of the two components over the range of \(0\ \leq\ t\ \leq\ 1.5\ s\). (b) Graph the inductor current over the same time range. (c) Graph the energy remaining in the inductor over \(0\ \leq\ t\ \leq\ 1.5\ s\).

The current flowing through a \(5\ \Omega\) resistor in a source-free parallel RLC circuit is determined to be \(i_R (t) = 2e^{-t} - 3e^{-8t}\ V\), t > 0. Determine (a) the maximum current and the time at which it occurs; (b) the settling time; (c) the time t corresponding to the resistor absorbing 2.5 W of power.

For the circuit of Fig. 9.38, obtain an expression for \(v_C(t)\) valid for all t > 0.

Consider the circuit depicted in Fig. 9.38. (a) Obtain an expression for \(i_L(t)\) valid for all t > 0. (b) Obtain an expression for \(i_R(t)\) valid for all t > 0. (c) Determine the settling time for both \(i_L\) and \(i_R\).

With regard to the circuit represented in Fig. 9.39, determine (a) \(i_C (0^- )\); (b) \(i_L (0^- )\); (c) \(i_R (0^- )\); (d) \(v_C (0^- )\); (e) \(i_C (0^+ )\); (f) \(i_L (0^+ )\); (g) \(i_R (0^+ )\); (h) \(v_C (0^+ )\).

(a) Assuming the passive sign convention, obtain an expression for the voltage across the \(1\ \Omega\) resistor in the circuit of Fig. 9.39 which is valid for all t > 0. (b) Determine the settling time of the resistor voltage.

With regard to the circuit presented in Fig. 9.40, (a) obtain an expression for v(t) which is valid for all t > 0; (b) calculate the maximum inductor current and identify the time at which it occurs; (c) determine the settling time.

Replace the \(14\ \Omega\) resistor in the circuit of Fig. 9.41 with a \(1\ \Omega\) resistor. (a) Obtain an expression for the energy stored in the capacitor as a function of time, valid for t > 0. (b) Determine the time at which the energy in the capacitor has been reduced to one-half its maximum value. (c) Verify your answer with an appropriate PSpice simulation.

Design a complete source-free parallel RLC circuit which exhibits an overdamped response, has a settling time of 1 s, and has a damping ratio of 15.

For the circuit represented by Fig. 9.42, the two resistor values are \(R_1 = 0.752\ \Omega\) and \(R_2 = 1.268\ \Omega\), respectively. (a) Obtain an expression for the energy stored in the capacitor, valid for all t > 0; (b) determine the settling time of the current labeled \(i_A\).

A motor coil having an inductance of 8 H is in parallel with a \(2\ \mu F\) capacitor and a resistor of unknown value. The response of the parallel combination is determined to be critically damped. (a) Determine the value of the resistor. (b) Compute \(\alpha\). (c) Write the equation for the current flowing into the resistor if the top node is labeled v, the bottom node is grounded, and \(v = Ri_r\). (d) Verify that your equation is a solution to the circuit differential equation, \(\frac{d i_{r}}{d t}+2 \alpha \frac{d i_{r}}{d t}+\alpha^{2} i_{r}=0\)

The condition for critical damping in an RLC circuit is that the resonant frequency \(\omega_0\) and the exponential damping factor ? are equal. This leads to the relationship \(L = 4R^2C\), which implies that \(1\ H = 1\ \Omega^2 \cdot F\). Verify this equivalence by breaking down each of the three units to fundamental SI units (see Chap. 2).

A critically damped parallel RLC circuit is constructed from component values \(40\ \Omega\), 8 nF, and \(51.2\ \mu H\), respectively. (a) Verify that the circuit is indeed critically damped. (b) Explain why, in practice, the circuit once fabricated is unlikely to be truly critically damped. (c) The inductor initially stores 1 mJ of energy while the capacitor is initially discharged. Determine the magnitude of the capacitor voltage at t = 500 ns, the maximum absolute capacitor voltage, and the settling time.

Design a complete (i.e., with all necessary switches or step function sources) parallel RLC circuit which has a critically damped response such that the capacitor voltage at t = 1 s is equal to 9 V and the circuit is source-free for all t > 0.

A critically damped parallel RLC circuit is constructed from component values \(40\ \Omega\) and 2 pF. (a) Determine the value of L, taking care not to overround. (b) Explain why, in practice, the circuit once fabricated is unlikely to be truly critically damped. (c) The inductor initially stores no energy while the capacitor is initially storing 10 pJ. Determine the power absorbed by the resistor at t = 2 ns, the maximum absolute inductor current \(|i_L|\), and the settling time.

For the circuit of Fig. 9.43, \(i_s(t) = 30u(?t)\ mA\). (a) Select \(R_1\) so that \(v(0^+ ) = 6\ V\). (b) Compute v(2 ms). (c) Determine the settling time of the capacitor voltage. (d) Is the inductor current settling time the same as your answer to part (c)?

The current source in Fig. 9.43 is \(i_s(t) = 10u(1 ? t)\ \mu A\). (a) Select \(R_1\) such that \(i_L(0^+) = 2\ \mu A\). Compute \(i_L\) at t = 500 ms and t = 1.002 ms.

The inductor in the circuit of Fig. 9.41 is changed such that the circuit response is now critically damped. (a) Determine the new inductor value. (b) Calculate the energy stored in both the inductor and the capacitor at t = 10 ms.

The circuit of Fig. 9.42 is rebuilt such that the quantity controlling the dependent source is now \(100i_A\), a \(2\ \mu F\) capacitor is used instead, and \(R_1 = R_2 = 10\ \Omega\). (a) Calculate the inductor value required to obtain a critically damped response. (b) Determine the power being absorbed by \(R_2\) at \(t = 300\ \mu s\).

(a) With respect to the parallel RLC circuit, derive an expression for R in terms of C and L to ensure the response is underdamped. (b) If C = 1 nF and L = 10 mH, select R such that an underdamped response is (just barely) achieved. (c) If the damping ratio is increased, does the circuit become more or less underdamped? Explain. (d) Compute \(\alpha\) and \(\omega_d\) for the value of R you selected in part (b).

The circuit of Fig. 9.1 is constructed using component values \(10\ k \Omega\), \(72\ \mu H\), and 18 pF. (a) Compute \(\alpha\), \(\omega_d\), and \(\omega_0\). Is the circuit overdamped, critically damped, or underdamped? (b) Write the form of the natural capacitor voltage response v(t). (c) If the capacitor initially stores 1 nJ of energy, compute v at t = 300 ns.

The source-free circuit depicted in Fig. 9.1 is constructed using a 10 mH inductor, a 1 mF capacitor, and a \(1.5\ k \Omega\) resistor. (a) Calculate \(\alpha\), \(\omega_d\), and \(\omega_0\). (b) Write the equation which describes the current i for t > 0. (c) Determine the maximum value of i, and the time at which it occurs, if the inductor initially stores no energy and \(v(0^?) = 9\ V\).

(a) Graph the current i for the circuit described in Exercise 32 for resistor values \(1.5\ k \Omega\), \(15\ k \Omega\), and \(150\ k \Omega\). Make three separate graphs and be sure to extend the corresponding time axis to \(6 \pi / \omega_d\) in each case. (b) Determine the corresponding settling times.

Analyze the circuit described in Exercise 32 to find v(t), t > 0, if R is equal to (a) \(2\ k \Omega\); (b) \(2\ \Omega\). (c) Graph both responses over the range of \(0\ \leq\ t\ \leq\ 60\ ms\). (d) Verify your answers with appropriate PSpice simulations.

For the circuit of Fig. 9.44, determine (a) \(i_C(0^- )\); (b) \(i_L(0^- )\); (c) \(i_R(0^- )\); (d) \(v_C (0^- )\); (e) \(i_C (0^+ )\); (f) \(i_L(0^+ )\); (g) \(i_R(0^+ )\); (h) \(v_C (0^+ )\).

For the circuit of Fig. 9.45, determine (a) the first time t > 0 when v(t) = 0; (b) the settling time.

(a) Design a parallel RLC circuit that provides a capacitor voltage which oscillates with a frequency of 100 rad/s, with a maximum value of 10 V occurring at t = 0, and the second and third maxima both in excess of 6 V. (b) Verify your design with an appropriate PSpice simulation.

The circuit depicted in Fig. 9.46 is just barely underdamped. (a) Compute \(\alpha\) and \(\omega_d\). (b) Obtain an expression for \(i_L(t)\) valid for t > 0. (c) Determine how much energy is stored in the capacitor, and in the inductor, at t = 200 ms.

When constructing the circuit of Fig. 9.46, you inadvertently install a \(500\ M \Omega\) resistor by mistake. (a) Compute \(\alpha\) and \(\omega_d\). (b) Obtain an expression for \(i_L(t)\) valid for t > 0. (c) Determine how long it takes for the energy stored in the inductor to reach 10% of its maximum value.

The circuit of Fig. 9.21a is constructed with a 160 mF capacitor and a 250 mH inductor. Determine the value of R needed to obtain (a) a critically damped response; (b) a “just barely” underdamped response. (c) Compare your answers to parts (a) and (b) if the circuit was a parallel RLC circuit.

Component values of \(R = 2\ \Omega\), C = 1 mF, and L = 2 mH are used to construct the circuit represented in Fig. 9.21a. If \(v_C(0^? ) = 1\ V\) and no current initially flows through the inductor, calculate i(t) at t = 1 ms, 2 ms, and 3 ms.

The series RLC circuit described in Exercise 42 is modified slightly by adding a \(2\ \Omega\) resistor in parallel to the existing resistor. The initial capacitor voltage remains 1 V, and there is still no current flowing in the inductor prior to t = 0. (a) Calculate \(v_C(t)\) at 4 ms. (b) Sketch \(v_C(t)\) over the interval \(0\ \leq\ t\ \leq\ 10\ s\).

The simple three-element series RLC circuit of Exercise 42 is constructed with the same component values, but the initial capacitor voltage \(v_C(0^? ) = 2\ V\) and the initial inductor current \(i(0^?) = 1\ mA\). (a) Obtain an expression for i(t) valid for all t > 0. (b) Verify your solution with an appropriate simulation.

With reference to the circuit depicted in Fig. 9.47, calculate (a) \(\alpha\); (b) \(\omega_0\); (c) \(i(0^+ )\); (d) \(di/dt|_{0^+ }\); (e) i(t) at t = 6 s.

Obtain an equation for \(v_C\) as labeled in the circuit of Fig. 9.48 valid for all t > 0.

With reference to the series RLC circuit of Fig. 9.48, (a) obtain an expression for i, valid for t > 0; (b) calculate i(0.8 ms) and i(4 ms); (c) verify your answers to part (b) with an appropriate PSpice simulation.

Obtain an expression for \(i_1\) as labeled in Fig. 9.49 which is valid for all t > 0.

Evaluate the derivative of each current and voltage variable labeled in Fig. 9.51 at \(t = 0^+\).

Consider the circuit depicted in Fig. 9.52. If \(v_s(t) =?8 + 2u(t)\ V\), determine (a) \(v_C(0^+)\); (b) \(i_L(0^+)\); (c) \(v_C(\infty)\); (d) \(v_C(t = 150\ ms)\).

The \(15\ \Omega\) resistor in the circuit of Fig. 9.52 is replaced with a \(500\ m \Omega\) alternative. If the source voltage is given by \(v_s = 1 ? 2u(t)\ V\), determine (a) \(i_L(0^+ )\); (b) \(v_C(0^+ )\); (c) \(i_L(\infty)\); (d) \(v_C(4\ ms)\).

In the circuit shown in Fig. 9.53, obtain an expression for \(i_L\) valid for all t > 0 if \(i_1 = 8 ? 10u(t)\ mA\).

The \(10\ \Omega\) resistor in the series RLC circuit of Fig. 9.53 is replaced with a \(1\ k \Omega\) resistor. The source \(i_1 = 5u(t) ? 4\ mA\). Obtain an expression for \(i_L\) valid for all t > 0.

For the circuit represented in Fig. 9.54, (a) obtain an expression for \(v_C(t)\) valid for all t > 0. (b) Determine \(v_C\) at t = 10 ms and t = 600 ms. (c) Verify your answers to part (b) with an appropriate PSpice simulation.

Replace the \(1\ \Omega\) resistor in Fig. 9.54 with a \(100\ m \Omega\) resistor, and the \(5\ \Omega\) resistor with a \(200\ m \Omega\) resistor. Assuming the passive sign convention, obtain an expression for the capacitor current which is valid for t > 0.

With regard to the circuit of Fig. 9.55, obtain an expression for \(v_C\) valid for \(t\ \geq\ 0\) if \(i_s(t) = 3u(?t) + 5u(t)\ mA\).

(a) Adjust the value of the \(3\ \Omega\) resistor in the circuit represented in Fig. 9.55 to obtain a “just barely” overdamped response. (b) Determine the first instant (t > 0) at which an equal (and nonzero) amount of energy is stored in the capacitor and the inductor if \(i_s(t) = 2u(t)\ A\). (c) Calculate the corresponding energy. (d) At what subsequent time will the energy stored in the inductor be twice that stored in the capacitor at the same instant?

Design an op amp circuit to model the voltage response of the LC circuit shown in Fig. 9.56. Verify your design by simulating both the circuit of Fig. 9.56 and your circuit using an LF 411 op amp, assuming v(0) = 0 and i (0) = 1 mA.

Refer to Fig. 9.57, and design an op amp circuit whose output will be i(t) for t > 0.

Replace the capacitor in the circuit of Fig. 9.56 with a 20 H inductor in parallel with a \(5\ \mu F\) capacitor. Design an op amp circuit whose output will be i(t) for t > 0. Verify your design by simulating both the capacitor-inductor circuit and your op amp circuit. Use an LM111 op amp in the PSpice simulation.

A source-free RC circuit is constructed using a \(1\ k \Omega\) resistor and a 3.3 mF capacitor. The initial voltage across the capacitor is 1.2 V. (a) Write the differential equation for v, the voltage across the capacitor, for t > 0. (b) Design an op amp circuit that provides v(t) as the output.

A source-free RL circuit contains a \(20\ \Omega\) resistor and a 5 H inductor. If the initial value of the inductor current is 2 A: (a) write the differential equation for i for t > 0, and (b) design an op amp integrator to provide i(t) as the output, using \(R_1 = 1\ M \Omega\) and \(C_f = 1\ \mu F\).

The capacitor in the circuit of Fig. 9.58 is set to 1 F. Determine \(v_C(t)\) at (a) t = ?1 s; (b) \(t = 0^+\); (c) t = 20 s.

Obtain an expression for the current labeled \(i_1\) in the circuit of Fig. 9.58 which is valid for t > 0, if the current source is replaced with a source \(5u(t + 1)\ A\).

Design a parallel RLC circuit which produces an exponentially damped sinusoidal pulse with a peak voltage of 1.5 V and at least two additional peaks with voltage magnitude greater than 0.8 V. Verify your design with an appropriate PSpice simulation.

Design a series RLC circuit which produces an exponentially damped sinusoidal pulse with a peak voltage of 1.5 V and at least two additional peaks with voltage magnitude greater than 0.8 V. Verify your design with an appropriate PSpice simulation.

After being open for a long time, the switch in Fig. 9.5 closes at t = 0. Find (a) \(i_L (0^- )\); (b) \(v_C (0^- )\); (c) \(i_R (0^+ )\); (d) \(i_C (0^+ )\); (e) \(v_C (0.2)\).

Let \(v_s = 10 + 20u(t)\ V\) in the circuit of Fig. 9.33. Find (a) \(i_L\) (0); (b) \(v_C(0)\); (c) \(i_L\), f ; (d) \(i_L\) (0.1\ s)\).

Obtain expressions for the current i(t) and voltage v(t) as labeled in the circuit of Fig. 9.41 which are valid for all t > 0.

Obtain an expression for \(v_L(t)\), t > 0, for the circuit shown in Fig. 9.44. Plot the waveform for at least two periods of oscillation.

The series RLC circuit of Fig. 9.22 is constructed using \(R = 1\ k \Omega\), C = 2 mF, and L = 1 mH. The initial capacitor voltage \(v_C\) is ?4 V at \(t = 0^?\). There is no current initially flowing through the inductor. (a) Obtain an expression for \(v_C(t)\) valid for t > 0. (b) Sketch over \(0\ \leq\ t\ \leq\ 6\ \mu s\).

In the series circuit of Fig. 9.50, set \(R = 1\ \Omega\). (a) Compute \(\alpha\) and \(\omega_0\). (b) If \(i_s = 3u(-t) + 2u(t)\ mA\), determine \(v_R(0^- )\), \(i_L (0^- )\), \(v_C (0^- )\), \(v_R (0^+ )\), \(i_L (0^+ )\), \(v_C (0^+ )\), \(i_L (\infty)\), and \(v_C (\infty)\).

(a) What value of C for the circuit of Fig. 9.59 will result in an overdamped response? (b) Set C = 1 F and obtain an expression for \(i_L(t)\) valid for t > 0.

After being open for a long time, the switch in Fig. 9.5 closes at t = 0. Find (a) \(i_L (0^- )\); (b) \(v_C (0^- )\); (c) \(i_R (0^+ )\); (d) \(i_C (0^+ )\); (e) \(v_C (0.2)\).

Obtain expressions for the current i(t) and voltage v(t) as labeled in the circuit of Fig. 9.41 which are valid for all t > 0.

Obtain an expression for \(v_L(t)\), t > 0, for the circuit shown in Fig. 9.44. Plot the waveform for at least two periods of oscillation.

The series RLC circuit of Fig. 9.22 is constructed using \(R = 1\ k \Omega\), C = 2 mF, and L = 1 mH. The initial capacitor voltage \(v_C\) is ?4 V at \(t = 0^?\). There is no current initially flowing through the inductor. (a) Obtain an expression for \(v_C(t)\) valid for t > 0. (b) Sketch over \(0\ \leq\ t\ \leq\ 6\ \mu s\).

In the series circuit of Fig. 9.50, set \(R = 1\ \Omega\). (a) Compute \(\alpha\) and \(\omega_0\). (b) If \(i_s = 3u(-t) + 2u(t)\ mA\), determine \(v_R(0^- )\), \(i_L (0^- )\), \(v_C (0^- )\), \(v_R (0^+ )\), \(i_L (0^+ )\), \(v_C (0^+ )\), \(i_L (\infty)\), and \(v_C (\infty)\).

(a) What value of C for the circuit of Fig. 9.59 will result in an overdamped response? (b) Set C = 1 F and obtain an expression for \(i_L(t)\) valid for t > 0.